SMP100LC-3 - STMicroelectronics

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SMP100LC-xxx

January 2002 - Ed: 7C

TELECOM EQUIPMENT PROTECTION: TRISIL™

■Bidirectional crowbar protection

■Voltage range from 8V to 262V

■Low capacitance from 30 pF to 45pF typ @ 50V

■Low leakage current : IR=2µA max

■Holding current: IH= 150 mA min

■Repetitive peak pulse current :

IPP = 100 A (10/1000µs)

FEATURES

The SMP100LC-xxx series is a low

capacitance transient surge arrestor designed

for the protection of high debit rate

communicationequipment.Itslowcapacitance

avoids any distortion of the signal and is

compatible with digital line cards (xDSL,

T1/E1, ISDN...).

DESCRIPTION

SCHEMATIC DIAGRAM

Any sensitive equipment requiring protection

against lightning strikes and power crossing:

■Analog and digital line cards

(xDSL, T1/ E1, ISDN...)

■Terminals (phone, fax, modem...) and central of-

fice equipment

MAIN APPLICATIONS

Trisilsare not subjectto ageing andprovide a failsafe mode inshort circuit fora better protection.They are

used to help equipment to meet main standards such as UL1950, IEC950 / CSA C22.2 and UL1459. They

have UL94 V0 approved resin. SMB package is JEDEC registered (DO-214AA). Trisils are UL497B

approved (file: E136224) and comply with the following standards GR-1089 Core, ITU-T-K20/K21,

VDE0433, VDE0878, IEC61000-4-5 and FCC part 68.

BENEFITS

SMB

(JEDEC DO-214AA)

SMP100LC-xxx

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Symbol Parameter Value Unit

Rth(j-a) Junction to ambient with recommended footprint 100 °C/W

Rth(j-l) Junction to leads 20 °C/W

THERMAL RESISTANCES

STANDARD Peak Surge

Voltage

(V)

Voltage

Waveform

Required

peak current

(A)

Current

waveform

Minimum serial

resistor to meet

standard ( )

GR-1089 Core

First level 2500

1000 2/10 µs

10/1000 µs 500

100 2/10 µs

10/1000 µs 0

GR-1089 Core

Second level 5000 2/10 µs 500 2/10 µs 0

GR-1089 Core

Intra-building 1500 2/10 µs 100 2/10 µs 0

ITU-T-K20/K21 6000

1500 10/700 µs 150

37.5 5/310 µs 0

ITU-T-K20

(IEC61000-4-2) 8000

15000 1/60 ns ESD contact discharge

ESD air discharge 0

VDE0433 4000

2000 10/700 µs 100

50 5/310 µs 0

VDE0878 4000

2000 1.2/50 µs 100

50 1/20 µs 0

IEC61000-4-5 4000

4000 10/700 µs

1.2/50 µs 100

100 5/310 µs

8/20 µs 0

FCC Part 68, lightning

surge type A 1500

800 10/160 µs

10/560 µs 200

100 10/160 µs

10/560 µs 0

FCC Part 68, lightning

surge type B 1000 9/720 µs 25 5/320 µs 0

IN COMPLIANCES WITH THE FOLLOWING STANDARDS

Symbol Parameter

VRM Stand-off voltage

IRM Leakage current at VRM

VRContinuous reverse voltage

IRLeakage current at VR

VBR Breakdown voltage

VBO Breakover voltage

IHHolding current

IBO Breakover current

IPP Peak pulse current

CCapacitance

ELECTRICAL CHARACTERISTICS (Tamb = 25°C)

SMP100LC-xxx

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100

Symbol Parameter Value Unit

Ipp Repetitive peak pulse current: 10/1000 µs

8/20 µs

10/560 µs

5/310 µs

10/160 µs

1/20 µs

2/10 µs

100

250

120

150

200

250

500

IFS Fail-safe mode : maximum current (note 1) 8/20 µs5kA

TSM Non repetitive surge peak on-state current

(Sinusoidal) t = 20ms

t = 16.6ms

t = 0.2s

t=2s

TLMaximum lead temperature for soldering during 10s 260 °C

Tstg

Tj Storage temperature range

Maximum junction temperature -55to+150

150 °C

°C

Note 1: in fail safe mode, the device acts as a short circuit.

ABSOLUTE RATINGS (Tamb =25°C)

Type IRM @V

max.

IR@V

max.

Note 1

Dynamic

VBO @I

max. max

Note 2

Static

VBO @I

max. max

Note 3

min.

Note 4

typ.

Note 5

typ.

Note 6

µAVµAV VmAVmAmA pF pF

SMP100LC-8

825

800

50 (typ) NA 75

SMP100LC-25 22 25 40 35 150 NA 65

SMP100LC-35 32 35 55 55 150 NA 55

SMP100LC-65 55 65 85 85 150 45 90

SMP100LC-90 81 90 120 125 150 40 80

SMP100LC-120 108 120 155 160 150 35 75

SMP100LC-140 120 140 185 190 150 30 65

SMP100LC-160 144 160 210 220 150 30 65

SMP100LC-200 170 200 265 275 150 30 60

SMP100LC-230 200 230 300 320 150 30 60

SMP100LC-270 230 262 350 370 150 30 60

Note 1: IRmeasured at VRguarantee VBR min ≥VRNote 4: See funtional holding current test circuit 3

Note 2: See functional test circuit 1 Note 5: VR= 50V bias, VRMS=1V, F=1MHz

Note 3: See test circuit 2 Note 6:V

= 2V bias, VRMS=1V, F=1MHz

ELECTRICAL PARAMETERS (Tamb = 25°C)

Repetitive peak pulse current

tr: rise time (µs)

tp: pulse duration time (µs)

ex: Pulse waveform 10/1000µs

tr = 10µs tp = 1000µs

SMP100LC-xxx

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1E-2 1E-1 1E+0 1E+1 1E+2 1E+3

t(s)

ITSM(A)

F=50Hz

Fig. 1: Non repetitive surge peak on-state current

versus overload duration (Tjinitial = 25 °C).

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

Tj(°C)

IH[Tj] / IH[Tj=25°C]

Fig. 3: Relative variation of holding current versus

junction temperature .

-25 0 25 50 75 100 125

0.96

0.98

1.00

1.02

1.04

1.06

1.08

Tj(°C)

VBO[Tj] / VBO[Tj=25°C]

Fig. 4: Relative variation of breakover voltage versus

junction temperature.

25 50 75 100 125

100

1000

2000

Tj(°C)

IRM[Tj] / IRM[Tj=25°C]

VRM > 50V

VRM < 50V

Fig. 5: Relative variation of leakage current versus

junction temperature (typical values).

1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2

100

tp(s)

Zth(j-a)(°CW)

Fig. 6: Variation of thermal impedance junction to

ambient versus pulse duration (Printed circuit board

FR4, SCu=35µm, recommended pad layout).

1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0

VT(V)

IT(A)

Tj=25°C

Fig. 2: On-state voltage versus on-state current

(typical values)

SMP100LC-xxx

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1 2 5 10 20 50 100 300

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

VR(V)

C [VR] / C [VR=2V]

Tj=25°C

F=1MHz

VRMS=1V

Fig. 7: Relative variation of junction capacitance

versus reverse voltage applied (typical values).

100 V / µs, di/dt < 10 A / µs, Ipp = 100 A

1 kV / µs, di/dt < 10 A / µs, Ipp = 10 A

10 µF

2Ω45 Ω

66 Ω470 Ω

83 Ω

0.36 nF

46 µH

60 µF

26 µH

12 Ω

250 Ω46 µH

47 Ω

KeyTek 'System 2' generator with PN246I module

TEST CIRCUIT 1 FOR DYNAMIC IBO AND VBO PARAMETERS

SMP100LC-xxx

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TEST PROCEDURE :

Pulse test duration (tp = 20ms):

- For Bidirectional devices = Switch K is closed

- For Unidirectional devices = Switch K is open.

VOUT Selection

- Device with VBO <200 Volt

-V

OUT = 250 VRMS,R

1= 140 Ω.

- Device with VBO ≥200 Volt

-V

OUT = 480 VRMS,R

2= 240 Ω.

TEST CIRCUIT 2 FOR IBO and VBO parameters :

220V 50Hz

1/4

R1 = 140Ω

R2 = 240Ω

ton = 20ms

IBO

measurement

VBO

measurement

Vout DUT

TEST CIRCUIT 3 FOR IHPARAMETER

VBAT = - 48 V

Surge generator

D.U.T

This is a GO-NO GO test which allows to confirm the holding current (IH) level in a functional test circuit.

TEST PROCEDURE :

- Adjust the current level at the IHvalue by short circuiting the D.U.T.

- Fire the D.U.T. with a surge current : Ipp = 10A, 10/1000 µs.

- The D.U.T. will come back to the off-state within 50 ms max.

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SMP100LC-xxx

PACKAGE MECHANICAL DATA

SMB (Plastic)

REF. DIMENSIONS

Millimeters Inches

Min. Max. Min. Max.

A1 1.90 2.45 0.075 0.096

A2 0.05 0.20 0.002 0.008

b 1.95 2.20 0.077 0.087

c 0.15 0.41 0.006 0.016

E 5.10 5.60 0.201 0.220

E1 4.05 4.60 0.159 0.181

D 3.30 3.95 0.130 0.156

L 0.75 1.60 0.030 0.063

1.52 2.75

2.3

1.52

(0.09)

(0.059)(0.108)(0.059)

FOOT PRINT in millimeters (inches)

SMP100LC-xxx

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Ordering type Marking Package Weight Base qty Delivery mode

SMP100LC-8 PL8

SMB 0.11g 2500 Tape & Reel

SMP100LC-25 L25

SMP100LC-35 L35

SMP100LC-65 L06

SMP100LC-90 L09

SMP100LC-120 L12

SMP100LC-140 L14

SMP100LC-160 L16

SMP100LC-200 L20

SMP100LC-230 L23

SMP100LC-270 L27

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

ofuseofsuchinformationnorforanyinfringementofpatentsorotherrightsofthirdpartieswhichmayresultfromitsuse. No license is granted

by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to

change without notice. This publication supersedes and replaces all information previously supplied.

STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written

approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics

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SMP 100 LC - xxx

Trisil Surface Mount

Low C apacitance

Voltage

I = 100 A

ORDER CODE