REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outline letter U. Add vendor CAGE number 60395 to drawing. Editorial changes throughout. 89-08-07 M. A. Frye B Add device type 28 to drawing. Editorial changes throughout. 93-01-05 M. A. Frye C Add software data protect to drawing. Updated boilerplate. 97-04-06 Raymond Monnin D Changes in accordance with NOR 5962-R409-97 97-08-12 Raymond Monnin E Editorial correction to page 1, correction of number of pages. Figure 1 redrawn with 32 leads vs 44 leads and dimension table corrected. ksr 04-06-04 Raymond Monnin F Add vendor CAGE numbers 0C7V7 and 3DTT2 to drawing. Updated boilerplate as part of 5-year review. - glg 10-03-25 Charles Saffle THE ORIGINAL FIRST PAGE OF THE DRAWING HAS BEEN REPLACED. REV SHEET REV F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Kenneth Rice STANDARD MICROCIRCUIT DRAWING http://www.dscc.dla.mil CHECKED BY Charles Reusing APPROVED BY Michael A. Frye THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8K X 8-BIT EEPROM, MONOLITHIC SILICON 88-07-01 AMSC N/A REVISION LEVEL F SIZE CAGE CODE A 67268 5962-87514 SHEET 1 OF DSCC FORM 2233 APR 97 23 5962-E053-10 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962-87514 Drawing number 01 Device type (see 1.2.1) X Case outline (see 1.2.2) X Lead finish per MIL-PRF-38535 appendix A 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Generic number Circuit function (see 6.4) (8K X 8 EEPROM) Access time Write speed Write mode 350 ns 300 ns 250 ns 200 ns 250 ns 350 ns 300 ns 250 ns 200 ns 120 ns 90 ns 70 ns 350 ns 300 ns 250 ns 200 ns 150 ns 350 ns 300 ns 250 ns 200 ns 150 ns 350 ns 300 ns 250 ns 200 ns 250 ns 200 ns 10 ms 10 ms 10 ms 10 ms 10 ms 2 ms 2 ms 2 ms 2 ms 2 ms 2 ms 2 ms 1 ms 1 ms 1 ms 1 ms 1 ms 1 ms 1 ms 1 ms 1 ms 1 ms 10 ms 10 ms 10 ms 10 ms 10 ms 200 s byte/page byte/page byte/page byte/page byte/page byte/page byte/page byte/page byte/page byte/page byte/page byte/page byte byte byte byte byte byte byte byte byte byte byte/page byte/page byte/page byte/page byte/page byte End of write indicator _____ DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling DATA polling RDY/BUSY RDY/BUSY RDY/BUSY RDY/BUSY RDY/BUSY DATA polling DATA polling DATA polling DATA polling DATA polling RDY/BUSY RDY/BUSY RDY/BUSY RDY/BUSY RDY/BUSY RDY/BUSY Endurance 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 100,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 10,000 cycles 100,000 cycles 10,000 cycles 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter U X Y Z Descriptive designator See figure 1 GDIP1-T28 or CDIP2-T28 CQCC1-N32 CDFP4-F28 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Terminals 32 28 32 28 Package style "J" leaded cerquad package Dual-in-line Rectangular leadless chip carrier Flat pack SIZE 5962-87514 A REVISION LEVEL F SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC)....................................................................... -0.3 V dc to +6.25 V dc Storage temperature range ...................................................................... -65C to +150C Maximum power dissipation (PD) .............................................................. 1.0 W Lead temperature (soldering, 10 seconds)............................................... +300C Junction temperature (TJ) 2/ .................................................................... +175C Thermal resistance, junction-to-case (JC)............................................... See MIL-STD-1835 Input voltage range (VIL, VIH) .................................................................... -0.3 V dc to +6.25 V dc Data retention ........................................................................................... 10 years (minimum) Endurance: Device types 01 through 04, 06 through 26, and 28 .............................. 10,000 cycles/byte (minimum) Device types 05 and 27 .......................................................................... 100,000 cycles/byte (minimum) Chip clear voltage (VH) ............................................................................. 13.0 V dc 1.4 Recommended operating conditions. 1/ Supply voltage range (VCC)....................................................................... +4.5 V dc to +5.5 V dc Case operating temperature range (TC) ................................................... -55C to +125C Input voltage, low range (VIL).................................................................... -0.1 V dc to +0.8 V dc Input voltage, high range (VIH) .................................................................. +2.0 V dc to VCC +0.3 V dc Chip clear voltage range (VH) ................................................................... 12 V dc to 13 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ 2/ All voltages are referenced to VSS (ground). Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 3 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table for unprogrammed devices. The truth table for unprogrammed devices shall be as specified on figure 3. 3.2.3.1 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered item drawing. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. Defense Supply Center Columbus, (DSCC), DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing EEPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 4 3.10.1 Erasure of EEPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4.1. Devices shall be shipped in the erased (logic "1's) and verified state unless otherwise specified. 3.10.2 Programmability of EEPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.4. 3.10.3 Verification of erasure or programmability of EEPROMS. When specified, devices shall be verified as either programmed to the specified pattern or erased. As a minimum, verification shall consist of reading the device in accordance with the procedures and characteristics specified in 4.4.2. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. 3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. 3.13 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall be done for initial characterization and after any design or process change, which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. (3) Devices shall be burned-in containing a checkerboard pattern or equivalent. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CI and CO measurements) shall be measured only for the initial test and after process or design changes which may affect capacitance. Sample size is fifteen devices with no failures, and all input and output terminals tested. d. Subgroups 7 and 8 shall include verification of the truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 5 TABLE I. Electrical performance characteristics. Test Supply current (active) Supply current (TTL standby) Supply current (CMOS standby) Input leakage (high) Input leakage (low) Output leakage 3/ (high) Output leakage 3/ (low) Input voltage low Input voltage high Output voltage low Output voltage high Symbol Conditions 1/ 2/ -55C < TC <+125C VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified ICC CE = OE = VIL, WE = VIH All I/O's = open Inputs = VCC = 5.5 V ICC1 CE = VIH, OE = VIL All I/O's = open Inputs = X ICC2 CE = VCC -0.3 V All I/O's = open Inputs = VIL to VCC -0.3 V IIH VIN = 5.5 V IIL VIN = 0.1 V IOHZ VOUT = 5.5 V, CE = VIH IOLZ VOUT = 0.1 V, CE = VIH VIL VIH IOL = 2.1 mA, VIH = 2.0 V VOL VCC = 4.5 V, VIL = 0.8 V VOH IOH = -400 A, VIH = 2.0 V VCC = 4.5 V, VIL = 0.8 V Group A Device subgroups type 1,2,3 01-05, 23-27 06-12 13-22,28 1,2,3 All 1,2,3 01-12, 23-27 13-22,28 1,2,3 All 1,2,3 All 1,2,3 All 1,2,3 All 1,2,3 All 1,2,3 All 1,2,3 All 1,2,3 All Limits Min -10 -10 -10 -10 -0.1 2.0 2.4 Unit Max 60 mA 80 45 3 mA 250 A 150 10 A 10 A 10 A 10 A 0.8 V VCC+0.3 V 0.45 V V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Input capacitance 4/ 5/ Output capacitance 4/ 5/ Functional tests Read cycle time 6/ Address access time Symbol Conditions 1/ 2/ -55C < TC <+125C VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified CI VI = 0 V, VCC = 5.0 V TA = +25C, f = 1 MHz See 4.3.1c CO VO = 0 V, VCC = 5.0 V TA = +25C, f = 1 MHz See 4.3.1c See 4.3.1d tAVAV See figure 4 tAVQV Group A Device Limits subgroups type Min 4 All 4 All 7,8A,8B All 9,10,11 01,06,13, 350 18,23 02,07,14, 300 19,24 03,05,08, 250 15,20,25, 27 04,09,16, 200 21,26,28 17,22, 150 10 120 11 90 12 70 9,10,11 01,06,13, 18,23 02,07,14, 19,24 03,05,08, 15,20,25, 27 04,09,16, 21,26,28 17,22 10 11 12 Max 10 10 350 300 250 200 150 120 90 70 Unit pF pF ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 7 TABLE I. Electrical performance characteristics - Continued. Test Chip enable access time Output enable access time Chip enable to 5/ output in low Z Chip disable to 5/ output in high Z Output enable to 5/ output in low Z Symbol Conditions 1/ 2/ -55C < TC <+125C VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified tELQV See figure 4 tOLQV tELQX tEHQZ tOLQX Group A Device Limits subgroups type Min 9,10,11 01,06,13, 18,23 02,07,14, 19,24 03,05,08, 15,20,25, 27 04,09,16, 21,26,28 17,22 10 11 12 9,10,11 01-05, 13-22, 23-28 06-12, 9,10,11 All 10 9,10,11 01-08, 13-15, 18-20, 23-27 09-12,16, 17,21,22, 28 9,10,11 All 10 Max 350 300 250 200 150 120 90 70 100 50 80 55 Unit ns ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 8 TABLE I. Electrical performance characteristics - Continued. Test Output disable to output in high Z Output hold from 6/ address change CE to power up 5/ CE to power down 5/ Write cycle time Address setup 6/ time Address hold 6/ time Write setup time 6/ Write hold time 6/ Symbol tOHQZ 5/ tAVQX tpu tpd tWHWL1 tEHEL1 tAVEL tAVWL tELAX tWLAX tWLEL tELWL tWHEH Conditions 1/ 2/ -55C < TC <+125C VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified See figure 4 See figures 5 and 6 See figures 5, 6, and 7 Group A Device Limits subgroups type Min 9,10,11 01-08, 13-15, 18-20, 23-27 09-12,16, 17,21,22, 28 9,10,11 All 0 9,10,11 All 9,10,11 All 9,10,11 01-05, 23-27 06-12 13-22 28 9,10,11 All 20 9,10,11 All 150 9,10,11 All 0 9,10,11 All 0 Max 80 55 250 50 10 2.0 1.0 0.2 Unit ns ns ns ns ms ns ns ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 9 TABLE I. Electrical performance characteristics - Continued. Test OE setup time 6/ OE hold time WE pulse width 6/ Data setup time 6/ Data hold time 6/ Byte load cycle Last byte loaded 6/ to data polling CE setup time 6/ Output setup 6/ time CE hold time 6/ OE hold time 6/ Erase time 6/ Symbol tOHEL tOHWL tWHOL tELEH tWLWH tDVEH tDVWH tEHDX tWHDX tEHEL2 tWHWL2 tWHEL tELWL tOVHWL tEHWH tWHOH tOHAV Conditions 1/ 2/ -55C < TC <+125C VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified See figures 5, 6, or 7 as applicable See figures 5 or 6 See figure 5 See figure 5 See figure 8 See figure 6 See figure 8, configuration A or B Group A Device subgroups type 9,10,11 All 9,10,11 All 9,10,11 All 9,10,11 All 9,10,11 All 9,10,11 All 9,10,11 06-12, 18-22 9,10,11 All 9,10,11 All 9,10,11 All 9,10,11 All 9,10,11 01-05, 23-27 Limits Min 20 20 150 50 10 0.2 1 1 1 1 200 Max 2 200 Unit ns ns ns ns ns s ns s s s s ms See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 10 TABLE I. Electrical performance characteristics - Continued. Test Chip erase time 6/ High voltage 6/ Time to device busy Write cycle time RDY/BUSY Maximum time to 6/ valid data after WE/CE low Symbol tWLWH2 6/ VH tEHRL tWHRL tELRH tWLRH tWLDV tELDV Conditions 1/ 2/ -55C < TC <+125C VSS = 0 V 4.5 V < VCC < 5.5 V unless otherwise specified See figure 8, configuration A or B See figures 6 and 7 Group A Device subgroups type 9,10,11 01-05, 23-27 06-22,28 9,10,11 All 9,10,11 13-17,28 23-27 9,10,11 13-17,28 23-27 9,10,11 13-22,28 Limits Min 150 10 12 Max 13 50 100 1 10 1 Unit ns ms V ns ms s 1/ DC and read mode. 2/ Equivalent ac test conditions: Device types: 01 through 09 and 13 through 28. Device types: 10 through 12. Output load: 1 TTL gate and C1 = 100 pF, Output load: 1 TTL gate and C1 = 30 pF. Input rise and fall times < 10 ns. Input rise and fall times < 5 ns. Input pulse levels: 0.4 V and 2.4 V. Input pulse levels: 0.4 V and 2.4 V. Timing measurements reference levels: Inputs 1 V and 2 V. Inputs 1 V and 2 V. Outputs 0.8 V and 2 V. Outputs 0.8 V and 2 V. 3/ Connect all address inputs and OE to VIH and measure IOLZ and IOHZ with the output under test connected to VOUT. 4/ All pins not being tested are to be open. 5/ Tested initially and after any design or process changes that affect that parameter, and therefore guaranteed to the limits specified in table I. 6/ Tested by application of specified timing signals and conditions, see footnote 2/. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 11 Case U FIGURE 1. Case outline. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 12 Case U Dimensions Ltr Inches Millimeters Min Max Min A .140 .167 3.56 4.24 A1 .073 .103 1.85 2.62 A2 .027 .045 0.69 1.14 c .006 .010 0.15 0.25 D .485 .495 12.32 12.57 D1 .445 .465 11.30 11.81 D2 .390 .430 9.91 10.92 E .585 .595 14.86 15.11 E1 .545 .565 13.84 14.35 E2 .490 .530 12.45 13.46 e .050 TYP 1.27 TYP b .017 .021 0.43 0.53 b1 .026 .032 0.66 0.81 N Max 32 NOTES: 1. Controlling dimensions are inches, metric provided for convenience. 2. Dimensions D1 and E1 do not include glass protrusion. Glass protrusion to be .010 inch (0.25 mm) maximum. 3. All dimensions and tolerances include lead trim offset and lead finish. FIGURE 1. Case outline - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 13 Device types 01 through 28 Case outlines X and Z Terminal number U and Y Terminal symbol 1 NC (See note) NC 2 A12 NC (See note) 3 A7 A12 4 A6 A7 5 A5 A6 6 A4 A5 7 A3 A4 8 A2 A3 9 A1 A2 10 A0 A1 11 I/O0 A0 12 I/O1 NC 13 I/O2 I/O0 14 GND I/O1 15 I/O3 I/O2 16 I/O4 GND 17 I/O5 NC 18 I/O6 I/O3 19 I/O7 I/O4 20 CE I/O5 21 A10 I/O6 22 OE I/O7 23 A11 CE 24 A9 A10 25 A8 OE 26 NC NC 27 WE A11 28 VCC A9 29 --- A8 30 --- NC 31 --- WE 32 --- VCC _____ NOTE: For device types 13 through 17 and 23 through 28, this NC is replaced by RDY/BUSY. FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 14 Mode I/O Device types CE OE WE Read VIL VIL VIH DOUT All Chip clear VIL VH VIL X All Byte write VIL VIH VIL Data in All Write inhibit X VIL X High Z/DOUT All Write inhibit X X VIH High Z/DOUT All VIH X X High Z All Standby FIGURE 3. Truth table. NOTES: 1. VCC shall be applied simultaneously or after WE and removed simultaneously or before WE . 2. See footnote 2 of table I. FIGURE 4. Read cycle timing. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 15 NOTES: 1. See footnote 2 of table I. 2. Program verify equivalent to the read mode. 3. Page load is 1 to 64 bytes of data for device types 01 through 12, and 23 through 27. 4. WE is noise protected. Less than 20 ns write pulse will not activate a write cycle. 5. WE and CE both must be active to initiate a write cycle; therefore, the sequence of WE or CE (e.g., for WE or CE controlled write) is verified interchangeable without duplicate testing. FIGURE 5. Page write programming waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 16 NOTES: 1. See footnote 2 of table I. 2. Program verify equivalent to the read mode. 3. WE and CE both must be active to initiate a write cycle; therefore, the sequence of WE and CE (e.g., for WE or CE controlled write) is verified interchangeable without duplicate testing. FIGURE 6. CE _controlled byte write programming waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 17 NOTES: 1. See footnote 2 of table I. 2. Program verify equivalent to the read mode. 3. WE and CE both must be active to initiate a write cycle; therefore, the sequence of WE and CE (e.g., for WE or CE controlled write) is verified interchangeable without duplicate testing. FIGURE 7. WE controlled byte write programming waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 18 FIGURE 8. Chip clear waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 19 NOTES: 1. Set software data protection timings are referenced to WE or CE inputs, whichever is last to go low, and the WE or CE inputs, whichever is first to go high. 2. The command sequence must conform to the page write timing. 3. The command sequence and subsequent data must conform to the page write timing. FIGURE 9. Set software data protect and software protected write algorithm (device types 01- 05 and 08 - 12). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 20 NOTES: 1. Reset software data protection timings are referenced to WE or CE inputs, whichever is last to go low, and the WE or CE inputs, whichever is first to go high. 2. The command sequence must conform to the page write timing. FIGURE 10. Reset software data protect algorithm (device types 01- 05 and 08 - 12). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 21 TABLE II. Electrical test requirements. Subgroups 1/ 2/ (in accordance with MIL-STD-883, method 5005, table I) 1, 7, 9, or 2, 8A, 10 1*, 2, 3, 7*, 8, 9, 10, 11 3/ 1, 2, 3, 4**, 7, 8, 9, 10, 11 4/ 5/ 1, 2, 3, 7, 8, 9, 10, 11 MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) 1/ 2/ 3/ 4/ 5/ Any or all subgroups may be combined when using multifunction testers. For all electrical tests, the device shall be programmed to the data pattern specified. (*) Indicates PDA applies to subgroups 1 and 7. Subgroups 7 and 8 shall consist of writing and reading the data pattern specified in accordance with the limits of table I subgroups 9, 10, and 11. (**) Indicates that subgroup 4 will only be performed during initial qualification and after design or process changes (see 4.3.1c). 4.3.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. The following additional criteria shall apply. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.3.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4 Programming procedure. The following procedure shall be followed when programming (Write) is performed. The waveforms and timing relationships shown on figure 5 (per appropriate device type) and the conditions specified in table I shall be adhered to. Information is introduced by selectively programming a TTL low or TTL high on each I/O of the address desired. Functionality shall be verified at all temperatures (group A, subgroups 7 and 8) by programming all bytes of each device and verifying the pattern used. 4.4.1 Erasing procedure. There are two forms of erasure, chip and byte, whereby all bits or the address selected will be erased to a TTL high. a. Chip erase is performed in accordance with the waveforms and timing relationships shown on figure 8 (in accordance with appropriate device type) and the conditions specified in table I. b. Byte erase is performed in accordance with the waveforms and timing relationships shown on figure 5 (in accordance with appropriate device type) and the conditions specified in table I. 4.4.2 Read mode operation. The waveforms and timing relationships shown on figure 4 and the conditions specified in table I shall be applied when reading the device. Pattern verification utilizes the read mode. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 22 4.4.3 RDY/BUSY. While the write operation is in progress, the RDY/BUSY output is at a TTL low. An internal timer times out the required byte write time and at the end of this time, the device signals the RDY/BUSY pin to a TTL high. The RDY/BUSY pin is an open drain output and a typical 3 k pull-up resistor to VCC is required. The pull-up resistor value is dependent on the number of OR-tied RDY/BUSY pins (applies to device types 13 through 17 and 23 through 28). 4.4.4 Set software data protection. Device types 01-05 and 08-12 software data protection offers a method of preventing inadvertent writes. These devices are placed in protected state by writing a series of instructions (see figure 9) to the device. Once protected, writing to the device may only be performed by executing the same sequence of instructions appended with either a byte write operation or page write operation. The waveforms and timing relationships shown on figures 4 - 8 and the test conditions and limits specified in table I shall apply. 4.4.4.1 Reset software data protection. Device types 01-05 and 08-12 protection feature is reset by writing a series of instructions (see figure 10) to the device. The waveforms and timing relationships shown on figures 4 - 8 and the test conditions and limits specified in table I shall apply. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87514 A REVISION LEVEL F SHEET 23 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 10-03-25 Approved sources of supply for SMD 5962-87514 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MILHDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-8751401XA 5962-8751401YA 5962-8751401ZC 5962-8751402XA 5962-8751402YA 5962-8751402ZC 5962-8751403XA 5962-8751403YA 5962-8751403ZC 5962-8751404XA 5962-8751404YA 5962-8751404ZC 5962-8751405XA 5962-8751405YA 5962-8751405ZC 5962-8751406XA 5962-8751406UA 5962-8751406YA 5962-8751407XA 5962-8751407UA 5962-8751407YA 5962-8751408XA 5962-8751408UA 5962-8751408YA 5962-8751409XA 5962-8751409UA 5962-8751409YA Vendor CAGE number 2/ 2/ 2/ 2/ 2/ 2/ 2/ 3DTT2 2/ 3DTT2 2/ 2/ 2/ 2/ 2/ 2/ 3DTT2 2/ 0C7V7 3DTT2 2/ 0C7V7 3DTT2 0C7V7 3DTT2 2/ 0C7V7 3DTT2 0C7V7 3DTT2 2/ 0C7V7 3DTT2 0C7V7 3DTT2 2/ 0C7V7 3DTT2 See footnotes at end of table. 1 of 4 Vendor similar PIN 3/ X28C64DMB-35 X28C64EMB-35 X28C64FMB-35 X28C64DMB-30 X28C64EMB-30 X28C64FMB-30 X28C64DMB-25 PYX28C64-25CWMB X28C64EMB-25 PYX28C64-25L32MB X28C64FMB-25 X28C64DMB-20 X28C64EMB-20 X28C64FMB-20 X28C64DMB-25 X28C64EMB-25 PYX28C64X-25L32MB X28C64FMB-25 AT28C64B-35DM/883 PYA28C64B-35CWMB AT28PC64-35KM/883 AT28C64B-35LM/883 PYA28C64B-35L32MB AT28C64B-30DM/883 PYA28C64B-30CWMB AT28PC64-30KM/883 AT28C64B-30LM/883 PYA28C64B-30L32MB AT28C64B-25DM/883 PYA28C64B-25CWMB AT28PC64-25KM/883 AT28C64B-25LM/883 PYA28C64B-25L32MB AT28C64B-20DM/883 PYA28C64B-20CWMB AT28PC64-20KM/883 AT28C64B-20LM/883 PYA28C64B-20L32MB STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued. DATE: 10-03-25 Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 3/ 5962-8751410XA 0C7V7 3DTT2 2/ 0C7V7 3DTT2 0C7V7 3DTT2 2/ 0C7V7 3DTT2 2/ 2/ 2/ 0C7V7 3DTT2 2/ 0C7V7 3DTT2 2/ 0C7V7 3DTT2 2/ 0C7V7 3DTT2 0C7V7 3DTT2 2/ 0C7V7 3DTT2 2/ 0C7V7 3DTT2 2/ 0C7V7 3DTT2 0C7V7 3DTT2 2/ 0C7V7 3DTT2 2/ 3DTT2 2/ 2/ 3DTT2 AT28C64B-12DM/883 PYA28C64B-12CWMB AT28HC64L-12KM/883 AT28C64B-12LM/883 PYA28C64B-12L32MB AT28C64B-90DM/883 PYA28C64B-90CWMB AT28HC64L-90KM/883 AT28C64B-90LM/883 PYA28C64B-90L32MB AT28HC64B-70DM/883 AT28HC64L-70KM/883 AT28HC64L-70LM/883 AT28C64-35DM/883 PYA28C64-35CWMB AT28C64-35KM/883 AT28C64-35LM/883 PYA28C64-35L32MB AT28C64-35FM/883 AT28C64-30DM/883 PYA28C64-30CWMB AT28C64-30KM/883 AT28C64-30LM/883 PYA28C64-30L32MB AT28C64-25DM/883 PYA28C64-25CWMB AT28C64-25KM/883 AT28C64-25LM/883 PYA28C64-25L32MB AT28C64-25FM/883 AT28C64-20DM/883 PYA28C64-20CWMB AT28C64-20KM/883 AT28C64-20LM/883 PYA28C64-20L32MB AT28C64-15DM/883 PYA28C64-15CWMB AT28C64-15KM/883 AT28C64-15LM/883 PYA28C64-15L32MB AT28C64-35DM/883 PYA28C64X-35CWMB AT28C64X-35KM/883 AT28C64-35LM/883 PYA28C64X-35L32MB 5962-8751410UA 5962-8751410YA 5962-8751411XA 5962-8751411UA 5962-8751411YA 5962-8751412XA 5962-8751412UA 5962-8751412YA 5962-8751413XA 5962-8751413UA 5962-8751413YA 5962-8751413ZA 5962-8751414XA 5962-8751414UA 5962-8751414YA 5962-8751415XA 5962-8751415UA 5962-8751415YA 5962-8751415ZA 5962-8751416XA 5962-8751416UA 5962-8751416YA 5962-8751417XA 5962-8751417UA 5962-8751417YA 5962-8751418XA 5962-8751418UA 5962-8751418YA See footnotes at end of table. 2 of 4 STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued. DATE: 10-03-25 Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 3/ 5962-8751419XA 2/ 3DTT2 2/ 2/ 3DTT2 2/ 3DTT2 2/ 2/ 3DTT2 2/ 2/ 3DTT2 2/ 2/ 3DTT2 2/ 3DTT2 2/ 2/ 3DTT2 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ 2/ AT28C64X-30DM/883 PYA28C64X-30CWMB AT28C64X-30KM/883 AT28C64X-30LM/883 PYA28C64X-30L32MB AT28C64X-25DM/883 PYA28C64X-25CWMB AT28C64X-25KM/883 AT28C64X-25LM/883 PYA28C64X-25L32MB AT28C64X-25FM/883 AT28C64X-20DM/883 PYA28C64X-20CWMB AT28C64X-20KM/883 AT28C64X-20LM/883 PYA28C64X-20L32MB AT28C64X-15DM/883 PYA28C64X-15CWMB AT28C64X-15KM/883 AT28C64X-15LM/883 PYA28C64X-15L32MB DM28C65-350/B LM28C65-350/B FM28C65-350/B DM28C65-300/B LM28C65-300/B FM28C65-300/B DM28C65-250/B LM28C65-250/B FM28C65-250/B DM28C65-200/B LM28C65-200/B FM28C65-200/B DM55C65-250/B LM55C65-250/B FM55C65-250/B AT28C64F-20DM/883 AT28C64F-20LM/883 5962-8751419UA 5962-8751419YA 5962-8751420XA 5962-8751420UA 5962-8751420YA 5962-8751420ZA 5962-8751421XA 5962-8751421UA 5962-8751421YA 5962-8751422XA 5962-8751422UA 5962-8751422YA 5962-8751423XA 5962-8751423YA 5962-8751423ZA 5962-8751424XA 5962-8751424YA 5962-8751424ZA 5962-8751425XA 5962-8751425YA 5962-8751425ZA 5962-8751426XA 5962-8751426YA 5962-8751426ZA 5962-8751427XA 5962-8751427YA 5962-8751427ZA 5962-8751428XA 5962-8751428YA 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Not available from an approved source. 3/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3 of 4 STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued. DATE: 10-03-25 3DTT2 Pyramid Semiconductor Corp. 1340 Bordeaux Drive Sunnyvale, CA 94089 0C7V7 QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in this information bulletin. 4 of 4