Document Number: 90350 www.vishay.com
S-Pending-Rev. A, 10-Jun-08 WORK-IN-PROGRESS 1
Power MOSFET
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
FEATURES
Surface Mountable (Order As IRFR9020/SiHFR9020)
Straight Lead Option (Order As IRFU9020/SiHFU9020)
Repetitive Avalanche Ratings
Dynamic dV/dt Rating
Simple Drive Requirements
Ease of Paralleling
Lead (Pb)-free Available
DESCRIPTION
The Power MOSFET technology is the key to Vishay’s
advanced line of Power MOSFET transistors. The efficient
geometry and unique processing of this latest “State of the
Art” design achieves: very low on-state resistance combined
with high transconductance; superior reverse energy and
diode recovery dV/dt.
The Power MOSFET transistors also feature all of the well
established advantages of MOSFET’S such as voltage
control, very fast switching, ease of paralleling and
temperature stability of the electrical parameters.
Surface mount packages enhance circuit performance by
reducing stray inductances and capacitance. The TO-252
surface mount package brings the advantages of Power
MOSFET’s to high volume applications where PC Board
surface mounting is desirable. The surface mount option
IRFR9020/SiHFR9020 is provided on 16mm tape. The
straight lead option IRFR9020/SiHFR9020 of the device is
called the IPAK (TO-251).
They are well suited for applications where limited heat
dissipation is required such as, computers and peripherals,
telecommunication equipment, DC/DC converters, and a
wide range of consumer products.
Note
a. See device orientation.
PRODUCT SUMMARY
VDS (V) - 50
RDS(on) (Ω)V
GS = - 10 V 0.28
Qg (Max.) (nC) 14
Qgs (nC) 6.5
Qgd (nC) 6.5
Configuration Single
S
G
D
P-Channel MOSFET
DPAK
(TO-252)
IPAK
(TO-251)
Available
RoHS*
COMPLIANT
ORDERING INFORMATION
Package DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251)
Lead (Pb)-free IRFR9020PbF IRFR9020TRPbFaIRFR9020TRLPbFaIRFU9020PbF
SiHFR9020-E3 SiHFR9020T-E3aSiHFR9020TL-E3aSiHFU9020-E3
SnPb IRFR9020 IRFR9020TRaIRFR9020TRLaIRFU9020
SiHFR9020 SiHFR9020TaSiHFR9020TLaSiHFU9020
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS - 50 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current VGS at - 10 V TC = 25 °C ID
- 9.9
ATC = 100 °C - 6.3
Pulsed Drain CurrentaIDM - 40
Linear Derating Factor 0.33 W/°C
Single Pulse Avalanche EnergybEAS 440 mJ
Repetitive Avalanche CurrentaIAR - 9.9 A
Repetitive Avalanche EnergyaEAR 4.2 mJ
* Pb containing terminations are not RoHS compliant, exemptions may apply
www.vishay.com Document Number: 90350
2S-Pending-Rev. A, 10-Jun-08
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 14).
b. VDD = - 25 V, Starting TJ = 25 °C, L = 5.1 mH, RG = 25 Ω, Peak IL = - 9.9 A
c. ISD - 9.9 A, dI/dt -120 A/µs, VDD 40 V, TJ 150 °C.
d. 0.063" (1.6 mm) from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
Maximum Power Dissipation TC = 25 °C PD42 W
Peak Diode Recovery dV/dtcdV/dt 5.8 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C
Soldering Recommendations (Peak Temperature) for 10 s 300d
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA - - 110
°C/WCase-to-Sink RthCS -1.7-
Maximum Junction-to-Case (Drain) RthJC --3.0
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER SYMBOL LIMIT UNIT
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = - 250 µA - 50 - - V
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = - 250 µA - 2.0 - - 4.0 V
Gate-Source Leakage IGSS V
GS = ± 20 V - - ± 500 nA
Zero Gate Voltage Drain Current IDSS
VDS = max. rating, VGS = 0 V - - 250 µA
V
DS
= 0.8 x max. rating, V
GS
= 0 V, T
J
= 125 °C
- - 1000
Drain-Source On-State Resistance RDS(on) V
GS = - 10 V ID = 5.7 Ab- 0.20 0.28 Ω
Forward Transconductance gfs VDS - 50 V, IDS = - 5.7 A 2.3 3.5 - S
Dynamic
Input Capacitance Ciss VGS = 0 V,
VDS = - 25 V,
f = 1.0 MHz, see fig. 9
- 490 -
pFOutput Capacitance Coss - 320 -
Reverse Transfer Capacitance Crss -70-
Total Gate Charge Qg
VGS = - 10 V
ID = - 9.7 A, VDS = 0.8 x max.
rating, see fig. 16
(Independent operating
temperature)
-9.414
nC Gate-Source Charge Qgs -4.36.5
Gate-Drain Charge Qgd -4.36.5
Turn-On Delay Time td(on)
VDD = - 25 V, ID = - 9.7 A,
RG = 18 Ω, RD = 2.4 Ω, see fig. 15
(Independent operating temperature)
-8.212
ns
Rise Time tr -5766
Turn-Off Delay Time td(off) -1218
Fall Time tf -2538
Internal Drain Inductance LD
Between lead,
6 mm (0.25") from
package and center of
die contact.
-4.5-
nH
Internal Source Inductance LS-7.5-
D
S
G
Document Number: 90350 www.vishay.com
S-Pending-Rev. A, 10-Jun-08 3
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 14).
b. Pulse width 300 µs; duty cycle 2 %.
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Transfer Characteristics
Fig. 3 - Typical Saturation Characteristics
Fig. 4 - Maximum Safe Operating Area
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current ISMOSFET symbol
showing the
integral reverse
p - n junction diode
--- 9.9
A
Pulsed Diode Forward CurrentaISM --- 40
Body Diode Voltage VSD TJ = 25 °C, IS = - 9.9 A, VGS = 0 Vb--- 6.3V
Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = - 9,7 A, dI/dt = 100 A/µsb56 110 280 ns
Body Diode Reverse Recovery Charge Qrr 0.17 0.34 0.85 nC
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
S
D
G
www.vishay.com Document Number: 90350
4S-Pending-Rev. A, 10-Jun-08
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Fig. 5 - Typical Transconductance vs. Drain Current
Fig. 6 - Typical Source-Drain Diode Forward Voltage
Fig. 7 - Breakdown Voltage vs. Temperature
Fig. 8 - Normalized On-Resistance vs. Temperature
Document Number: 90350 www.vishay.com
S-Pending-Rev. A, 10-Jun-08 5
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Fig. 9 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 10 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 11 - Typical On-Resistance vs. Drain Current
Fig. 12 - Maximum Drain Current vs. Case Temperature
www.vishay.com Document Number: 90350
6S-Pending-Rev. A, 10-Jun-08
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Fig. 13a - Maximum Avalanche vs. Starting Junction
Temperature
Fig. 13b - Unclamped Inductive Test Circuit
Fig. 13c - Unclamped Inductive Waveforms
Fig. 14 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration
I
AS
VDS
VDD
VDS
tp
IL
Document Number: 90350 www.vishay.com
S-Pending-Rev. A, 10-Jun-08 7
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Fig. 15a - Switching Time Waveforms Fig. 15b - Switching Time Test Circuit
Fig. 16a - Basic Gate Charge Waveform Fig. 16b - Gate Charge Test Circuit
VGS
10 %
90 %
VDS
td(on) trtd(off) tf
QGS QGD
QG
VG
Charge
- 10 V
www.vishay.com Document Number: 90350
8S-Pending-Rev. A, 10-Jun-08
IRFR9020, IRFU9020, SiHFR9020, SiHFU9020
Vishay Siliconix
Fig. 17 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http:/ /www. vishay.com/ppg?90350.
P.W.Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
V
GS
= - 10 V*
V
DD
I
SD
Driver gate drive
D.U.T. I
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D = P.W.
Period
+
-
-
-
-
+
+
+
* VGS = - 5 V for logic level and - 3 V drive devices
Peak Diode Recovery dV/dt Test Circuit
VDD
dV/dt controlled by RG
ISD controlled by duty factor "D"
D.U.T. - device under test
D.U.T.
Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
RG
Compliment N-Channel of D.U.T. for driver
Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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