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Am29DL642G

Data Sheet

PRELIMINARY

This Data Sheet st ates AMD’s curr ent tech nical spec ifications reg arding the Product s describ ed herein. This Data

Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. Publication# 26503 Rev: BAmendment/+1

Issue Date: Spetember 5, 2002

Refer to AMD

’

s Website (www.amd.com) for the latest information.

Am29DL642G

128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only

Simultaneous Read/Write Flash Memory

DISTINCTIVE CHARACTERISTICS

■Two 64 Megabit (Am29DL640G ) in a single 63-ball 12

x 11 mm Fine-pitch BGA package (features are

described herein for each inte rnal Am29DL640G)

■Two Chip Ena ble inpu ts

— Two CE# inputs to control selection of each internal

Am29DL640G devices

■Single power supply operation

— 2.7 to 3.6 v olt read, erase, and program operations

■Simultaneous Read/Write op erations

— Data can be continuously read from one bank while

executing erase/program functions in another bank.

— Zero latency between read and write operations

■Flexible BankTM architecture

— Read may occur in any of the three banks not being

written or erased.

— Four banks may be grouped by customer to achieve

desired bank divisions.

■Boot Sectors

— Top and bottom boot sectors in the same device

— Any combination of s ectors can be erased

■SecSi™ (Secured Silicon) Sector SecSiTM (Secured

Silicon) Sector: Extra 256 Byte sector

—Factory locked and identifiable: 16 bytes available for

secure, random factory Electronic Serial Number;

verifiable as factory loc ked through autoselect

function. ExpressFlash option all o ws entire sector to

be available for factory-secured data

—Cus tomer lock able: One-time programmable only.

Once locked, data cannot be changed

■High performance

— 70 or 90 ns access time

■Manufactured on 0.17 µm process technol ogy

■CFI (Common Flash Interface) compliant

— Provides device-specific information to the system,

allowing host so ftware to easily reconfigure for

different Flash devices

■Ultra low power consumption (typical values at 3.0 V,

5 MHz) for the part

— 10 mA typical active read current

— 15 mA typical erase/program current

— 400 nA typical standby mode current

■Flexible sect or architec ture

— Two hundred fifty-six 32 Kword sectors

■Compatibility with JEDEC standards

— Except for the added CE2#, the Fine-pitch B GA is

pinout and software compatible w ith single-power

supply Flash

— Sup erio r inadvertent wr ite protection

■Minimum 1 m illion erase cycle guarantee per sector

■63-ball Fine-pitch BGA Package

SOFTWARE FEATURES

■Data Management Software (DMS)

— AMD-supplied software manages data programming,

enabling EEPROM emulation

— Eases historical sector erase flash limitations

■Suppo rts Commo n Flash Memory Interface (CFI)

■Erase Suspend/Erase Resume

— Suspends erase operations to allow reading from

other sectors in s ame bank

■Data# Polling and Toggle Bits

— Provides a software method of detecting the status of

program or erase cycles

■Unlock Bypass Program command

— Reduc es overall programming time when issuing

multiple program command sequences

HARDWARE FEATURES

■Ready/Busy# output (RY/BY#)

— Hardware method for detec ting program or erase

cycle completion

■Hardware reset pin (RESET#)

— Hardware method of resetting the internal state

machine to the read mode

■WP#/ACC input pin

— Write protect (WP#) function protects sectors 0, 1,

140, and 141, regardless of sector protect status

— Acceleration (ACC) function accelerates program

timing

■Sector protection

— Hardware method of locking a sector, either

in-system or using programming equipment, to

prevent any program or erase operation within that

sector

— Temporary Sector Unprotect allows changing data in

protected sectors in-system