MM74HC32MTCX - ON SEMICONDUCTOR

MM74HC32 — Quad 2-Input OR Gate

Publication Order Number:

MM74HC32/D

August- 2017, Rev. 2

MM74HC32

Quad 2-Input OR Gate

Features

■Typical propagation delay: 10ns

■Wide power supply range: 2V–6V

■Low quiescent current: 20µA maximum (74HC Series)

■Low input current: 1µA maximum

■Fanout of 10 LS-TTL loads

General Description

The MM74HC32 OR gates utilize advanced silicon-gate

CMOS technology to achieve operating speeds similar to

LS-TTL gates with the low power consumption of stan-

dard CMOS integrated circuits. All gates have buffered

outputs providing high noise immunity and the ability to

drive 10 LS-TTL loads. The 74HC logic family is func-

tionally as well as pin-out compatible with the standard

74LS logic family. All inputs are protected from damage

due to static discharge by internal diode clamps to VCC

and ground.

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Connection Diagram

Pin Assignments for DIP, SOIC, SOP and TSSOP

Top View

Logic Diagram

Y = A + B

(1 of 4)

Order Number

Package

Number Package Description

MM74HC32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

MM74HC32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC32MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC32N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

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MM74HC32 — Quad 2-Input OR Gate

Absolute Maximum Ratings(1)

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Notes:

1. Unless otherwise specified all voltages are referenced to ground.

2. Power Dissipation temperature derating — plastic “N” package: –12mW/°C from 65°C to 85°C.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor

does not recommend exceeding them or designing to absolute maximum ratings.

Symbol Parameter Rating

VCC Supply Voltage –0.5 to +7.0V

VIN DC Input Voltage –1.5 to VCC+1.5V

VOUT DC Output Voltage –0.5 to VCC+0.5V

IIK, IOK Clamp Diode Current ±20mA

IOUT DC Output Current, per pin ±25mA

ICC DC VCC or GND Current, per pin ±50mA

TSTG Storage Temperature Range –65°C to +150°C

PDPower Dissipation

Note 2 600mW

S.O. Package only 500mW

TLLead Temperature (Soldering 10 seconds) 260°C

Symbol Parameter Min. Max. Units

VCC Supply Voltage 2 6 V

VIN, VOUT DC Input or Output Voltage 0 VCC V

TAOperating Temperature Range –40 +85 °C

tr, tfInput Rise or Fall Times

VCC = 2.0V 1000 ns

VCC = 4.5V 500 ns

VCC = 6.0V 400 ns

MM74HC32 — Quad 2-Input OR Gate

DC Electrical Characteristics(3)

Note:

3. For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V

values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V

respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at

the higher voltage and so the 6.0V values should be used.

Symbol Parameter VCC (V) Conditions

TA = 25°C

TA = –40°C to

85°C

UnitsTyp Guaranteed Limits

VIH Minimum HIGH Level

Input Voltage

2.0 1.5 1.5 V

4.5 3.15 3.15

6.0 4.2 4.2

VIL Maximum LOW Level

Input Voltage

2.0 0.5 0.5 V

4.5 1.35 1.35

6.0 1.8 1.8

VOH Minimum HIGH Level

Output Voltage

2.0 VIN = VIH or VIL,

|IOUT| ≤ 20µA

2.0 1.9 1.9 V

4.5 4.5 4.4 4.4

6.0 6.0 5.9 5.9

4.5 VIN = VIH or VIL,

|IOUT| ≤ 4.0mA

4.7 3.98 3.84

6.0 |VIN = VIH or VIL,

|IOUT| ≤ 5.2mA

5.2 5.48 5.34

VOL Maximum LOW Level

Output Voltage

2.0 VIN = VIL,

|IOUT| ≤ 20 µA

0 0.1 0.1 V

4.5 0 0.1 0.1

6.0 0 0.1 0.1

4.5 VIN = VIL,

|IOUT| ≤ 4.0mA

0.2 0.26 0.33

6.0 VIN = VIL,

|IOUT| ≤ 5.2mA

0.2 0.26 0.33

IIN Maximum Input

Current

6.0 VIN = VCC or GND ±0.1 ±1.0 µA

ICC Maximum Quiescent

Supply Current

6.0 VIN = VCC or GND,

IOUT = 0µA

2.0 20 µA

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MM74HC32 — Quad 2-Input OR Gate

AC Electrical Characteristics

VCC = 5V, TA = 25°C, CL = 15pF, tr = tf = 6ns

AC Electrical Characteristics

VCC = 2.0V to 6.0V, CL = 50pF, tr = tf = 6ns (unless otherwise specified)

Note:

4. CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic

current consumption, IS = CPD VCC f + ICC.

Symbol Parameter Conditions Typ.

Guaranteed

Limit Units

tPHL, tPLH Maximum Propagation Delay 10 18 ns

Symbol Parameter VCC (V) Conditions

TA = 25°C

TA = –40°C

to 85°C

UnitsTyp Guaranteed Limits

tPHL, tPLH Maximum Propagation

Delay

2.0 30 100 125 ns

4.5 12 20 25

6.0 9 17 21

tTLH, tTHL Maximum Output Rise

and Fall Time

2.0 30 75 95 ns

4.5 8 15 19

6.0 7 13 16

CPD Power Dissipation

Capacitance(4) (per gate) 50 pF

CIN Maximum Input

Capacitance

510 10 pF

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