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LM2940QML 1A Low Dropout Regulator
Check for Samples: LM2940QML,LM2940QML-SP
1FEATURES DESCRIPTION
The LM2940 positive voltage regulator features the
2 Available with Radiation Ensure ability to source 1A of output current with a dropout
ELDRS Free 100 krad(Si) voltage of typically 0.5V and a maximum of 1V over
Dropout Voltage Typically 0.5V @IO= 1A the entire temperature range. Furthermore, a
quiescent current reduction circuit has been included
Output Current in Excess of 1A which reduces the ground current when the
Output Voltage Trimmed Before Assembly differential between the input voltage and the output
Reverse Battery Protection voltage exceeds approximately 3V. The quiescent
current with 1A of output current and an input-output
Internal Short Circuit Current Limit differential of 5V is therefore only 30 mA. Higher
Mirror Image Insertion Protection quiescent currents only exist when the regulator is in
the dropout mode (VIN VOUT 3V).
Designed also for vehicular applications, the LM2940
and all regulated circuitry are protected from reverse
battery installations or 2-battery jumps. During line
transients, such as load dump when the input voltage
can momentarily exceed the specified maximum
operating voltage, the regulator will automatically shut
down to protect both the internal circuits and the load.
The LM2940 cannot be harmed by temporary mirror-
image insertion. Familiar regulator features such as
short circuit and thermal overload protection are also
provided.
CONNECTION DIAGRAMS
Figure 1. 16-Lead Ceramic Surface-Mount Package (CFP) Top View
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2010–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM2940QML, LM2940QML-SP
SNVS389B MAY 2010REVISED MAY 2013
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Equivalent Schematic Diagram
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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Absolute Maximum Ratings(1)
Input Voltage (Survival Voltage 100mS) 60V
Internal Power Dissipation with no heat sink (TA= +25°C)(2) 1W
Maximum Junction Temperature 150°C
Storage Temperature Range 65°C TA+150°C
Lead Temperature (Soldering 10 seconds) 300°C
16LD CFP "WG" (device 01, 02) (Still Air) 122°C/W
16LD CFP "GW" (device 03, 04) (Still Air) 136°C/W
θJA 16LD CFP "WG" (device 01, 02) (500LF/Min Air flow) 77°C/W
Thermal Resistance 16LD CFP "GW" (device 03, 04) (500LF/Min Air flow) 87°C/W
16LD CFP "WG" (device 01, 02)(3) 5°C/W
θJC 16LD CFP "GW" (device 03, 04) 13°C/W
Package Weight CFP "WG" (device 01, 02) 360 mg
Package Weight CFP "GW" (device 03, 04) 410 mg
ESD Susceptibility(4) 4KV
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For specified specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature),
θJA (package junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any
temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. With heat sinking,
the maximum power is 5 Watts, but then this will depend upon the temperature of the heat sink, the efficiency of the heat sink, and the
efficiency of the heat flow between the package body and the heat sink. We can not predict these values.
(3) The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full
advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either
metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be
calculated using θJA, rather than θJC, thermal resistance. It must not be assumed that the device leads will provide substantial heat
transfer out of the package, since the thermal resistance of the lead frame material is very poor, relative to the material of the package
base. The stated θJC thermal resistance is for the package material only, and does not account for the additional thermal resistance
between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and
must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device.
(4) Human body model, 1.5 kΩin series with 100 pF.
Recommended Operating Conditions(1)
Input Voltage 26V
Temperature Range 55°C TA125°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. For specified specifications and test conditions, see the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
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Table 1. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A
Subgroup Description Temp °C
1 Static tests at +25
2 Static tests at +125
3 Static tests at -55
4 Dynamic tests at +25
5 Dynamic tests at +125
6 Dynamic tests at -55
7 Functional tests at +25
8A Functional tests at +125
8B Functional tests at -55
9 Switching tests at +25
10 Switching tests at +125
11 Switching tests at -55
12 Settling time at +25
13 Settling time at +125
14 Settling time at -55
LM2940-5.0 Electrical Characteristics SMD: 5962R8958701 DC Parameters
The following conditions apply, unless otherwise specified.
DC: VI= 10V, IO= 1A, CO= 22µF Sub-
Symbol Parameter Conditions Notes Min Max Unit groups
VO4.85 5.15 V 1
VIN = 10V, IOUT = 5mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 6V, IOUT = 5mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 7V, IOUT = 5mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 26V, IOUT = 5mA 4.75 5.25 V 2, 3
Output Voltage 4.85 5.15 V 1
VIN = 10V, IOUT = 1A 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 6V, IOUT = 1A 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 6V, IOUT = 50mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 10V, IOUT = 50mA 4.75 5.25 V 2, 3
Reverse Polarity Input Voltage DC RO= 100See(1) -15 V 1, 2, 3
IQ0.0 15 mA 1
VIN = 10V, IOUT = 5mA 0.0 20 mA 2, 3
0.0 15 mA 1
VIN = 7V, IOUT = 5mA 0.0 20 mA 2, 3
Quiescent Current 0.0 15 mA 1
VIN = 26V, IOUT = 5mA 0.0 20 mA 2, 3
0.0 50 mA 1
VIN = 10V, IOUT = 1A 0.0 100 mA 2, 3
(1) Functional test only.
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LM2940-5.0 Electrical Characteristics SMD: 5962R8958701 DC Parameters (continued)
The following conditions apply, unless otherwise specified.
DC: VI= 10V, IO= 1A, CO= 22µF Sub-
Symbol Parameter Conditions Notes Min Max Unit groups
VRLine -40 40 mV 1
Line Regulation 7V VIN 26V, IOUT = 5mA -50 50 mV 2, 3
VRLoad -50 50 mV 1
Load Regulation VIN = 10V, 50mA IOUT 1A -100 100 mV 2, 3
VDO 0.0 0.7 V 1
IOUT = 1A 0.0 1.0 V 2, 3
Dropout Voltage 0.0 200 mV 1
IOUT = 100mA 0.0 300 mV 2, 3
ISC 1.5 A 1
Short Circuit Current VIN = 10V 1.3 A 2, 3
LM2940-5.0 Electrical Characteristics SMD: 5962R8958701 AC Parameters
The following conditions apply, unless otherwise specified.
AC: VI= 10V, IO= 1A, CO= 22µF Sub-
Symbol Parameter Conditions Notes Min Max Unit groups
Max Line Transient VO6V, RO= 100, t = 20mS See(1) 40 V 1, 2, 3
Reverse Polarity Input Voltage t = 20mS, RO= 100See(1) -45 V 1, 2, 3
Transient
RR See(1) 60 dB 4
VIN = 10V, 1VRMS, ƒ = 1KHz,
Ripple Rejection IOUT = 5mA See(1) 50 dB 5, 6
NOVIN = 10V, IOUT = 5mA,
Output Noise Voltage See(1) 0.0 700 µVRMS 1, 2, 3
10Hz - 100KHz
ZOVIN = 10V, ƒO= 120Hz
Output Impedance See(1) 1.0 1, 2, 3
IOUT = 100mA DC and 20mA AC
(1) Functional test only.
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LM2940-5.0 Electrical Characteristics SMD: 5962R8958702 DC Parameters
The following conditions apply, unless otherwise specified.
DC: VI= 10V, IO= 1A, CO= 22µF Sub-
Symbol Parameter Conditions Notes Min Max Unit groups
VO4.85 5.15 V 1
VIN = 10V, IOUT = 5mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 6V, IOUT = 5mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 7V, IOUT = 5mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 26V, IOUT = 5mA 4.75 5.25 V 2, 3
Output Voltage 4.85 5.15 V 1
VIN = 10V, IOUT = 1A 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 6V, IOUT = 1A 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 6V, IOUT = 50mA 4.75 5.25 V 2, 3
4.85 5.15 V 1
VIN = 10V, IOUT = 50mA 4.75 5.25 V 2, 3
Reverse Polarity Input Voltage DC RO= 100See(1) -15 V 1, 2, 3
IQ0.0 15 mA 1
VIN = 10V, IOUT = 5mA 0.0 20 mA 2, 3
0.0 15 mA 1
VIN = 7V, IOUT = 5mA 0.0 20 mA 2, 3
Quiescent Current 0.0 15 mA 1
VIN = 26V, IOUT = 5mA 0.0 20 mA 2, 3
0.0 50 mA 1
VIN = 10V, IOUT = 1A 0.0 100 mA 2, 3
VRLine -40 40 mV 1
Line Regulation 7V VIN 26V, IOUT = 5mA -50 50 mV 2, 3
VRLoad -50 50 mV 1
Load Regulation VIN = 10V, 50mA IOUT 1A -100 100 mV 2, 3
VDO 0.0 0.7 V 1
IOUT = 1A 0.0 1.0 V 2, 3
Dropout Voltage 0.0 200 mV 1
IOUT = 100mA 0.0 300 mV 2, 3
ISC 1.5 A 1
Short Circuit Current VIN = 10V 1.3 A 2, 3
(1) Functional test only.
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LM2940-5.0 Electrical Characteristics SMD: 5962R8958702 AC Parameters
The following conditions apply, unless otherwise specified.
AC: VI= 10V, IO= 1A, CO= 22µF Sub-
Symbol Parameter Conditions Notes Min Max Unit groups
Max Line Transient VO6V, RO= 100, t = 20mS See(1) 40 V 1, 2, 3
Reverse Polarity Input Voltage t = 20mS, RO= 100See(1) -45 V 1, 2, 3
Transient
RR See(1) 60 dB 4
VIN = 10V, 1VRMS, ƒ = 1KHz,
Ripple Rejection IOUT = 5mA See(1) 50 dB 5, 6
NOVIN = 10V, IOUT = 5mA,
Output Noise Voltage See(1) 0.0 700 µVRMS 1, 2, 3
10Hz - 100KHz
ZOVIN = 10V, ƒO= 120Hz
Output Impedance See(1) 1.0 1, 2, 3
IOUT = 100mA DC and 20mA AC
(1) Functional test only.
LM2940-5.0 Electrical Characteristics SMD: 5962R8958702 DC Drift Parameters
The following conditions apply, unless otherwise specified.
DC: VI= 10V, IO= 1A, CO= 22µF, “Delta calculations performed on QMLV devices at group B, subgroup 5 only”
Sub-
Symbol Parameter Conditions Notes Min Max Unit groups
VOVIN = 10V, IOUT = 5mA -30 30 mV 1
VIN = 6V, IOUT = 5mA -30 30 mV 1
VIN = 7V, IOUT = 5mA -30 30 mV 1
VIN = 26V, IOUT = 5mA -30 30 mV 1
Output Voltage VIN = 10V, IOUT = 1A -30 30 mV 1
VIN = 6V, IOUT = 1A -30 30 mV 1
VIN = 6V, IOUT = 50mA -30 30 mV 1
VIN = 10V, IOUT = 50mA -30 30 mV 1
VRLOAD Load Regulation VIN = 10V, 50mA IOUT 1A -20 20 mV 1
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Typical Performance Characteristics
Dropout Voltage
Dropout Voltage vs. Temperature
Figure 2. Figure 3.
Output Voltage Quiescent Current
vs. Temperature vs. Temperature
Figure 4. Figure 5.
Quiescent Current Quiescent Current
Figure 6. Figure 7.
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Typical Performance Characteristics (continued)
Line Transient Response Load Transient Response
Figure 8. Figure 9.
Ripple Rejection Low Voltage Behavior
Figure 10. Figure 11.
Low Voltage Behavior Low Voltage Behavior
Figure 12. Figure 13.
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Typical Performance Characteristics (continued)
Output at Voltage Extremes Output at Voltage Extremes
Figure 14. Figure 15.
Output at Voltage Extremes Output Capacitor ESR
Figure 16. Figure 17.
Peak Output Current Output Impedance
Figure 18. Figure 19.
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Typical Application
*Required if regulator is located far from power supply filter.
**COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during
transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating
temperature range as the regulator and the ESR is critical; see curve.
APPLICATION HINTS
EXTERNAL CAPACITORS
The output capacitor is critical to maintaining regulator stability, and must meet the required conditions for both
ESR (Equivalent Series Resistance) and minimum amount of capacitance.
MINIMUM CAPACITANCE:
The minimum output capacitance required to maintain stability is 22 μF (this value may be increased without
limit). Larger values of output capacitance will give improved transient response.
ESR LIMITS:
The ESR of the output capacitor will cause loop instability if it is too high or too low. The acceptable range of
ESR plotted versus load current is shown in the graph below. It is essential that the output capacitor meet
these requirements, or oscillations can result.
Figure 20. Output Capacitor ESR Limits
It is important to note that for most capacitors, ESR is specified only at room temperature. However, the designer
must ensure that the ESR will stay inside the limits shown over the entire operating temperature range for the
design.
For aluminum electrolytic capacitors, ESR will increase by about 30X as the temperature is reduced from 25°C to
40°C. This type of capacitor is not well-suited for low temperature operation.
Solid tantalum capacitors have a more stable ESR over temperature, but are more expensive than aluminum
electrolytics. A cost-effective approach sometimes used is to parallel an aluminum electrolytic with a solid
Tantalum, with the total capacitance split about 75/25% with the Aluminum being the larger value.
If two capacitors are paralleled, the effective ESR is the parallel of the two individual values. The “flatter” ESR of
the Tantalum will keep the effective ESR from rising as quickly at low temperatures.
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HEATSINKING
A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of
the application. Under all possible operating conditions, the junction temperature must be within the range
specified under Absolute Maximum Ratings.
To determine if a heatsink is required, the power dissipated by the regulator, PD, must be calculated.
The figure below shows the voltages and currents which are present in the circuit, as well as the formula for
calculating the power dissipated in the regulator:
IIN = IL÷ IG
PD= (VIN VOUT) IL+ (VIN) IG
Figure 21. Power Dissipation Diagram
The next parameter which must be calculated is the maximum allowable temperature rise, TR(max). This is
calculated by using the formula:
TR(max) = TJ(max) TA(max)
where
TJ(max) is the maximum allowable junction temperature
TA(max) is the maximum ambient temperature which will be encountered in the application (1)
Using the calculated values for TR(max) and PD, the maximum allowable value for the junction-to-ambient
thermal resistance, θ(JA), can now be found:
θ(JA) = TR(max)/PD(2)
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REVISION HISTORY
Released Revision Section Changes
1 MDS data sheets converted into one Corp. data
sheet format added reference to New ELDRS device.
Change AC subgroups from 4, 5, 6, 7, 8A, 8B to 1, 2,
05/10/2010 A New Release, Corporate format 3 for parameters Max Line Transient, Reverse Polarity
Input Voltage Transient, Output Noise Voltage, Output
Impedance. To bring it into agreement with the SMD.
MNLM2940-5.0-X Rev 1A1 will be archived.
Ordering Information Added LM2940GW5.0/883,
LM2940GW5.0RLQV. Absolute Max Ratings
12/10/2010 B Ordering Information, Absolute Max Ratings Added Theta JA and Theta JC along with Package
Weight for 'GW' devices. LM2940QML Rev A will be
archived.
02/5/2013 B All layout of National Data Sheet to TI format
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PACKAGE OPTION ADDENDUM
www.ti.com 2-May-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
5962-8958703XA ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LM2940GW5.0
/883 Q
5962-89587
03XA ACO
03XA >T
5962R8958704VXA ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LM2940GW5.0
RLQMLV Q
5962R89587
04VXA ACO
04VXA >T
LM2940GW5.0/883 ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LM2940GW5.0
/883 Q
5962-89587
03XA ACO
03XA >T
LM2940GW5.0RLQV ACTIVE CFP NAC 16 42 TBD Call TI Call TI -55 to 125 LM2940GW5.0
RLQMLV Q
5962R89587
04VXA ACO
04VXA >T
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 2-May-2013
Addendum-Page 2
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2940QML, LM2940QML-SP :
Military: LM2940QML
Space: LM2940QML-SP
NOTE: Qualified Version Definitions:
Military - QML certified for Military and Defense Applications
Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
MECHANICAL DATA
NAC0016A
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WG16A (RevG)
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