5.5 GHz to 8.6 GHz,
GaAs, MMIC, I/Q Upconverter
Data Sheet
HMC6505A
Rev. 0 Document Feedback
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FEATURES
Conversion gain: 15 dB typical
Sideband rejection: 22 dBc typical
Output P1dB compression at maximum gain: 22 dBm typical
Output IP3 at maximum gain: 35 dBm typical
LO to RF isolation: 4 dB typical
LO to IF isolation: 9 dB typical
RF return loss: 20 dB typical
LO return loss: 10 dB typical
IF return loss: 20 dB typical
Exposed paddle, 5 mm × 5 mm, 32-terminal, leadless chip
carrier package
APPLICATIONS
Point to point and point to multipoint radios
Military radars, electronic warfare (EW), and electronic
intelligence (ELINT)
Satellite communications
Sensors
FUNCTIONAL BLOCK DIAGRAM
EPADHMC6505A
VDD1
LOIN
GND
VCTRL
GND
IF1
GND
IF2
GND
VDD3
VDD2
VGG
GND
RFOUT
GND
13900-001
Figure 1.
GENERAL DESCRIPTION
The HMC6505A is a compact gallium arsenide (GaAs),
pseudomorphic (pHEMT), monolithic microwave integrated
circuit (MMIC) upconverter in a RoHS compliant package that
operates from 5.5 GHz to 8.6 GHz. This device provides a small
signal conversion gain of 15 dB with 22 dBc of sideband
rejection. The HMC6505A uses a variable gain amplifier (VGA)
preceded by an in-phase and quadrature (I/Q) mixer that is
driven by an active local oscillator (LO). The IF1 and IF2 mixer
inputs are provided, and an external 90° hybrid is needed to
select the required sideband. The I/Q mixer topology reduces
the need for filtering of unwanted sideband. The HMC6505A
is a smaller alternative to hybrid style single sideband (SSB)
upconverter assemblies, and it eliminates the need for wire
bonding by allowing the use of surface-mount manufacturing
techniques.
The HMC6505A is available in 5 mm × 5 mm, 32-terminal
leadless chip carrier (LCC) package and operates over a −40°C
to +85°C temperature range. An evaluation board for the
HMC6505A is also available upon request.
HMC6505A Data Sheet
Rev. 0 | Page 2 of 30
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Interface Schematics..................................................................... 6
Typical Performance Characteristics ............................................. 7
IF = 350 MHz, IF Input Power = −6 dBm, Lower Sideband
(High-Side LO) ............................................................................. 7
IF = 1000 MHz, IF Input Power = −6 dBm, Lower Sideband
(High-Side LO) ............................................................................. 9
IF= 2500 MHz, IF Input Power = −6 dBm, Lower Sideband
(High-Side LO) ........................................................................... 11
IF = 350 MHz, IF Input Power = −6 dBm, Upper Sideband
(Low-Side LO) ............................................................................ 14
IF = 1000 MHz, IF Input Power = −6 dBm, Upper Sideband
(Low-Side LO) ............................................................................ 16
IF= 2500 MHz, IF Input Power = −6 dBm, Upper Sideband
(Low-Side LO) ............................................................................ 18
Isolation and Return Loss ......................................................... 20
IF Bandwidth Performance: Lower Sideband (High-Side LO) . 23
Spurious Performance ............................................................... 24
Theory of Operation ...................................................................... 26
Applications Information .............................................................. 27
Typical Application Circuit ....................................................... 27
Evaluation Board Information.................................................. 28
Outline Dimensions ....................................................................... 30
Ordering Guide .......................................................................... 30
REVISION HISTORY
8/2017—Revision 0: Initial Version
Data Sheet HMC6505A
Rev. 0 | Page 3 of 30
SPECIFICATIONS
TA = 25°C, IF = 350 MHz, VDDx = 5 V, VCTRL = −4 V, LO power = 4 dBm. Measurements performed with lower sideband selected and
external 90° hybrid at the IF ports, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit
OPERATING CONDITIONS
Frequency Range
Radio Frequency RF 5.5 8.6 GHz
Local Oscillator LO 2.5 11.6 GHz
Intermediate Frequency IF DC 3 GHz
Control Voltage Range VCTRL −4 0 V
LO Drive Range −2 +4 +6 dBm
PERFORMANCE
Conversion Gain 12 15 dB
Dynamic Range 20 25 dB
Sideband Rejection 18 22 dBc
Output Power for 1 dB Compression at Maximum Gain OP1dB 22 dBm
Output Third-Order Intercept at Maximum Gain OIP3 31 35 dBm
Isolation
LO to RF −1 +4 dB
LO to IF 9 dB
Noise Figure NF 15 dB
Return Loss
RF 20 dB
LO 10 dB
IF 20 dB
POWER SUPPLY
Total Supply Current
LO Amplifier IDD1 125 mA
RF Amplifier IDD2, IDD3 120 mA
HMC6505A Data Sheet
Rev. 0 | Page 4 of 30
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Drain Bias Voltage (VDD1, VDD2, and VDD3) 5.5 V
Gate Bias Voltage
VGG −3 V to 0 V
VCTRL −5 V to +0.3 V
Input Power
LO 10 dBm
IF 20 dBm
Moisture Sensitivity Level (MSL) Rating1 MSL3
Maximum Junction Temperature 175°C
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Reflow Temperature 260°C
Electrostatic Discharge Sensitivity
Human Body Model (HBM) 500 V
Field Induced Charged Device Model
(FICDM)
750 V
1 See the Ordering Guide.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Table 3. Thermal Resistance
Package Type
θ
JA
θ
JC
Unit
E-32-11 66.7 54.6 °C/W
1 Thermal impedance simulated values are based on JEDEC 2S2P test board
with 5 × 5 thermal vias. Refer to JDEC standard JESD51-2 for additional
information.
ESD CAUTION
Data Sheet HMC6505A
Rev. 0 | Page 5 of 30
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
HMC6505A
TOP VI EW
(Not to Scale)
1
3
4
2
NIC
NIC
NIC
NIC 5
6
VDD1
NIC 7
LOIN 8GND
25 NIC
26 VCTRL
27 GND
28 IF1
29 GND
30 IF2
31 GND
32 NIC
17 NIC
18 VDD3
19 NIC
20 NIC
21 NIC
22 NIC
23 VDD2
24 NIC
N
OTES
1
. NOT INTERNALLY CONNECTED. THESE PINS
ARE NOT CONNECT ED I NTERNALLY. HOWEVER,
PI NS MAY BE CONNE CTED TO RF/ DC GROUND
WIT HOUT AFFE CTI NG PE RFORMANCE.
2
. EXPOSED P AD. CO NNE CT T O A L OW IMP E DANCE
TH ER M AL AND ELECTRICAL G ROUND PLANE.
9NIC
12VGG 11
NIC 10
NIC
13
GND 14
RFOUT 15
GND 16
NIC
13900-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 to 4, 6, 9 to 11, 16,
17, 19 to 22, 24,
25, 32
NIC Not Internally Connected. These pins are not connected internally. However, pins may be connected
to RF/dc ground without affecting performance.
5 VDD1
Power Supply Voltage for LO Amplifier. See Figure 3 for the interface schematic. Refer to the typical
application circuit (see Figure 103) for the required external components.
7 LOIN
Local Oscillator Input. See Figure 4 for the interface schematic. This pin is ac-coupled and matched
to 50 Ω.
8, 13, 15, 27, 29, 31 GND Ground Connect. See Figure 5 for the interface schematic. These pins and package bottom must be
connected to RF/dc ground.
12 VGG
Gate Voltage for the Variable Gain Amplifier. See Figure 6 for the interface schematic. Refer to the
typical application circuit (see Figure 103) for the required external components.
14 RFOUT
Radio Frequency Output. See Figure 7 for the interface schematic. This pin is ac-coupled and
matched to 50 Ω.
18, 23 VDD3, VDD2 Power Supply Voltage for the Variable Gain Amplifier. See Figure 8 for the interface schematic. Refer
to the typical application circuit (see Figure 103) for the required external components.
26 VCTRL
Gain Control Voltage for the Variable Gain Amplifier. See Figure 9 for the interface schematic. Refer to
the typical application circuit (see Figure 103) for the required external components.
28, 30 IF1, IF2 Quadrature Intermediate Frequency Inputs. See Figure 10 for the interface schematic. For applications
not requiring operation to dc, use an off chip dc blocking capacitor. For operation to dc, these pins
must not source or sink more than ±3 mA of current or device malfunction and failure can result.
EPAD Exposed Pad. Connect to a low impedance thermal and electrical ground plane.
HMC6505A Data Sheet
Rev. 0 | Page 6 of 30
INTERFACE SCHEMATICS
VDD1
13900-003
Figure 3. VDD1 Interface
LOIN
13900-004
Figure 4. LOIN Interface
GND
13900-005
Figure 5. GND Interface
VGG
13900-006
Figure 6. VGG Interface
RFOUT
13900-007
Figure 7. RFOUT Interface
VDD2, VDD3
13900-008
Figure 8. VDD2, VDD3 Interface
VCTRL
13900-009
Figure 9. VCTRL Interface
IF1, IF2
13900-010
Figure 10. IF1, IF2 Interface
Data Sheet HMC6505A
Rev. 0 | Page 7 of 30
TYPICAL PERFORMANCE CHARACTERISTICS
IF = 350 MHz, IF INPUT POWER = −6 dBm, LOWER SIDEBAND (HIGH-SIDE LO)
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-011
Figure 11. Conversion Gain vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-012
Figure 12. Conversion Gain vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
20
15
–10
–5.0 0
CONVERSION GAIN (dB)
VOLTAGE CONTROL (V)
–5
0
5
10
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-013
Figure 13. Conversion Gain vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
40
0
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-014
SIDEBAND REJECTION (dBc)
Figure 14. Sideband Rejection vs. RF Frequency over Temperatures,
Voltage Control = −4 V
40
0
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
13900-015
SIDEBAND REJECTION (dBc)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 15. Sideband Rejection vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
25
0
SIDEBAND REJECTION (dBc)
5
10
15
20
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-016
Figure 16. Sideband Rejection vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
HMC6505A Data Sheet
Rev. 0 | Page 8 of 30
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-017
Figure 17. Output IP3 vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-018
Figure 18. Output IP3 vs. RF Frequency over LO Powers
TA = 25°C, Voltage Control = −4 V
50
0
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
40
45
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-019
Figure 19. Output IP3 vs. Voltage Control over RF Frequencies,
TA = 25°C, LO Power = 4 dBm
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-020
Figure 20. Output P1dB vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-021
Figure 21. Output P1dB vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
Data Sheet HMC6505A
Rev. 0 | Page 9 of 30
IF = 1000 MHz, IF INPUT POWER = −6 dBm, LOWER SIDEBAND (HIGH-SIDE LO)
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-022
Figure 22. Conversion Gain vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-023
Figure 23. Conversion Gain vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
20
–10
CONVERSION GAIN (dB)
–5
0
5
10
15
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-024
Figure 24. Conversion Gain vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
40
0
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-025
SIDEBAND REJECTION (dBc)
Figure 25. Sideband Rejection vs. RF Frequency over Temperatures,
Voltage Control = −4 V
40
0
SIDEBAND REJECTION (dBc)
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
13900-026
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 26. Sideband Rejection vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
40
0
SIDEBAND REJECTION (dBc)
5
10
15
20
25
30
35
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-027
Figure 27. Sideband Rejection vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
HMC6505A Data Sheet
Rev. 0 | Page 10 of 30
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-028
Figure 28. Output IP3 vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-029
Figure 29. Output IP3 vs. RF Frequency over LO Powers
TA = 25°C, Voltage Control = −4 V
50
0
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
40
45
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-030
Figure 30. Output IP3 vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-031
Figure 31. Output P1dB vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-032
Figure 32. Output P1dB vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
Data Sheet HMC6505A
Rev. 0 | Page 11 of 30
IF= 2500 MHz, IF INPUT POWER = −6 dBm, LOWER SIDEBAND (HIGH-SIDE LO)
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-034
Figure 33. Conversion Gain vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-035
Figure 34. Conversion Gain vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
20
–10
CONVERSION GAIN (dB)
–5
0
5
10
15
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-036
Figure 35. Conversion Gain vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
40
0
SIDEBAND REJECTION (dBc)
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-037
Figure 36. Sideband Rejection vs. RF Frequency over Temperatures,
Voltage Control = −4 V
40
0
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
13900-038
SIDEBAND REJECTION (dBc)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 37. Sideband Rejection vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
50
0
5
10
15
20
25
30
35
40
45
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-039
SIDEBAND REJECTION (dBc)
Figure 38. Sideband Rejection vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
HMC6505A Data Sheet
Rev. 0 | Page 12 of 30
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-040
Figure 39. Output IP3 vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-041
Figure 40. Output IP3 vs. RF Frequency over LO Powers
TA = 25°C, Voltage Control = −4 V
50
0
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
40
45
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-042
Figure 41. Output IP3 vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-043
Figure 42. Output P1dB vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-044
Figure 43. Output P1dB vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
Data Sheet HMC6505A
Rev. 0 | Page 13 of 30
0
2
4
6
8
10
12
14
16
18
20
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
NOISE FIGURE (dB)
RF FREQUENCY (GHz)
–40°C
+25°C
+85°C
13900-244
Figure 44. Noise Figure vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
0
2
4
6
8
10
12
14
16
18
20
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
NOISE FIGURE (dB)
RF FREQUENCY (GHz)
13900-245
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 45. Noise Figure vs. RF Frequency over LO Powers
TA = 25°C, Voltage Control = −4 V
HMC6505A Data Sheet
Rev. 0 | Page 14 of 30
IF = 350 MHz, IF INPUT POWER = −6 dBm, UPPER SIDEBAND (LOW-SIDE LO)
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-046
Figure 46. Conversion Gain vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-047
Figure 47. Conversion Gain vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
20
–10
CONVERSION GAIN (dB)
–5
0
5
10
15
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-048
Figure 48. Conversion Gain vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
40
0
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-049
SIDEBAND REJECTION (dBc)
Figure 49. Sideband Rejection vs. RF Frequency over Temperatures,
Voltage Control = −4 V
40
0
5
10
15
20
25
30
35
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
13900-050
SIDEBAND REJECTION (dBc)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 50. Sideband Rejection vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
40
0
5
10
15
20
25
30
35
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-051
SIDEBAND REJECTION (dBc)
Figure 51. Sideband Rejection vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
Data Sheet HMC6505A
Rev. 0 | Page 15 of 30
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-052
Figure 52. Output IP3 vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-053
Figure 53. Output IP3 vs. RF Frequency over LO Powers
TA = 25°C, Voltage Control = −4 V
50
0
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
40
45
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-054
Figure 54. Output IP3 vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-055
Figure 55. Output P1dB vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-056
Figure 56. Output P1dB vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
HMC6505A Data Sheet
Rev. 0 | Page 16 of 30
IF = 1000 MHz, IF INPUT POWER = −6 dBm, UPPER SIDEBAND (LOW-SIDE LO)
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-057
Figure 57. Conversion Gain vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.5 9.0
CONVERSION GAIN (dB)
RF FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-058
Figure 58. Conversion Gain vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
20
–10
CONVERSION GAIN (dB)
–5
0
5
10
15
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-059
Figure 59. Conversion Gain vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
40
0
5
10
15
20
25
30
35
50
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-060
SIDEBAND REJECTION (dBc)
Figure 60. Sideband Rejection vs. RF Frequency over Temperatures,
Voltage Control = −4 V
50
0
5
10
15
20
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
13900-061
SIDEBAND REJECTION (dBc)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 61. Sideband Rejection vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
60
0
SIDEBAND REJECTION (dBc)
10
20
30
40
50
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-062
Figure 62. Sideband Rejection vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
Data Sheet HMC6505A
Rev. 0 | Page 17 of 30
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-063
Figure 63. Output IP3 vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
50
20
OUTPUT IP3 (dBm)
25
30
35
40
45
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-064
Figure 64. Output IP3 vs. RF Frequency over LO Powers
TA = 25°C, Voltage Control = −4 V
50
0
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
40
45
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
RF = 5.5GHz
13900-065
Figure 65. Output IP3 vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-066
Figure 66. Output P1dB vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
5.5 9.0
RF FREQUENCY (GHz)
6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-067
Figure 67. Output P1dB vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
HMC6505A Data Sheet
Rev. 0 | Page 18 of 30
IF= 2500 MHz, IF INPUT POWER = −6 dBm, UPPER SIDEBAND (LOW-SIDE LO)
6.5 7.0 7.5 8.0 8.5 9.0
20
0
CONVERSION GAIN (dB)
2
4
6
8
10
12
14
16
18
+85°C
+25°C
–40°C
RF FREQUENCY (GHz)
13900-068
Figure 68. Conversion Gain vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
6.5 7.0 7.5 8.0 8.5 9.0
20
0
CONVERSION GAIN (dB)
2
4
6
8
10
12
14
16
18
RF FREQUENCY (GHz)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-069
Figure 69. Conversion Gain vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
20
–15
–10
–5
0
5
10
15
–5.0 0–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
13900-070
VOLTAGE CONTROL (V)
CONVERSION GAIN (dB)
Figure 70. Conversion Gain vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
70
20
6.5 7.0 7.5 8.0 8.5 9.0
RF FREQUENCY (GHz)
+85°C
+25°C
–40°C
25
30
35
40
45
50
55
60
65
13900-071
SIDEBAND REJECTION (dBc)
Figure 71. Sideband Rejection vs. RF Frequency over Temperatures,
Voltage Control = −4 V
70
20
6.5 7.0 7.5 8.0 8.5 9.0
RF FREQUENCY (GHz)
25
30
35
40
45
50
55
60
65
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-072
SIDEBAND REJECTION (dBc)
Figure 72. Sideband Rejection vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
80
20
SIDEBAND REJECTION (dBc)
25
30
35
40
45
50
55
60
65
70
75
–5.0 0
VOLTAGE CONTROL (V)
–4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
13900-073
Figure 73. Sideband Rejection vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
Data Sheet HMC6505A
Rev. 0 | Page 19 of 30
50
10
OUTPUT IP3 (dBm)
15
20
25
30
35
40
45
6.5 7.0 7.5 8.0 8.5 9.0
RF FREQUENCY (GHz)
+85°C
+25°C
–40°C
13900-074
Figure 74. Output IP3 vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
50
10
OUTPUT IP3 (dBm)
15
20
25
30
35
40
45
6.5 7.0 7.5 8.0 8.5 9.0
RF FREQUENCY (GHz)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-075
Figure 75. Output IP3 vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
50
0
–5.0 0
5
10
15
20
25
30
35
40
45
–4.5 –4.0 –3.5 –3.0 –2.5
VOLTAGE CONTROL (V)
OUTPUT IP3 (dBm)
–2.0 –1.5 –1.0 –0.5
RF = 8.5GHz
RF = 7.5GHz
RF = 6.5GHz
13900-076
Figure 76. Output IP3 vs. Voltage Control over RF,
TA = 25°C, LO Power = 4 dBm
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
6.5 7.0 7.5 8.0 8.5 9.0
RF FREQUENCY (GHz)
+85°C
+25°C
–40°C
13900-077
Figure 77. Output P1dB vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
10
OUTPUT P1dB (dBm)
12
14
16
18
20
22
24
26
28
6.5 7.0 7.5 8.0 8.5 9.0
RF FREQUENCY (GHz)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-078
Figure 78. Output P1dB vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
HMC6505A Data Sheet
Rev. 0 | Page 20 of 30
ISOLATION AND RETURN LOSS
20
0
5.0 10.0
LO TO IF1 ISOLATION (dB)
LO FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5
+85°C
+25°C
–40°C
13900-081
Figure 79. LO to IF1 Isolation vs. LO Frequency over Temperatures,
IF = 350 MHz, LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.0 10.0
LO TO IF2 ISOLATION (dB)
LO FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5
+85°C
+25°C
–40°C
13900-082
Figure 80. LO to IF2 Isolation vs. LO Frequency over Temperatures,
IF = 350 MHz, LO Power = 4 dBm, Voltage Control = −4 V
25
0
5.0 9.0
LO TO RF ISOLATION (dB)
LO FREQUENCY (GHz)
5
10
15
20
5.5 6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-083
Figure 81. LO to RF Isolation vs. LO Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
20
0
5.0 10.0
LO TO IF1 ISOLATION (dB)
LO FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-084
Figure 82. LO to IF1 Isolation vs. LO Frequency over LO Powers, TA = 25°C,
Voltage Control = −4 V
20
0
5.0 10.0
LO TO IF2 ISOLATION (dB)
LO FREQUENCY (GHz)
2
4
6
8
10
12
14
16
18
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5
13900-085
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 83. LO to IF2 Isolation vs. LO Frequency over LO Powers, TA = 25°C,
Voltage Control = −4 V
25
20
10
15
5
0
LO TO RF ISOLATION (dB)
5.0 9.0
LO FREQUENCY (GHz)
5.5 6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-086
Figure 84. LO to RF Isolation vs. LO Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
Data Sheet HMC6505A
Rev. 0 | Page 21 of 30
30
40
50
60
70
80
90
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
IF1 TO RF ISOLATION (dB)
RF FREQUENCY (GHz)
–40°C
+25°C
+85°C
13900-287
Figure 85. IF1 to RF Isolation vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
40
50
60
70
80
90
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
IF2 TO RF ISOLATION (dB)
RF FREQUENCY (GHz)
–40°C
+25°C
+85°C
13900-288
Figure 86. IF2 to RF Isolation vs. RF Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
0
–25
LO RETURN LOSS (dB)
5.0 9.0
LO FREQUENCY (GHz)
5.5 6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
–20
–15
–10
–5
13900-088
Figure 87. LO Return Loss vs. LO Frequency over Temperatures,
LO Power = 4 dBm, Voltage Control = −4 V
30
35
40
45
50
55
60
65
70
75
80
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
IF1 TO RF ISOLATION (dB)
RF FREQUENCY (GHz)
13900-290
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 88. IF1 to RF Isolation vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0
0
10
20
30
40
50
60
70
80
90
IF2 TO RF ISOLATION (dB)
RF FREQUENCY (GHz)
13900-291
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
Figure 89. IF2 to RF Isolation vs. RF Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
0
–25
LO RETURN LOSS (dB)
–20
–15
–10
–5
5.0 9.0
LO FREQUENCY (GHz)
5.5 6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-091
Figure 90. LO Return Loss vs. LO Frequency over LO Powers,
TA = 25°C, Voltage Control = −4 V
HMC6505A Data Sheet
Rev. 0 | Page 22 of 30
0
–30
RF RETURN LOSS (dB)
–25
–20
–15
–10
–5
5.0 9.0
RF FREQUENCY (GHz)
5.5 6.0 6.5 7.0 7.5 8.0 8.5
+85°C
+25°C
–40°C
13900-089
Figure 91. RF Return Loss vs. RF Frequency over Temperatures,
LO Frequency = 7 GHz, LO Power = 4 dBm, Voltage Control = −4 V
0
–30
RF RETURN LOSS (dB)
–25
–20
–15
–10
–5
5.0 9.0
RF FREQUENCY (GHz)
5.5 6.0 6.5 7.0 7.5 8.0 8.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-092
Figure 92. RF Return Loss vs. RF Frequency over LO Powers,
LO Frequency = 7 GHz, TA = 25°C, Voltage Control = −4 V
04.0
IF FREQUENCY (GHz)
0
–50
IF1 RETURN LOSS (dB)
–45
–40
–35
–30
–25
–20
–15
–10
–5
0.5 1.0 1.5 2.0 2.5 3.0 3.5
+85°C
+25°C
–40°C
13900-093
Figure 93. IF1 Return Loss vs. IF Frequency over Temperatures,
LO Frequency = 7 GHz, LO Power = 4 dBm, Voltage Control = −4 V
04.0
IF FREQUENCY (GHz)
0
–50
IF2 RETURN LOSS (dB)
–45
–40
–35
–30
–25
–20
–15
–10
–5
0.5 1.0 1.5 2.0 2.5 3.0 3.5
+85°C
+25°C
–40°C
13900-094
Figure 94. IF2 Return Loss vs. IF Frequency over Temperatures,
LO Frequency = 7 GHz, LO Power = 4 dBm, Voltage Control = −4 V
04.0
IF FREQUENCY (GHz)
0
–50
IF1 RETURN LOSS (dB)
–45
–40
–35
–30
–25
–20
–15
–10
–5
0.5 1.0 1.5 2.0 2.5 3.0 3.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-095
Figure 95. IF1 Return Loss vs. IF Frequency over LO Powers,
LO Frequency = 7 GHz, TA = 25°C, Voltage Control = −4 V
04.0
IF FREQUENCY (GHz)
0
–50
IF2 RETURN LOSS (dB)
–45
–40
–35
–30
–25
–20
–15
–10
–5
0.5 1.0 1.5 2.0 2.5 3.0 3.5
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-096
Figure 96. IF2 Return Loss vs. IF Frequency over LO Powers,
LO Frequency = 7 GHz, TA = 25°C, Voltage Control = −4 V
Data Sheet HMC6505A
Rev. 0 | Page 23 of 30
IF BANDWIDTH PERFORMANCE: LOWER SIDEBAND (HIGH-SIDE LO)
0.3 3.3
IF FREQUENCY (GHz)
+85°C
+25°C
–40°C
20
0
CONVERSION GAIN (dB)
2
4
6
8
10
12
14
16
18
0.8 1.3 1.8 2.3 2.8
13900-097
Figure 97. Conversion Gain vs. IF Frequency over Temperatures,
LO Frequency = 7 GHz, LO Power = 4 dBm, Voltage Control = −4 V
40
0
0.3 3.3
SIDEBAND REJECTION (dBc)
5
10
15
20
25
30
35
0.8 1.3 1.8 2.3 2.8
IF FREQUENCY (GHz)
+85°C
+25°C
–40°C
13900-098
Figure 98. Sideband Rejection vs. IF Frequency over Temperatures,
LO Frequency = 7 GHz, LO Power = 4 dBm, Voltage Control = −4 V
40
0
0.3 3.3
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
0.8 1.3 1.8 2.3 2.8
IF FREQUENCY (GHz)
+85°C
+25°C
–40°C
13900-099
Figure 99. Output IP3 vs. IF Frequency over Temperatures,
LO Frequency = 7 GHz, LO Power = 4 dBm, Voltage Control = −4 V
0.3 3.3
IF FREQUENCY (GHz)
20
0
CONVERSION GAIN (dB)
2
4
6
8
10
12
14
16
18
0.8 1.3 1.8 2.3 2.8
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-100
Figure 100. Conversion Gain vs. IF Frequency over LO Powers,
LO Frequency = 7 GHz, TA = 25°C, Voltage Control = −4 V
40
0
0.3 3.3
SIDEBAND REJECTION (dBc)
5
10
15
20
25
30
35
0.8 1.3 1.8 2.3 2.8
IF FREQUENCY (GHz)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-101
Figure 101. Sideband Rejection vs. IF Frequency over LO Powers,
LO Frequency = 7 GHz, TA = 25°C, Voltage Control = −4 V
40
0
0.3 3.3
OUTPUT IP3 (dBm)
5
10
15
20
25
30
35
0.8 1.3 1.8 2.3 2.8
IF FREQUENCY (GHz)
–2dBm
0dBm
+2dBm
+4dBm
+6dBm
13900-102
Figure 102. Output IP3 vs. IF Frequency over LO Powers,
LO Frequency = 7 GHz, TA = 25°C, Voltage Control = −4 V
HMC6505A Data Sheet
Rev. 0 | Page 24 of 30
SPURIOUS PERFORMANCE
Mixer spurious products are measured in dBc from the RF
output power level. Spur values are (M × IF) − (N × LO). N/A
means not applicable.
M × N Spurious Outputs, IF = 350 MHz
RF = 5500 MHz, LO frequency = 5850 MHz at LO input power =
4 dBm, IF input power = −6 dBm.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 11 3 18 41 53
1 75 0 38 36 50 62
2 79 51 34 61 60 81
3 100 73 78 60 87 81
4
101 88 80 94 86 111
5 121 102 108 98 111 101
RF = 7000 MHz, LO frequency = 7350 MHz at LO input power =
4 dBm, IF input power = −6 dBm.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 13 8 44 51 57
1 79 0 43 39 73 75
2 78 51 34 73 67 94
3
105
72
86
65
98
87
4 118 82 96 105 93 103
5 122 91 107 111 108 105
RF = 8500 MHz, LO frequency = 8850 MHz at LO input power =
4 dBm, IF input power = −6 dBm. N/A is not applicable.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 8 21 53 53 N/A
1 76 0 27 56 68 N/A
2 81 50 36 61 83 N/A
3 104 95 79 71 92 N/A
4
114 83 101 105 99 N/A
5 120 92 111 108 103 N/A
M × N Spurious Output, IF = 1000 MHz
RF = 5500 MHz, LO frequency = 6500 MHz at LO input power =
4 dBm, IF input power = −6 dBm.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 7 8 57 43 59
1 49 0 37 39 66 72
2 63 55 33 60 66 90
3 83 82 69 65 84 90
4
95 120 100 97 91 104
5 112 121 109 113 108 108
RF = 7000 MHz, LO frequency = 8000 MHz at LO input power =
4 dBm, IF input power = −6 dBm.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 7 11 43 59 71
1 50 0 40 43 74 79
2 66 44 35 68 73 91
3
88
85
71
67
98
92
4 80 80 81 100 96 104
5 85 88 79 101 113 107
RF = 8500 MHz, LO frequency = 9500 MHz at LO input power =
4 dBm, IF input power = −6 dBm. N/A is not applicable.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 8 41 63 66 N/A
1 50 0 31 77 88 N/A
2 66 44 38 63 81 N/A
3 101 82 74 72 93 N/A
4
105 105 108 107 102 N/A
5 120 118 112 109 107 N/A
Data Sheet HMC6505A
Rev. 0 | Page 25 of 30
M × N Spurious Outputs, IF = 2500 MHz
RF = 5500 MHz, LO frequency = 8000 MHz at LO input power =
4 dBm, IF input power = −6 dBm.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 6 10 41 57 70
1 43 0 34 42 70 79
2 57 64 34 64 78 93
3 76 113 80 65 87 92
4
97 115 94 96 94 107
5 116 115 119 112 110 113
RF = 7000 MHz, LO frequency = 9500 MHz at LO input power =
4 dBm, IF input power = −6 dBm. N/A is not applicable.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 7 41 62 67 N/A
1 46 0 36 73 84 N/A
2 57 56 37 63 103 N/A
3
108
87
83
69
104
101
4 100 122 101 112 101 101
5 115 121 118 112 111 106
RF = 8500 MHz, LO frequency = 11000 MHz at LO input
power = 4 dBm, IF input power = −6 dBm. N/A is not
applicable.
N × LO
0 1 2 3 4 5
M × IF
0 N/A 7 59 46 N/A N/A
1 47 0 39 80 N/A N/A
2 50 54 40 73 97 N/A
3 92 83 83 77 98 N/A
4 109 120 105 108 104 N/A
5 113 120 115 109 104 N/A
HMC6505A Data Sheet
Rev. 0 | Page 26 of 30
THEORY OF OPERATION
The HMC6505A is a GaAs, pHEMT, MMIC I/Q upconverter
with an integrated LO buffer that upconverts IF between dc to
3 GHz to RF between 5.5 GHz and 8.6 GHz. LO buffer
amplifiers are included on chip to allow LO drive range of up
to 6 dBm for full performance. The LO path feeds a quadrature
splitter followed by on-chip baluns that drive the I and Q singly
balanced cores of the passive mixers. The RF output of the I and
Q mixers are then summed through an on-chip Wilkinson power
combiner and relatively matched to provide a single-ended, 50 Ω
output signal that is amplified by the RF amplifiers to produce a
dc-coupled and 50 Ω matched RF output signal at the RFOUT
port. A voltage attenuator precedes the RF amplifiers for desired
gain control.
Data Sheet HMC6505A
Rev. 0 | Page 27 of 30
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
Figure 103 shows the typical application circuit for the
HMC6505A. To select the appropriate sideband, an external 90°
hybrid is required. For applications not requiring operation to
dc, use an off chip dc blocking capacitor. For applications that
require the LO signal at the output to be suppressed, use a bias
tee or RF feed. Ensure that the source or sink current used for
LO suppression is <3 mA for each IF port to prevent damage to
the device. The common-mode voltage for each IF port is 0 V.
To select the upper sideband, connect the IF1 pin to the 90°
port of the hybrid and the IF2 pin to the 0° port of the hybrid.
To select the lower sideband, connect the IF1 pin to the 0° port
of the hybrid and the IF2 pin to the 90° port of the hybrid.
13900-103
HMC6505A
Figure 103. Typical Application Circuit
HMC6505A Data Sheet
Rev. 0 | Page 28 of 30
EVALUATION BOARD INFORMATION
The circuit board used in the application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance and
connect the package ground leads and exposed pad directly to
the ground plane similarly to that shown in Figure 104. Use a
sufficient number of via holes to connect the top and bottom
ground planes. The evaluation board shown in Figure 106 is
available from Analog Devices upon request.
EV1HMC6505ALC5 Power-On Sequence
To set up the EV1HMC6505ALC5, take the following steps:
1. Power up VGG with a −2 V supply.
2. Power up VDD1 with a 5 V supply.
3. Power up VDD2 and VDD3 with another 5 V supply.
4. Power up VCTRL with a −4 V supply (for maximum
conversion gain).
5. Adjust the VGG supply between −2 V to 0 V until the total
RF supply current (IDD2 + IDD3) = 120 mA.
6. Connect LOIN to the LO signal generator with an LO
power of 4 dBm.
7. Apply the IF1 and IF2 signals.
EV1HMC6505ALC5 Power Off Sequence
To turn off the EV1HMC6505ALC5, take the following steps:
1. Turn off the LO and IF signals.
2. Set VGG to −2 V.
3. Set VCTRL to 0 V.
4. Set the VDD1, VDD2, and VDD3 supplies to 0 V and then
turn them off.
5. Turn off the VGG supply.
Layout
Solder the exposed pad on the underside of the HMC6505A to a
low thermal and electrical impedance ground plane. This pad is
typically soldered to an exposed opening in the solder mask on
the evaluation board. Connect these ground vias to all other
ground layers on the evaluation board to maximize heat
dissipation from the device package. Figure 104 and Figure 105
show the printed circuit board land pattern footprint for the
HMC6505A and the solder paste stencil for the HMC6505A
evaluation board.
13900-104
0.138" SQUARE MASK OPENING
0.02 ×45° CHAMFER FOR PIN1
0.197"
[0.50]
PAD SIZE
0.026" × 0.010"
0.217" SQUARE
0.004" MASK/METAL OVERLAP
0.010" MIN MASK WIDTH
0.010" REF
0.030"
MASK OPENING
0.156"
MASK
OPENING
PIN 1
GROUND PAD
SOLDERMASK
0.146" SQUARE
GROUND PAD
ø.010"
TYPICAL VIA
ø.034"
TYPICAL
VIA SPACING
Figure 104. Printed Circuit Board Land Pattern Footprint
13900-105
0.219
SQUARE
0.017
0.017
0.027
TYP
0.010
TYP
0.0197
TYP
R0.0040 TYP
132 PLCS
0.132
SQUARE
Figure 105. Solder Paste Stencil
Data Sheet HMC6505A
Rev. 0 | Page 29 of 30
13900-106
Figure 106. HMC6505A Evaluation Board Top Layer
Table 5. Bill of Materials for the EV1HMC6505ALC5 Evaluation Board PCB
Quantity
Reference
Designator Description Manufacturer Part Number
1 Not applicable PCB, EV1HMC6505ALC5; circuit board
material: Rogers 4350
Analog Devices supplied 125487
1 Not applicable MCH, evaluation heatsink, aluminum Analog Devices supplied 104635
2 J1, J2 Johnson SMA connectors Johnson Components 142-0701-851
4
J5, J6, J8, J9
2 mm, four vertical position connector
headers
Molex
87832-0420
2 J3, J4 SRI K connectors SRI Connector Gage Company 25-146-1000-92
5 C1, C3, C4,
C13, C16
Ceramic capacitors, 100 pF, 5%, 50 V, C0G,
0402
Murata Manufacturing GRM188R71H102KA01D
5 C5, C7, C8,
C14, C17
Ceramic capacitors, 1000 pF, 50 V, 10%,
X7R, 0603
Keystone Electronics Corporation 5019
5 C9, C11, C12,
C15, C18
Tantalum capacitors, 2.2 μF, 25 V, 10%,
SMD, Case A
AVX TAJA225K025R
1 HMC6505A Device under test (DUT) Analog Devices HMC6505A
HMC6505A Data Sheet
Rev. 0 | Page 30 of 30
OUTLINE DIMENSIONS
16
0.50
BSC
3.50 REF
0.20 MIN
BOTTOM VIEW
TOP VIEW
SIDE VIEW
1
32
9
17
24
25
8
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
04-24-2017-D
0.36
0.30
0.24
EXPOSED
PAD
PKG-004843
PIN 1
INDICATOR
5.05
4.90 SQ
4.75
4.10 REF
1.10
1.00
0.90
0.38
0.32
0.26
3.60
3.50 SQ
3.40
PIN 1
0.08
REF
SEATING
PLANE
Figure 107. 32-Terminal Ceramic Leadless Chip Carrier [LCC],
(E-32-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature
Range
Package Body
Material Lead Finish
Package
Description
MSL
Rating2
Package
Option
Package
Marking3
HMC6505ALC5 −40°C to +85°C Alumina Ceramic Gold over Nickel 32-Terminal LCC MSL3 E-32-1 H6505A
XXXX
HMC6505ALC5TR −40°C to +85°C Alumina Ceramic Gold over Nickel 32-Terminal LCC MSL3 E-32-1 H6505A
XXXX
HMC6505ALC5TR-R5 −40°C to +85°C Alumina Ceramic Gold over Nickel 32-Terminal LCC MSL3 E-32-1 H6505A
XXXX
EV1HMC6505ALC5 Evaluation PCB
Assembly
1 The HMC6505ALC5, the HMC6505ALC5TR, and HMC6505ALC5TR-R5 are RoHS Compliant Parts.
2 See the Absolute Maximum Ratings section.
3 The HMC6505ALC5, the HMC6505ALC5TR, and HMC6505ALC5TR-R5 have a four-digit lot number.
©2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13900-0-8/17(0)
