100363
100363 Low Power Dual 8-Input Multiplexer
Literature Number: SNOS125
100363
Low Power Dual 8-Input Multiplexer
General Description
The 100363 is a dual 8-input multiplexer. The Data Select
(S
n
) inputs determine which bit (A
n
and B
n
) will be presented
at the outputs (Z
a
and Z
b
respectively). The same bit (0–7)
will be selected for both the Z
a
and Z
b
output.All inputs have
50 kΩpulldown resistors.
Features
n50%power reduction of the 100163
n2000V ESD protection
nPin/function compatible with 100163
nVoltage compensated operating range =−4.2V to −5.7V
nStandard Microcircuit Drawing
(SMD) 5962-9165501
Logic Symbol Pin Names Description
S
0
–S
2
Data Select Inputs
A
0
–A
7
A Data Inputs
B
0
–B
7
B Data Inputs
Z
a
,Z
b
Data Outputs
Connection Diagrams
DS100310-1
24-Pin Quad Cerpak
DS100310-3
24-Pin DIP
DS100310-2
August 1998
100363 Low Power Dual 8-Input Multiplexer
© 1998 National Semiconductor Corporation DS100310 www.national.com
Logic Diagram
DS100310-5
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Truth Table
Inputs Outputs
Select Data
S
2
S
1
S
0
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Z
a
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
Z
b
LLL L L
LLL H H
LLH L L
LLH H H
LHL L L
LHL H H
LHH L L
LHH H H
HLL L L
HLL H H
HLH L L
HLH H H
HHL L L
HHL H H
HHHL L
HHHH H
H
=
HIGH Voltage Level
L=LOW Voltage Level
Blank =X=Don’t Care
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Above which the useful life may be impared
Storage Temperature (T
STG
) −65˚C to +150˚C
Maximum Junction Temperature (T
J
)
Ceramic +175˚C
V
EE
Pin Potential to Ground Pin −7.0V to +0.5V
Input Voltage (DC) V
EE
to + 0.5V
Output Current (DC Output HIGH) −50 mA
ESD (Note 2) ≥2000V
Recommended Operating
Conditions
Case Temperature (T
C
)
Military −55˚C to +125˚C
Supply Voltage (V
EE
) −5.7V to −4.2V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
V
EE
=−4.2V to −5.7V, V
CC
=V
CCA
=GND, T
C
=−55˚C to +125˚C
Symbol Parameter Min Max Units T
C
Conditions Note
V
OH
Output HIGH Voltage −1025 −870 mV 0˚C to
+125˚C
−1085 −870 mV −55˚C V
IN
=V
IH
(Max) Loading with (Notes 3, 4, 5)
V
OL
Output LOW Voltage −1830 −1620 mV 0˚C to or V
IL
(Min) 50Ωto −2.0V
+125˚C
−1830 −1555 mV −55˚C
V
OHC
Output HIGH Voltage −1035 mV 0˚C to
+125˚C
−1085 mV −55˚C V
IN
=V
IH
(Min) Loading with (Notes 3, 4, 5)
V
OLC
Output LOW Voltage −1610 mV 0˚C to or V
IL
(Max) 50Ωto −2.0V
+125˚C
−1555 mV −55˚C
V
IH
Input HIGH Voltage −1165 −870 mV −55˚C to Guaranteed HIGH Signal for All
Inputs (Notes 3, 4, 5, 6)
+125˚C
V
IL
Input LOW Voltage −1830 −1475 mV −55˚C to Guaranteed LOW Signal for All Inputs (Notes 3, 4, 5, 6)
+125˚C
I
IL
Input LOW Current 0.50 µA −55˚C to V
EE
=−4.2V (Notes 3, 4, 5)
+125˚C V
IN
=V
IL
(Min)
I
IH
Input HIGH Current
S
n
265 µA 0˚C to
A
n
,B
n
340 +125˚C V
EE
=−5.7V (Notes 3, 4, 5)
S
n
385 µA −55˚C V
IN
=V
IH
(Max)
A
n
,B
n
490
I
EE
Power Supply
Current −87 −30 mA −55˚C to Inputs Open (Notes 3, 4, 5)
+125˚C
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100%on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing VOH/VOL.
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AC Electrical Characteristics
V
EE
=−4.2V to −5.7V, V
CC
=V
CCA
=GND
Symbol Parameter T
C
=−55˚C T
C
=+25˚C T
C
=
+125˚C Units Conditions Notes
Min Max Min Max Min Max
t
PLH
Propagation Delay 0.50 2.40 0.60 2.30 0.70 3.00 ns
t
PHL
A
0
–A
7
,B
0
–B
7
to Output (Notes 7, 8, 9)
t
PLH
Propagation Delay 0.80 3.00 0.90 2.80 0.80 3.40 ns
Figure 1
and
t
PHL
S
0
–S
2
to Output
Figure 2
t
TLH
Transition Time 0.30 1.90 0.30 1.80 0.30 2.10 ns (Note 10)
t
THL
20%to 80%,80
%to 20%
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100%on each device at +25˚C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C, temperatures, SubgroupsA10 and A11.
Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).
Test Circuitry
DS100310-6
Notes:
VCC,V
CCA =+2V, VEE =−2.5V
L1 and L2 =equal length 50Ωimpedance lines
RT=50Ωterminator internal to scope
Decoupling 0.1 µF from GND to VCC and V EE
All unused outputs are loaded with 50Ωto GND
CL=Fixture and stray capacitance ≤3pF
Pin numbers shown are for flatpak; for DIP see logic symbol
FIGURE 1. AC Test Circuit
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Switching Waveforms
DS100310-7
FIGURE 2. Propagation Delay and Transition Times
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Physical Dimensions inches (millimeters) unless otherwise noted
24-Pin Ceramic Dual-In-Line Package (D)
NS Package Number J24E
24-Pin Quad Cerpak (F)
NS Package Number W24B
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100363 Low Power Dual 8-Input Multiplexer
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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