Description
The HCPL-7520 isolated linear current sensing IC family
is designed for current sensing in low-power electronic
motor drives. In a typical implementation, motor current
ows through an external resistor and the resulting
analog voltage drop is sensed by the HCPL-7520. An
output voltage is created on the other side of the HCPL-
7520 optical isolation barrier. This single-ended output
voltage is proportional to the motor current. Since
common-mode voltage swings of several hundred
volts in tens of nanoseconds are common in modern
switching inverter motor drives, the HCPL-7520 was
designed to ignore very high common-mode transient
slew rates (of at least 10 kV/µs).
The high CMR capability of the HCPL-7520 isolation
amplier provides the precision and stability needed to
accurately monitor motor current in high noise motor
control environments, providing for smoother control
(less “torque ripple”) in various types of motor control
applications.
The product can also be used for general analog signal
isolation applications. For general applications, we
recommend the HCPL-7520 (gain tolerance of ±5%).
The HCPL-7520 utilizes sigma-delta (Σ−∆) analog-to-
digital converter technology to delivery oset and gain
accuracy and stability over time and temperature. This
performance is delivered in a compact, auto-insert, 8-
pin DIP package that meets worldwide regulatory safety
standards. (A gull-wing surface mount option 300 is also
available).
Features
• 15 kV/µs common-mode rejection at Vcm = 1000 V
• Compact, auto-insertable 8-pin DIP package
• 60 ppm/°C gain drift vs. temperature
• –0.6 mV input oset voltage
• 8 µV/°C input oset voltage vs. temperature
• 100 kHz bandwidth
• 0.06% non-linearity, single-ended amplier output for
low power application.
• Worldwide safety approval:
UL 1577 (3750 Vrms/1 min.), CSA and IEC/EN/DIN EN
60747-5-2 (Option 060 only)
• Advanced sigma-delta (Σ−∆) A/D converter
technology
Applications
• Low-power inverter current sensing
• Motor phase and rail current sensing
• Switched mode power supply signal isolation
• General purpose low-power current sensing and
monitoring
• General purpose analog signal isolation
Functional Diagram
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and /or degradation which may be induced by ESD.
1
2
3
4
8
7
6
5
I
DD1
V
DD1
V
IN+
V
IN–
GND1
I
DD2
V
DD2
V
OUT
V
REF
GND2
+
–
+
–
SHIELD
HCPL-7520
Isolated Linear Sensing IC
Data Sheet
A 0.1 µF bypass capacitor must be connected between pins 1 and 4 and between pins 5 and 8.
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
2
Package Outline Drawings
HCPL-7520 Standard DIP Package
Ordering Information
HCPL-7520 is UL Recognized with 3750 Vrms for 1 minute per UL1577.
Part number
Option
Package
Surface
Mount Gull Wing Tape& Reel
IEC/EN/DIN
EN 60747-5-2 Quantity
RoHS
Compliant
Non-RoHS
Compliant
HCPL-7520
-000E No option
300 mil DIP-8
50 per tube
-300E -300 X X 50 per tube
-500E -500 X X X 1000 per reel
-060E -060 X 50 per tube
-360E -360 X X X 50 per tube
-560E -560 X X X X 1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-7520-560E to order product of Gull Wing Surface Mount package in Tape and Reel packaging
with IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant.
Example 2:
HCPL-7520 to order product of 300 mil DIP package in tube packaging and non-RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
9.80 ± 0.25
(0.386 ± 0.010)
1.78 (0.070) MAX.
1.19 (0.047) MAX.
A 7520
YYWW
DATE CODE
1.080 ± 0.320
(0.043 ± 0.013)
2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
0.65 (0.025) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
5678
4321
5 TYP.
0.20 (0.008)
0.33 (0.013)
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
DIMENSIONS IN MILLIMETERS AND (INCHES).
NOTE: FLOATING LEAD PROTUSION IS 0.5 mm (20 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
3
HCPL-7520 Gull Wing Surface Mount Option 300 Outline Drawing
0.635 ± 0.25
(0.025 ± 0.010)
12 NOM.
0.20 (0.008)
0.33 (0.013)
9.65 ± 0.25
(0.380 ± 0.010)
0.635 ± 0.130
(0.025 ± 0.005)
7.62 ± 0.25
(0.300 ± 0.010)
5
6
7
8
4
3
2
1
9.80 ± 0.25
(0.386 ± 0.010)
6.350 ± 0.25
(0.250 ± 0.010)
1.080 ± 0.320
(0.043 ± 0.013)
3.56 ± 0.13
(0.140 ± 0.005)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01
xx.xxx = 0.005
A 7520
YYWW
LEAD COPLANARITY
MAXIMUM: 0.102 (0.004)
NOTE: FLOATING LEAD PROTUSION IS 0.5 mm (20 mils) MAX.
1.016 (0.040)
10.9 (0.430)
2.0 (0.080)
Land Pattern Recommendation
1.27 (0.050)
4
Solder Reow Temperature Prole
Recommended Pb-Free IR Prole
0
TIME (SECONDS)
TEMPERATURE (˚C)
200
100
50 150100 200 250
300
0
30
SEC.
50 SEC.
30
SEC.
160˚C
140˚C
150˚C
PEAK
TEMP.
245˚C
PEAK
TEMP.
240˚C
PEAK
TEMP.
230˚C
SOLDERING
TIME
200˚C
PREHEATING TIME
150˚C, 90 + 30 SEC.
2.5˚C ± 0.5˚C/SEC.
3˚C + 1˚C/–0.5˚C
TIGHT
TYPICAL
LOOSE
ROOM TEMPERATURE
PREHEATING RATE 3˚C + 1˚C/–0.5˚C/SEC.
REFLOW HEATING RATE 2.5˚C ± 0.5˚C/SEC.
217 ˚C
RAMP-DOWN
6 ˚C/SEC. MAX.
RAMP-UP
3 ˚C/SEC. MAX.
150 - 200 ˚C
260 +0/-5 ˚C
t 25 ˚C to PEAK
60 to 150 SEC.
20-40 SEC.
TIME WITHIN 5 ˚C of ACTUAL
PEAK TEMPERATURE
tp
ts
PREHEAT
60 to 180 SEC.
tL
TL
Tsmax
Tsmin
25
Tp
TIME (SECONDS)
TEMPERATURE (˚C)
NOTES:
THE TIME FROM 25 ˚C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 ˚C, Tsmin = 150 ˚C
Note: Use of non-chlorine-activated uxes is highly recommended.
Note: Use of non-chlorine-activated uxes is highly recommended.
5
Regulatory Information
The HCPL-7520 has been approved by the following organizations:
Notes:
1. Insulation characteristics are guaranteed only within the safety
maximum ratings which must be ensured by protective circuits
within the application. Surface Mount Classications is Class A in
accordance with CECC00802.
2. Refer to the optocoupler section of the Isolation and Control
Components Designer’s Catalog, under Product Safety Regulations
section, (IEC/EN/DIN EN 60747-5-2) for a detailed description of
Method a and Method b partial discharge test proles.
3. Refer to the following gure for dependence of PS and IS on ambient
temperature.
UL
Approved under UL 1577, component recognition
program up to VISO = 3750 VRMS. File E55361.
CSA
Approved under CSA Component Acceptance
Notice #5, File CA 88324.
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.
OUTPUT POWER – PS, INPUT CURRENT – IS
0
0
TS – CASE TEMPERATURE – °C
200
600
400
25
800
50 75 100
200
150 175
PS (mW)
125
100
300
500
700 IS (mA)
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics[1]
Description Symbol Characteristic Unit
Installation classication per DIN EN 0110-1/1997-04, Table 1
for rated mains voltage ≤ 150 Vrms I – IV
for rated mains voltage ≤ 300 Vrms I – III
for rated mains voltage ≤ 600 Vrms I – II
Climatic Classication 55/100/21
Pollution Degree (DIN EN 0110-1/1997-04) 2
Maximum Working Insulation Voltage VIORM 891 Vpeak
Input to Output Test Voltage, Method b[2]
VIORM x 1.875 = VPR, 100% production test with tm = 1 sec, partial discharge <5 pC VPR 1670 Vpeak
Input to Output Test Voltage, Method a[2]
VIORM x 1.5 = VPR, type and sample test, tm = 60 sec, partial discharge <5 pC VPR 1336 Vpeak
Highest Allowable Overvoltage (transient overvoltage tini = 10 sec) VIOTM 6000 Vpeak
Safety-limiting values – maximum values allowed in the event of a failure.
Case Temperature TS 175 °C
Input Current[3] IS, INPUT 400 mA
Output Power[3] PS, OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS >109 Ω
6
Insulation and Safety Related Specications
Parameter Symbol Value Unit Conditions
Minimum External Air Gap L(101) 7.4 mm Measured from input terminals to output terminals,
(clearance) shortest distance through air.
Minimum External Tracking L(102) 8.0 mm Measured from input terminals to output terminals,
(creepage) shortest distance path along body.
Minimum Internal Plastic Gap 0.5 mm Through insulation distance conductor to conductor,
(internal clearance) usually the straight line distance thickness between
the emitter and detector.
Tracking Resistance CTI >175 V DIN IEC 112 Part 1
(comparative tracking index)
Isolation Group IIIa Material Group (DIN EN 0110-1/1997-04)
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units Note
Storage Temperature TS –55 125 °C
Operating Temperature TA –40 100 °C
Supply Voltage VDD1, VDD2 0 6 V
Steady-State Input Voltage VIN+, VIN- –2.0 VDD1 + 0.5 V
Two Second Transient Input Voltage VIN+, VIN- –6.0 VDD1 + 0.5 V
Output Voltage VOUT –0.5 VDD2 + 0.5 V
Reference Input Voltage VREF 0.0 VDD2 + 0.5 V
Reference Input Current IREF 20 mA
Lead Solder Temperature 260°C for 10 sec., 1.6 mm below seating plane
Solder Reow Temperature Prole See Package Outline Drawings section
Recommended Operating Conditions
Parameter Symbol Min. Max. Units Note
Operating Temperature TA –40 85 °C
Supply Voltage VDD1, VDD2 4.5 5.5 V
Input Voltage (accurate and linear) VIN+, VIN- –200 200 mV
Input Voltage (functional) VIN+, VIN- –2.0 2.0 V
Reference Input Voltage VREF 4.0 VDD2 V
Option 300 - surface mount classication is Class A in accordance with CECC 00802.
7
Electrical Specications (DC)
Unless otherwise noted, all typicals and gures are at the nominal operation conditions of VIN+ = 0 V, VIN- = 0 V, VREF
= 4.0 V, VDD1 = VDD2 = 5.0 V and TA = 25°C; all Minimum/Maximum specications are within the Recommended Oper-
ating Conditions.
Test
Parameter Symbol Min. Typ. Max. Units Conditions Fig. Note
Input Oset Voltage VOS –6 –0.6 6 mV VIN+ = 0 V 6 1
Magnitude of Input Oset ∆Vos/∆T 8 20 µV/°C VIN+ = 0 V 7
Change vs. Temperature
Gain G VREF/0.512 VREF VREF/0.512 V/V -0.2 V < VIN+ 8, 9 2
– 5% /0.512 + 5% < 0.2 V
TA = 25°C
Magnitude of Gain Change ∆G/∆T 60 300 ppm/°C -0.2 V < VIN+ 9
vs. Temperature < 0.2 V
VOUT 200 mV Nonlinearity NL200 0.06 0.55 % -0.2 V < VIN+ 10, 3,4
< 0.2 V 11
Magnitude of VOUT 200 mV |dNL200/dT| 0.0004 %/°C -0.2 V < VIN+ 11
Nonlinearity Change < 0.2 V
vs. Temperature
VOUT 100 mV Nonlinearity NL100 0.04 0.4 % -0.1 V < VIN+ 10, 3,5
< 0.1 V 11
Input Supply Current IDD1 11.7 16 mA 1,2,3
Output Supply Current IDD2 9.9 16 mA 1,2,3
Reference Voltage Input IREF 0.26 1 mA
Current
Input Current IIN+ –0.6 5 µA VIN+ = 0 V 4
Magnitude of Input Bias |dIIN/dT| 0.45 nA/°C VIN+ = 0 V
Current vs. Termperature
Coecient
Maximum Input Voltage |VIN+|MAX 256 mV 5
before VOUT Clipping
Equivalent Input Impedance RIN 700 kΩ
VOUT Output Impedance ROUT 15 Ω
Input DC Common-Mode CMRRIN 63 dB 7
Rejection Ratio
8
Notes:
General Note: Typical values were taken from a sample of nominal units operating at nominal conditions (VDD1 = VDD2 = 5 V, VREF = 4.0 V, Temperature
= 25°C) unless otherwise stated. Nominal plots shown from Figure 1 to 11 represented the drift of these nominal units from their nominal
operating conditions.
1. Input Oset Voltage is dened as the DC Input Voltage required to obtain an output voltage of VREF/2.
2. Gain is dened as the slope of the best-t line of the output voltage vs. the dierential input voltage (VIN+ - VIN-) over the specied input range.
Gain is derived from VREF/512 mV; e.g. VREF = 5.0, gain will be 9.77 V/V.
3. Nonlinearity is dened as half of the peak-to-peak output deviation from the best-t gain line, expressed as a percentage of the full-scale output
voltage range.
4. NL200 is the nonlinearity specied over an input voltage range of ±200 mV.
5. NL100 is the nonlinearity specied over an input voltage range of ±100 mV.
6. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second (leakage
detection current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for the partial discharge (method b) shown in
IEC/EN/DIN EN 60747-5-2 Insulation Characteristic Table, if applicable.
7. CMRR is dened as the ratio of the dierential signal gain (signal applied dierentially between pins 2 and 3) to the common-mode gain (input
pins tied together and the signal applied to both inputs at the same time), expressed in dB.
Switching Specications (AC)
Over recommended operating conditions unless otherwise specied.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
VIN to VOUT Signal Delay (50 – 10%) tPD10 2.2 4 µs VIN+ = 0 mV to 200 mV step 13
VIN to VOUT Signal Delay (50 – 50%) tPD50 3.4 5 µs VIN+ = 0 mV to 200 mV step 13
VIN to VOUT Signal Delay (50 – 90%) tPD90 5.2 9.9 µs VIN+ = 0 mV to 200 mV step 13
VOUT Rise Time (10 – 90%) tR 3.0 7 µs VIN+ = 0 mV to 200 mV step 13
VOUT Fall Time (10 – 90%) tF 3.2 7 µs
VOUT Bandwidth (-3 dB) BW 50 100 kHz VIN+ = 200 mVpk-pk 14
VOUT Noise NOUT 31.5 mVrms VIN+ = 0 V
Common Mode Transient CMTI 10 15 kV/µs TA = 25°C, VCM = 1000 V 15
Immunity
Package Characteristics
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary VISO 3750 Vrms TA = 25°C, RH < 50% 6
Withstand Voltage
Input-Output Resistance RI-O >109 Ω VI-O = 500 V
Input-Output Capacitance CI-O 1.4 pF Freq = 1 MHz
9
Figure 1. Supply current vs. supply voltage.
Figure 6. Input oset change vs. supply voltage.Figure 5. Output voltage vs. input voltage.Figure 4. Input current vs. input voltage.
Figure 3. Supply current vs. input voltage.Figure 2. Supply current vs. temperature.
Figure 9. Gain change vs. temperature.Figure 8. Gain change vs. supply voltage.Figure 7. Input oset change vs. temperature.
IDD – SUPPLY CURRENT – mA
VDD – SUPPLY VOLTAGE – V
11
13
4.7 4.9
8
4.5 5.55.3
12
10
9
5.1
IDD1
IDD2
TA – TEMPERATURE – °C
9.5
9.0
7.5
-20
11.0
20 80
7.0
10.5
-40 100
8.5
0 40
IDD – SUPPLY CURRENT – mA
IDD1
IDD2
60
8.0
10.0
∆VOS – INPUT OFFSET CHANGE – mV
TA – TEMPERATURE – °C
-0.5
-20
2.0
80
-2.0
0
1.5
-40 10020 40
-1.5
0.5
0 60
-1.0
1.0
TYPICAL
MAXIMUM
∆GAIN – GAIN CHANGE – %
VDD – SUPPLY VOLTAGE – V
0.010
0.020
4.7 4.9
-0.010
4.5 5.55.3
0.015
0.005
-0.005
5.1
VDD1
VDD2
0
TA – TEMPERATURE – °C
0.3
0.2
-0.2
-20
0.7
20 80
-0.3
0.6
-40 100
0.1
0 40
∆GAIN – GAIN CHANGE – %
60
-0.1
0.4
0
0.5
10
Figure 15. CMTI test circuit.Figure 14. Bandwidth.
Figure 13. Propagation delay vs. temperature.Figure 12. Propagation delay test circuit.
Figure 11. Nonlinearity vs. temperature.
Figure 10. Nonlinearity vs. supply voltage.
NL – NONLINEARITY – %
VDD – SUPPLY VOLTAGE – V
0.046
0.050
4.7 4.9
0.040
4.5 5.55.3
0.048
0.044
0.042
5.1
VDD1
VDD2
TA – TEMPERATURE – °C
0.07
-20
0.09
20 80
0.05
-40 1000 40
NL – NONLINEARITY – %
60
0.06
0.08
TA – TEMPERATURE – °C
3
-20
6
20 80
0
-40 1000 40
TPD – PROPAGATION DELAY – µs
60
2
5
4
1
Tp5010
Tp5050
Tp5090
Trise
0.1 µF
VDD2
VOUT
8
7
6
1
3
HCPL-7520
5
2
4
0.1 µF
VREF
VDD1
VIN
0.1 µF
GND1 GND2
FREQUENCY – kHz
-1
-2
-5
100.0
-6
1
0.1 1000.0
-3
1.0 10.0
NORMALIZED GAIN - dB
-4
0
0.1 µF
VDD2
VOUT
8
7
6
1
3
HCPL-7520
5
2
4
78L05
IN OUT
0.1
µF
0.1
µF
9 V
PULSE GEN.
VCM
+–
VREF
11
Application Information
Power Supplies and Bypassing
The recommended supply connections are shown in
Figure 16. A oating power supply (which in many ap-
plications could be the same supply that is used to
drive the high-side power transistor) is regulated to 5 V
using a simple zener diode (D1); the value of resistor R4
should be chosen to supply sucient current from the
existing oating supply. The voltage from the current
sensing resistor (Rsense) is applied to the input of the
HCPL-7520 through an RC anti-aliasing lter (R2 and
C2). Although the application circuit is relatively simple,
a few recom- mendations should be followed to ensure
optimal performance.
The power supply for the HCPL -7520 is most often
obtained from the same supply used to power the
power transistor gate drive circuit. If a dedicated supply
is required, in many cases it is possible to add an ad-
ditional winding on an existing transformer. Otherwise,
some sort of simple isolated supply can be used, such
as a line powered transformer or a high-frequency DC-
DC converter.
Figure 16. Recommended supply and sense resistor connections.
An inexpensive 78L05 three-terminal regulator can also
be used to reduce the oating supply voltage to 5 V. To
help attenuate high- frequency power supply noise or
ripple, a resistor or inductor can be used in series with
the input of the regulator to form a low-pass lter with
the regulator’s input bypass capacitor.
+-
MOTOR
HV-
HV+
RSENSE
GATE DRIVE
CIRCUIT
VDD1
VIN+
VIN-
GND1
HCPL-7520
C1
0.1 µF
C2
0.01 µF
R2
39 Ω
R4
D1
5.1 V
+
-
1
2
3
4
R1
FLOATING
POSITIVE
SUPPLY
12
Figure 17. Recommended HCPL-7520 application circuit.
As shown in Figure 17, 0.1 µF bypass capacitors (C1, C2)
should be located as close as possible to the pins of the
HCPL-7520. The bypass capacitors are required because
of the high-speed digital nature of the signals inside the
HCPL-7520. A 0.01 µF bypass capacitor (C2) is also rec-
ommended at the input due to the switched-capacitor
nature of the input circuit. The input bypass capacitor
also forms part of the anti-aliasing lter, which is recom-
mended to prevent high frequency noise from aliasing
down to lower frequencies and interfering with the
input signal. The input lter also performs an important
reliability function—it reduces transient spikes from ESD
events owing through the current sensing resistor.
PC Board Layout
The design of the printed circuit board (PCB) should
follow good layout practices, such as keeping bypass
capacitors close to the supply pins, keeping output
signals away from input signals, the use of ground and
power planes, etc. In addition, the layout of the PCB
can also aect the isolation transient immunity (CMTI)
of the HCPL-7520, due primarily to stray capacitive
coupling between the input and the output circuits. To
obtain optimal CMTI performance, the layout of the PC
board should minimize any stray coupling by maintain-
ing the maximum possible distance between the input
and output sides of the circuit and ensuring that any
ground or power plane on the PC board does not pass
directly below or extend much wider than the body of
the HCPL-7520.
+-
MOTOR
HV-
HV+
R
SENSE
FLOATING
POSITIVE
SUPPLY
GATE DRIVE
CIRCUIT
HCPL-7520
C2
0.1 µF
C3
0.01 µF
R5
68 Ω
R1
1
2
3
4
8
7
6
5
IN OUT
C1
0.1 µF
U1
78L05
C4 C5 C6
V
DD1
V
IN+
V
IN-
GND1
V
DD2
V
OUT
V
REF
GND2
A/D
V
REF
GND
µC
C6 = 150 pF
C4 = C5 = 0.1 µF
+5 V
13
Current Sensing Resistors
The current sensing resistor should have low resistance
(to minimize power dissipation), low inductance (to
minimize di/dt induced voltage spikes which could
adversely aect operation), and reasonable tolerance
(to maintain overall circuit accuracy). Choosing a par-
ticular value for the resistor is usually a compromise
between minimizing power dissipation and maximiz-
ing accuracy. Smaller sense resistance decreases power
dissipation, while larger sense resistance can improve
circuit accuracy by utilizing the full input range of the
HCPL -7520.
The rst step in selecting a sense resistor is determining
how much current the resistor will be sensing. The graph
in Figure 18 shows the RMS current in each phase of a
three-phase induction motor as a function of average
motor output power (in horsepower, hp) and motor
drive supply voltage. The maximum value of the sense
resistor is determined by the current being measured
and the maximum recommended input voltage of the
isolation amplier. The maximum sense resistance can
be calculated by taking the maximum recommended
input voltage and dividing by the peak current that the
sense resistor should see during normal operation. For
example, if a motor will have a maximum RMS current
of 10 A and can experience up to 50% overloads during
normal operation, then the peak current is 21.1 A (=10
x 1.414 x 1.5). Assuming a maximum input voltage of
200 mV, the maximum value of sense resistance in this
case would be about 10 mΩ. The maximum average
power dissipation in the sense resistor can also be easily
calculated by multiplying the sense resistance times the
square of the maximum RMS current, which is about
1 W in the previous example. If the power dissipation
in the sense resistor is too high, the resistance can be
decreased below the maximum value to decrease power
dissipation. The minimum value of the sense resistor is
limited by precision and accuracy requirements of the
design. As the resistance value is reduced, the output
voltage across the resistor is also reduced, which means
that the oset and noise, which are xed, become a
larger percentage of the signal amplitude. The selected
value of the sense resistor will fall somewhere between
the minimum and maximum values, depending on the
particular requirements of a specic design.
When sensing currents large enough to cause sig-
nicant heating of the sense resistor, the temperature
coecient (tempco) of the resistor can introduce non-
linearity due to the signal dependent temperature rise
of the resistor. The eect increases as the resistor-to-
ambient thermal resistance increases. This eect can
be minimized by reducing the thermal resistance of
the current sensing resistor or by using a resistor with
a lower tempco. Lowering the thermal resistance can
be accomplished by repositioning the current sensing
resistor on the PC board, by using larger PC board traces
to carry away more heat, or by using a heat sink. For a
two-terminal current sensing resistor, as the value of
resistance decreases, the resistance of the leads become
a signicant percentage of the total resistance. This
has two primary eects on resistor accuracy. First, the
eective resistance of the sense resistor can become
dependent on factors such as how long the leads are,
how they are bent, how far they are inserted into the
board, and how far solder wicks up the leads during
assembly (these issues will be discussed in more detail
shortly). Second, the leads are typically made from
a material, such as copper, which has a much higher
tempco than the material from which the resistive
element itself is made, resulting in a higher tempco
overall. Both of these eects are eliminated when a
four-terminal current sensing resistor is used. A four-
terminal resistor has two additional terminals that are
Kelvin-connected directly across the resistive element
itself; these two terminals are used to monitor the
voltage across the resistive element while the other two
terminals are used to carry the load current. Because
of the Kelvin connection, any voltage drops across the
leads carrying the load current should have no impact
on the measured voltage.
14
When laying out a PC board for the current sensing
resistors, a couple of points should be kept in mind. The
Kelvin connections to the resistor should be brought
together under the body of the resistor and then run
very close to each other to the input of the HCPL-7520;
this minimizes the loop area of the connection and
reduces the possibility of stray magnetic elds from in-
terfering with the measured signal. If the sense resistor
is not located on the same PC board as the HCPL-7520
circuit, a tightly twisted pair of wires can accomplish
the same thing. Also, multiple layers of the PC board
can be used to increase current carrying capacity.
Numerous plated-through vias should surround each
non-Kelvin terminal of the sense resistor to help dis-
tribute the current between the layers of the PC board.
The PC board should use 2 or 4 oz. copper for the layers,
resulting in a current carrying capacity in excess of 20
A. Making the current carrying traces on the PC board
fairly large can also improve the sense resistor’s power
dissipation capability by acting as a heat sink. Liberal
use of vias where the load current enters and exits the
PC board is also recommended.
Sense Resistor Connections
The recommended method for connecting the HCPL-
7520 to the current sensing resistor is shown in Figure
17. VIN+ (pin 2 of the HPCL-7520) is connected to the
positive terminal of the sense resistor, while VIN- (pin
3) is shorted to GND1 (pin 4), with the powersupply
return path functioning as the sense line to the negative
terminal of the current sense resistor. This allows a
single pair of wires or PC board traces to connect the
HCPL-7520 circuit to the sense resistor. By referenc-
ing the input circuit to the negative side of the sense
resistor, any load current induced noise transients on
the resistor are seen as a common- mode signal and
will not interfere with the current-sense signal. This
is important because the large load currents owing
through the motor drive, along with the parasitic in-
ductances inherent in the wiring of the circuit, can
generate both noise spikes and osets that are relative-
ly large compared to the small voltages that are being
measured across the current sensing resistor. If the same
power supply is used both for the gate drive circuit and
for the current sensing circuit, it is very important that
the connection from GND1 of the HCPL-7520 to the
sense resistor be the only return path for supply current
to the gate drive power supply in order to eliminate
potential ground loop problems. The only direct con-
nection between the HCPL-7520 circuit and the gate
drive circuit should be the positive power supply line.
Figure 18. Motor output horsepower vs. motor phase current and supply
voltage.
15
5
40
15 20 25 30
25
MOTOR PHASE CURRENT – A (rms)
10
30
MOTOR OUTPUT POWER – HORSEPOWER
5 350
0
440
380
220
120
10
20
35
15
FREQUENTLY ASKED QUESTIONS ABOUT THE HCPL-7520
1. THE BASICS
1.1: Why should I use the HCPL-7520 for sensing
current when Hall-eect sensors are available which
don’t need an isolated supply voltage?
Available in an auto-insertable, 8-pin DIP package, the
HCPL-7520 is smaller than and has better linearity, oset
vs. temperature and Common Mode Rejection (CMR)
performance than most Hall-eect sensors. Addition-
ally, often the required input-side power supply can be
derived from the same supply that powers the gate-
drive optocoupler.
2. SENSE RESISTOR AND INPUT FILTER
2.1: Where do I get 10 mΩ resistors? I have never
seen one that low.
Although less common than values above 10 Ω, there
are quite a few manufacturers of resistors suitable for
measuring currents up to 50 A when combined with the
HCPL-7520. Example product information may be found
at Dale’s web site (http://www.vishay.com/vishay/dale)
and Isotek’s web site (http://www.isotekcorp.com) and
Iwaki Musen Kenkyusho’s website (http://www.iwaki-
musen.co.jp) and Micron Electric’s website (http://www.
micron-e.co.jp).
2.2: Should I connect both inputs across the sense
resistor instead of grounding VIN- directly to pin 4?
This is not necessary, but it will work. If you do, be sure
to use an RC lter on both pin 2 (VIN+) and pin 3 (VIN-)
to limit the input voltage at both pads.
2.3: Do I really need an RC lter on the input? What is
it for? Are other values of R and C okay?
The input anti-aliasing lter (R=39 Ω, C=0.01 µF) shown
in the typical application circuit is recommended for
ltering fast switching voltage transients from the input
signal. (This helps to attenuate higher signal frequencies
which could otherwise alias with the input sampling
rate and cause higher input oset voltage.)
Some issues to keep in mind using different filter
resistors or capacitors are:
1. (Filter resistor:) The equivalent input resistance for
HCPL-7520 is around 700 kΩ. It is therefore best to
ensure that the lter resistance is not a signicant per-
centage of this value; otherwise the oset voltage will
be increased through the resistor divider eect. [As an
example, if Rlt = 5.5 kΩ, then VOS = (Vin * 1%) = 2 mV
for a maximum 200 mV input and VOS will vary with
respect to Vin.]
2. The input bandwidth is changed as a result of this
dierent R-C lter conguration. In fact this is one of
the main reasons for changing the input-lter R-C time
constant.
3. (Filter capacitance:) The input capacitance of
the HCPL-7520 is approximately 1.5 pF. For proper
operation the switching input-side sampling ca-
pacitors must be charged from a relatively fixed
(low impedance) voltage source. Therefore, if a lter
capacitor is used it is best for this capacitor to be a few
orders of magnitude greater than the CINPUT (A value of
at least 100 pF works well.)
2.4: How do I ensure that the HCPL-7520 is not
destroyed as a result of short circuit conditions
which cause voltage drops across the sense resistor
that exceed the ratings of the HCPL-7520’s inputs?
Select the sense resistor so that it will have less than 5 V
drop when short circuits occur. The only other require-
ment is to shut down the drive before the sense resistor
is damaged or its solder joints melt. This ensures that
the input of the HCPL-7520 can not be damaged by
sense resistors going open-circuit.
3. ISOLATION AND INSULATION
3.1: How many volts will the HCPL-7520 withstand?
The momentary (1 minute) withstand voltage is 3750
V rms per UL 1577 and CSA Component Acceptance
Notice #5.
4. ACCURACY
4.1: Does the gain change if the internal LED light
output degrades with time?
No. The LED is used only to transmit a digital pattern.
Avago Technologies has accounted for LED degradation
in the design of the product to ensure long life.
5. MISCELLANEOUS
5.1: How does the HCPL-7520 measure negative
signals with only a +5 V supply?
The inputs have a series resistor for protection against
large negative inputs. Normal signals are no more than
200 mV in amplitude. Such signals do not forward bias
any junctions sufficiently to interfere with accurate
operation of the switched capacitor input circuit.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2163EN
AV02-0956EN - January 3, 2008