MUX-16/MUX-28 16-CHANNEL/ DUAL 8-CHANNEL JFET ANALOG MULTIPLEXERS (OVERVOLTAGE PROTECTED) FEATURES e JFET Switches Rather Than CMOS Highly Resistant To Static Discharge Damage No SCR Latch-up Problems Low ON Resistance 2900 Typical Low Leakage Current Digital Inputs Compatible With TTL and CMOS Break-Before-Make Action @ 125C Temperature-Tested Dice Available Overvoltage Protected Supply Loss Protection MUX-16 Pin Compatible With DG506, HI-506A, AD7506 @ MUX-28 Pin Compatible With DG507, HI-507A, AD7507 * Avaliable in Die Form ORDERING INFORMATION ' PACKAGE OPERATING 25C CERDIP Lec PLASTIC TEMPERATURE RESISTANCE 28-PIN 28-CONTACT -28-PIN RANGE 2900 MUX16AT* - - ML 2902 MUX16ET - - IND 4000 MUX16BT MUX16BTC/883 - MIL 4002 MUX16FT - MUX16FP XIND 400 - - MUX16FPC XIND 2900 MUX28AT* - - MiL 2902 MUX28ET ~ - IND 4002 MUX28BT* MUX28BTC/883 - MIL 4000 MUX28FT - MUX28FP XIND 400a - - MUX28FPC XIND For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet. Burn-in is available on commercial and industrial temperature range parts in CerDIP, plastic DIP, and TO-can packages. For ordering information, see 1990/91 Data Book, Section 2. FUNCTIONAL DIAGRAMS GENERAL DESCRIPTION The MUX-16 is a monolithic 16-channel analog muitiplexer which connects a single output to 1 of the 16 analog inputs depending upon the state of a 4-bit binary address. Discon- nection of the output is provided by a logical O at the ENABLE input, thereby providing a package selection function. The MUX-28 is a monolithic 8-channel differential analog multiplexer configured in a double pole, 8-position (plus OFF) electronic switch array. A 3-bit binary input address connects a pair of independent analog inputs from each 8-channel input section to the corresponding pair of inde- pendent analog outputs. Disconnection of both inputs is provided by a logical 0 at the ENABLE input, thereby offer- ing a package select function. Fabricated with Precision Monolithics' high performance Bipolar-JFET technology, these devices offer low, constant ON resistance. Performance advantages include low leak- age currents and fast settling time with low crosstalk to satisfy a wide variety of applications. These multiplexers do not suffer from fatch-up or static discharge blow-out prob- lems associated with similar CMOS parts. The digital inputs are designed to operate from both TTL and CMOS levels while always providing a definite break-before-make action without the need for external pull-up resistors. For single 8-channel and dual 4-channel models, refer to the MUX-08/MUX-24 data sheet. MUX-16 S; S82 S83 S84 S| 5 5S, Sg 1 OF 16 DECODERS DRAIN Sg Sig 847 Siz Sig S14 Sig Ste MUX-28 DRAINA Sia San S50 S7a San 1OF B DECODERS DRAINS Sig S23 Sip Sag S58 Sep S7p Sep 13-53 8/89, Rev. A2 m2 ai x a = By 5 _~ = H ra 5 & = w < Zz oR ON a SS & TIME (uSEC) o 2 a o : 60 -20 G6 20 @0 100 40 0 -20 9 2 sO 100 140 TEMPERATURE (C) TEMPERATURE (C) 13-59 8/89, Rev. A2PMD MUX-16/MUX-28 16-CHANNEL/DUAL 8-CHANNEL JFET ANALOG MULTIPLEXERS A.C. TEST CIRCUITS TRANSITION TIME TEST CIRCUIT SWITCHING TIME WAVEFORMS a Ve +5VO-IEN MUX-16 EN (MUX:28) og VS! 8 visi OTN) sisal oo vy wire q ABINC) $9--Sa5 OUTPUT a2 S2a-S7ay -O- = Vb 0 $1B-Sep: {SEE FIGURE 1.) Sie(Sgall- - 0 V16 Al 0.8VS16 AO DiDal-- - vsi6 SNO La 8 |. TRANSITION >] s8 ON TRANSITION | Loaic | 1 fe (put, STON (LH! INPUT ag 808 io F { ma Te *) ton {En} tott (En) = = b-asv a 0 0.1 Vor () DENOTES MUX-28 CONNECTIONS switch 1 OUTPUT Figure vo (SEE FIGURE 2) 09 VoL Vo ENABLE DELAY TIME TEST CIRCUIT vgl pe Vb SWITCH ve OUTPUT 50% | J EN MUX-16 Vo | Neto, ass (SEE FIGURE 3.) ! | BI sustalbho V1 \ \ A3(NC) | | be topen 1 A2 82 a8 2a Saa yf OF at (S5-se0) 35v aa (0B) [ GND v- LOGIC INPUT ego, = Re cL (Ax, Enl Logic 502 1 10 (NPUT ke [* D = TST Tt = wT ST > () DENOTES MUX.28 CONNECTIONS Figure 2 BREAK-BEFORE-MAKE TEST CIRCUIT OFF ISOLATION TEST CIRCUIT IVsl ae +15V ISOo fF = 20 tog ~ ALL CHANNELS Vol vt ARE OFF Vig *SVOJEN MUX16 sit O-INCIDA) $9! 51g V1, 16 S14-S8A o NC(DB) oMt, +0.4V en (S\A7% S16(Sgalf-- oO 3 1BS78 A A3(NC) MUX-16 O]A2 (MUX-28} A2 $2-S15 | ar (S2ASAyPO~ al 1BSgB; Vb AO AG B(Da)+ v - Sa(Sge! O/B) GND = a o GND ve L , Locic 5002 1 10 V8 a INPUT ko I pF SW g 8002 Xe - L a avt +t ot Ring _asv Figure 3 () DENOTES MUX.28 CONNECTIONS Figure 4 {) DENOTES MUX-28 CONNECTIONS 13-60 8/89, Rev.CROSSTALK MEASUREMENT CIRCUIT MUX-16/MUX-26 16-CHANNEL/DUAL 8-CHANNEL JFET ANALOG MULTIPLEXERS OVERVOLTAGE MEASUREMENT TEST CIRCUIT VW, vt my Cy = 201g Vs! ; CHANNEL Mol L 7ISON vt ve +5VO1 EN see Ee VenO- En S816(SBa) - ofa) (SYA S88 +0.4V0 A3INC) -_-} NC[DB) $1-Si5 (S14 $70 +5VOA2 MUX-16 ] AJ/NC) \S18~-San. +5V0oJal (MUX-28) a2 +0.4V O_4 AOD v AM O(Da) Sg{Sap) =: D(DB) : ro GND v- IMQ GND ve Vg | | RL et E IBV 2 5082 1 r0pr < Ima _ =v. RMs' L mo T => = = = a = + + ve = Lt = Figure 5 (} DENOTES MUX-28 CONNECTIONS () DENOTES MUX-28 CONNECTIONS APPLICATIONS INFORMATION OVERVOLTAGE V-! CHARACTERISTIC These analog muitiplexers employ ion-implanted JFETs ina switch configuration designed to assure break-before-make ~T TT (B.B.M.) action. The turn-off time is much faster than the a | turn-on time to guarantee B.B.M. over the full operating 15 TEN nd { temperature and input voltage range. Fabricated with JFET processing rather than CMCS, special handling is not tol iy aa necessary to prevent damage to this multiplexer. Because the digital inputs only require a 2.0V logic 1 input level, power- re | consuming pullup resistors are not required for TTL compat- a t | ibility to insure break-before-make switching as is most often | the case with CMOS multiplexers. The digital inputs utilize of PNP input transistors where input current is maximum at the POSITIVE Va CURVE: E= 15V logic O level and drops to that of a reverse-biased diode 5 NEGATIVE Va CURVE: E = +10V (about 10nA) as the input voltage is raised above = 1.4V. 80-3 +10 G10 20 50 Va (VOLTS) The ON resistance, Ron of the analog switches is constant over the wide input voltage range of -15V to +11V with Vsupp.y= + 15V. The overvoltage and supply-loss V-I charac- teristics shown indicate typical performance when the multi- plexer is subjected to abnormal signals. For normal operation, however, positive input voltages should be restricted to 11V (or 4V less than the positive supply). This assures that the Vas of an OFF FET switch remains greater than its Vp, preventing that channel from being falsely turned ON. When operating with negative input voltages, the gate-to- shannel diode will be turned on if the voltage drop across an IN switch exceeds 0.6V. While this condition will cause an srror in the output, it will not damage the switch. In lab tests, he multiplexer output has been loaded with a 0.01uF capaci- or in the circuit of Figure 1. With V;=-10V and Vig= + 10V, the ogic input was driven at a 1kHz rate. The positive-going slew ate was 0.3W/ySec which is equivalent to a normal Ipgs of mA. The negative-going slew rate was 0.7V/usec which is quivalent to a reverse Ipss of 7MA. Note that when switch ne (1) is first turned ON it has a drop of -20V across its 3rminals. In spite of that fact, the current is limited to pproximately twice its normal Ipgs. SUPPLY-LOSS V-I CHARACTERISTIC tp (mA) TTT | Vt=Vv=0V Ven | OV 18 Tas 25C E=-10V 10}+-- 5 -10 -8 6 4 -2 0 2 4 64 8 Va {VOLTS) 13-61 8/89, Rev. A2 ANALOG SWITCHES/MULTIPLEXERS el,MUX-16/MUX-28 16-CHANNEL/DUAL 8-CHANNEL JFET ANALOG MULTIPLEXERS SIMPLIFIED SCHEMATIC (MUX-16) be} PO tyeicat N SWITCH ) CELL OOOOO $ < OF , f) x 5 i \ 1 po | I ! I . ! . Lo | 6 I oe? aE DECODING MATRIX > < h e+ { { i . FOR MUX-28 SWITCH PAIRS S, Sg, Sz Syg,-- - Sg $4g ARE TURNED ON BY A REPROGRAMMED DECOOING MATRIX AND Aq |S NO LONGER USED. THE COMMON ANALOG BUS IS SPLIT IN HALF TO PROVIDE (ORAIN B) OUTPUT. b> 2 < HHH 13-62 8/89, Rev. -