Features
• Features of PM8805 PoE-PD interface
– System in package integrating a double active bridge, hot-swap MOSFET
and PoE-PD interface
– PoE-PD single-signature interface compliant with IEEE 802.3bt
– Detection and support of high power 4-pair applications
– 100 V N-Ch MOSFETs with 0.2 Ω total path resistance for each active
bridge
– Identifies which kind of PSE (standard or legacy) it is connected to and
provides successful IEEE802.3.af/at/bt classification indication through a
combination of the T0, T1 and T2 signals (open drain)
– VFQFPN43 8x8 mm with 6 exposed pads
• Features of PM8804 PWM controller
– PWM peak current mode controller
– Input operating voltage up to 75 V
– Internal high voltage start up regulator with 20 mA capability
– Programmable fixed frequency up to 1 MHz
– Soft start up with settable time
– Soft turn off (optionally disabled)
– Dual 1Apk, low side complementary gate drivers
– GATE2 optionally turned off for reduced consumption
– 80% maximum duty cycle with internal slope compensation
– VFQFPN 3.0x3.0x1.0 16L 0.5 mm pitch
• WEEE compliant
• RoHS compliant
Description
This reference design represents a PoE Class 8 converter designed for high
efficiency conversion over a wide load range. It is based on the PM8805 PoE-PD
interface compliant with the IEEE802.3bt standard, and a DC-DC forward active
clamp converter driven by the PM8804 PWM controller.
The PM8805 system on package device embeds two active bridges and an
IEEE802.3bt compliant Powered Device (PD) interface. It can be used in all medium-
to-high power 2P and 4P high efficiency PoE and PoE+ applications such as point of
sales and retail logistics devices.
The PM8804 PWM controller represents an integrated solution for a smart and
efficient 48 V converter, including a programmable oscillator for the switching
frequency, adjustable slope compensation, dual complementary low-side drivers with
programmable dead time, programmable soft start, soft turn off and a programmable
current sense blanking time.
Product summary
high power PoE PD / 5 V
up to 20 A active clamp
forward evaluation board
STEVAL-
POE003V1
PWM peak current mode
controller for PoE and
telecom systems
PM8804
IEEE802.3bt PoE-PD
interface with integrated
dual-active bridge
PM8805
5V/20A, active clamp forward converter, Power Over Ethernet (PoE) - IEEE
802.3bt compliant reference design
STEVAL-POE003V1
Data brief
DB3653 - Rev 2 - May 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1Specifications
Table 1. Specifications
Parameter Specs
Classification Class 8
Vin at RJ45 connector (J1) From 41.2 to 57 V
Iin at RJ45 connector (J1) 1.0 A max each pair
Vout 5 V +/- 2%
Iout 20 A total max
Max ouput power 100 W max
Efficiency overall peak > 92% @ 13 A
Vin at frontal jack connector (J9) 48 V +/- 2 V
Iin at frontal jack connector (J9) 2.0 A total max
Vin at rear jack connector (J10) 48 V +/- 2 V
Iin at rear jack connector (J10) 2.5 A total max
Operating temperature 0 - 50 °C 20 A full load
STEVAL-POE003V1
Specifications
DB3653 - Rev 2 page 2/12
2System board layout
Figure 1. PCB top assembly
STEVAL-POE003V1
System board layout
DB3653 - Rev 2 page 3/12
3Efficiency measurements
The STEVAL-POE003V1 consists of a POE interface compliant with the last standard IEEE802.3bt, created with
the PM8805 interface and a forward active clamp DC-DC converter that receives a DC voltage from POE
interface.
PM8805 device integrates two N-channel MOSFET bridges, one for every 2-pair of the POE interface, and an
hotswap MOSFET placed in series with the outputs of two bridges.
The following figure shows the efficiency of the single forward converter, and the overall efficiency that also
includes the power losses of the POE interface.
Figure 2. STEVAL-POE003V1 efficiency measurements
The dotted lines give the overall efficiency of the STEVAL-POE003V1 at different DC input voltages applied to
RJ45 connector J1. The continuous lines show the DC-DC forward efficiency, representing a figure of merit of the
standalone converter. The following losses relating to the POE interface are not included:
• RJ45 connector J1
• POE data transformer T1
• Common chokes T7, T8 placed on the two power supplies pairs
• PM8805 interface that integrates dual power mos bridges and a hot swap MOSFET
• Input filter of the forward converter
This efficiency is measured between output test points TP8/TP9 and input test points TP5/TP6 of the forward
converter.
STEVAL-POE003V1
Efficiency measurements
DB3653 - Rev 2 page 4/12
4STEVAL-POE003V1 schematic diagrams
Figure 3. STEVAL-POE003V1 circuit schematic (1 of 3)
STEVAL-POE003V1
STEVAL-POE003V1 schematic diagrams
DB3653 - Rev 2 page 5/12
Figure 4. STEVAL-POE003V1 circuit schematic (2 of 3)
STBY High
Raux +live PoE
AutoClass
AUXF
AUXR
S TBY
RAUX_ MAN
VB
OVP
FAUX_ MAN
OVP
GND
GND
S GN D
VOB
VDC
VB
S TBY
GND
CLS 1
VOUT
RAUX
FAUX
P GD
MODE
S S
D20
BAT46J
S OD 32 3
D40
STBY
U23
TS431AILT
S OT 23 -5
3
5
4
12
R7 5
1k
R0 8 05
R7 6
0R
08 0 5
R1 0 2
22 0
D45
BAT46J
S OD 32 3
R1 1 5
10 0 k
R1 2 2
47K
08 0 5
R1 2 3
1k
R1 3 1
0
TP 3
TP -R ed
J 10
AUX Re ar
1
2
3
Q1 3
2N70 02
S OT -23
C7 8
NM
D44
RAUX
C8 3
1n F
U22
FOD817 AS
4 1
23
TP 4
TP -Blac k
R1 2 6
10
1%
D51
BAS 70
S OD 32 3
R1 2 0
4k3
D46
BAT46J
S OD 32 3
R1 2 9
6K8 -NM
1%
C8 1
22 n F
R1 1 4
4k7
C8 4
1n F
Q1 4
2N70 02
S OT -23
R1 1 6
10 0 k
R6 9
10 0 k
08 0 5
D52
BAS 70 -0 5
S OT 23
D39
FAUX
TP 1
TP -R ed
R1 3 0
2.2K-NM
1%
C8 6
NM
08 0 5
C8 2
1n F
D43
BAT46J
S OD 32 3
J 9
AUX Front
1
2
3
D37
BAT46J
S OD 32 3
U24
TS 24 3 1-AILT-NM
S OT 23
1
3
2
R1 0 1
NM
1%
D47
BAT46J
S OD 32 3
P 1
SLEEP/WKUP
1 2
3 4
D53
BAS 70 -0 5
S OT 23
C8 5
20 K
08 0 5
D41
S TP S 4 S 20 0S
S MC
R1 1 7
4k7
TP 2
TP -Blac k
R1 2 1
20K
08 0 5
D14
BAT46J
S OD 32 3
R1 0 3
12K
1%
R7 7
0R
D42
S TP S 4 S 20 0S
S MC
R1 1 8
0R -NM
R1 0 4
45 K3
1%
R1 1 9
NM
R1 2 7
47 0 K
1%
R1 3 3
10 0 K
R1 0 5
NM
R1 2 8
10K
1%
R6 7
0R -NM
08 0 5
R1 3 2
NM
P 2
SHDN
1 2
3 4
STEVAL-POE003V1
STEVAL-POE003V1 schematic diagrams
DB3653 - Rev 2 page 6/12
Figure 5. STEVAL-POE003V1 circuit schematic (3 of 3)
P owe r circuit
Fe e dba ck circuit
Input Filter
Po werFLAT 5x6
Po werF LAT 5x6
Po werFLAT 5x6
SO T23
EEE FK2 A33 0P
GS L
S GN D
VSN
VSP
S GN D
GS H
GS L
GS H
VSN
VSP
VSP
VSN
P GN D
P GN D
P GN D
Ch a s s is
S GN D
AGND
P GN D
S GN D
AGND
S GN D
S GN D
S GN D
S GN D
GN D
VDC
P GD
VOUT
S S
MODE
R3 1
NM
0603
C3 4
22 00p F
18 12
2KV
R5 4
15 K
1%
C5 0
100nF
25V
0603
C3 8
47uF
1210
16V
C2 1
22 00p F
18 12
2KV
C4 6
1n F
0805
100V
R2 7
3M-NM
20 10
D8
SMAJ5 8A
S MA
D12
BAS7 0
S OD 32 3
L9
1m H
LPS 4 01 8-1 05 ML
1 2
R1 08
0R 05
12 10
C9 5
1nF
08 05
C4 7
2.2uF
25V
06 03
R4 1 NM
L2
0R
1 2
L3
0R
1 2
D13
BAS1 6J
S OD 32 3
C4 1
47 uF
12 10
16V
L1
5.6uH
Co ilcr aft XAL505 0-56 2
1 2
C5 2
10 0p F
Q1 1
P BS S 52 40 T-NM
S OT2 3
R1 5
NM
12 06
D17
BZX84 C1 0
S OT2 3
A C
NC
R1 25
47K
T3
RA7 129 -BL
4
1
2
5
7
11
8
12
10
9
3
6
D49
BAS7 0
S OD 32 3
L4
S ER 201 3-36 2L
1 2
R2 4
0R
1206
J 4
R6 2
NM
08 05
C6 0
22 nF
C3 7
47uF
1210
16V
C5 5
100nF
25 V
06 03
C3 3
4.7 uF
12 10
10 0V
TP 5
TP -R e d
C3 9
1n F
08 05
T4
P OE 12 0P L-xxL_-NM
2 8
4 10
5
1
6
C2 8
NM
0805
C5 1
1nF
0805
100V
U2
PM8804
16QFN_ 3X3X0.75_0. 5
NC2 7
AGND
1
BLK
16
GAT1 9
PG ND 10
PG D 6
FS W
4
SS
2
MODE
13
CS
14
CTL
15
GAT2 11
VC 12
DT
3
VIN 8
NC1 5
Ex P ad 17
Q1 2
P BS S 42 40 T
S OT2 3
C4 8
47nF
1206
200V
C2 9
33 uF
10 0V
10x10.2
C3 2
4.7uF
12 10
10 0V
C2 5
10 0nF
06 03
Q1
STL1 10NS 3LLH7
G4
D5S1
S2
S3
D6
D7
D8
D48
BAS1 6J
S OD 32 3
R3 6
10R
0805
R5 5
12 k
1%
R1 7
22R
TP 8
TP -R e d
R2 6
0R
1206
TP 6
TP -Bla c k
D1
BAS1 6J
S OD 32 3
R2 5
10K
06 03
C7 6
10 0p F
0805
50 V
R3 2
10 R
08 05
R1 6
5R 6-N M
08 05
R5 3
4.7 K 1%
D50
BAS7 0
S OD 32 3
R2 8
0R
0603
D9
BAS1 6J
S OD 32 3
D2
BZX84 C1 0
S OT2 3
A C
NC
R3 4
22 R
TP 14
TP -R e d
Q5
STL110NS3 LLH7
G4
D5S 1
S2
S3
D6
D7
D8
C9 6
2.2 uF
25 V
06 03
R7 8
0R
12 06
U12
TS2 431-AILT-NM
S OT2 3
1
3
2
R2 9
1K
C5 4
2200pF
18 12
2KV
C5 8
100nF
C3 6
47 uF
12 10
16 V
C3 0
NM
08 05
U3
Fa irchild F OD817AS
4 1
23
C4 3
330uF
8x10 .5
16V
R4 0
10k
Q2
STL110N S3LLH7-NM
po werF LAT 5 x6
G4
D5S1
S2
S3
D6
D7
D8
C4 9
NM
12 06
20 0V
TP 11
turr e t
Q7
FD MC86 259 P
G4
S1 D 5
D6
D7
D8
S2
S3
R3 5
1K
C2 3
1nF
0805
100V
TP 9
TP -Bla c k
U4
TS43 1AILT
S OT2 3- 5
3
5
4
12
C3 1
4.7uF
1210
100V
R45 270K
Q8
STL110N S3LLH7-NM
po werF LAT 5 x6
G4
D5S 1
S2
S3
D6
D7
D8
R4 8
10R
R5 2
20 k
1%
R4 4
0R 05
12 10
C4 2
47uF
1210
16V
C2 6
1nF
08 05
10 0V
R5 0
22 0R
1%
R4 3 13 0K
Q4
BS C190 N15NS 3
G4
D5S1
S2
S3
D6
D7
D8
R5 1
56 0R
R3 0
NM
08 05
C2 7
NM
0805
C5 6
NM
C3 5
22 00p F -NM
1812
2KV Q1 0
P BS S 52 40 T-NM
S OT2 3
C5 9
220pF
R6 1
3.3 k
0805
R3 3
5R 6-N M
0805
C4 0
47 uF
12 10
16 V
C7 5
10 0p F
0805
50 V
R3 8
10R
0805
C2 0 NM
1812
2KV
R1 24
10 R
08 05
C2 2
22 00p F -NM
1812
2KV
C5 7
22 nF
TP 12
TP -R e d
D16
BAS1 6J
S OD 32 3
C4 5
100nF
25V
06 03
Q9
P BS S 42 40 T
S OT2 3
C5 3 33nF
R4 9
0R
Q3
MMBT390 4LT1-N M
T2
NM
2
3 4
1
R3 7
10K
TP 10
turr e t
TP 7
TP -R e d
J 6
C4 4
0.1 uF
0603
25V
D11
BZX84 C1 0-NM
S OT2 3
A C
NC
TP 13
TP -R e d
R5 6
10K
R4 7
2K
R4 6 91 K
C2 4
4.7uF
1210
100V
D15
VOUT Led
STEVAL-POE003V1
STEVAL-POE003V1 schematic diagrams
DB3653 - Rev 2 page 7/12
Contents
1Specifications .....................................................................2
2System board layout...............................................................3
3Efficiency measurements ..........................................................4
4STEVAL-POE003V1 schematic diagrams ...........................................5
Revision history ........................................................................8
STEVAL-POE003V1
Contents
DB3653 - Rev 2 page 9/12
List of figures
Figure 1. PCB top assembly .................................................................3
Figure 2. STEVAL-POE003V1 efficiency measurements ..............................................4
Figure 3. STEVAL-POE003V1 circuit schematic (1 of 3) ..............................................5
Figure 4. STEVAL-POE003V1 circuit schematic (2 of 3) ..............................................6
Figure 5. STEVAL-POE003V1 circuit schematic (3 of 3) ..............................................7
STEVAL-POE003V1
List of figures
DB3653 - Rev 2 page 11/12
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STEVAL-POE003V1
DB3653 - Rev 2 page 12/12
