1
TP2011/TP2012/TP2014
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1
.
2
Ultra
-
Power
200nA
,
1.6V,
RRIO,
Push
-
Pull Output
Comparator
s
Features
Ultra-Low Supply Current: 200 nA per channel
Fast Response Time: 13 μs Propagation Delay,
with 100 mV Overdrive
Internal Hysteresis for Clean Switching
Offset Voltage: ± 2.0 mV Maximum
Offset Voltage Temperature Drift: 0.3 μV/°C
Input Bias Current: 6 pA Typical
Input Common-Mode Range Extends 200 mV
Push-Pull Output with ±25 mA Drive Capability
Output Latch (TP2011N Only)
No Phase Reversal for Overdriven Inputs
Low Supply Voltage: 1.6V to 5.5V
Applications
Battery Monitoring / Management
Alarm and Monitoring Circuits
Peak and Zero-crossing Detectors
Threshold Detectors/Discriminators
Sensing at Ground or Supply Line
Logic Level Shifting or Translation
Window Comparators
Oscillators and RC Timers
Mobile Communications and Notebooks
Ultra-Low-Power Systems
Descriptions
The TP201x family of push-pull output comparators
features the world-class lowest nano-power (250nA
maximum) and fast 13μs response time capability,
allowing operation from 1.6V to 5.5V. Input
common-mode range beyond supply rails makes the
TP201x an ideal choice for power-sensitive,
low-voltage (2-cell) applications.
The TP201x push-pull output supports rail-to-rail output
swing and interfaces with TTL /CMOS logic, and are
capable of driving heavy DC or capacitive loads. The
internal input hysteresis eliminates output switching
due to internal input noise voltage, reducing current
draw. The output limits supply current surges and
dynamic power consumption while switching. Beyond
the rails input and rail-to-rail output characteristics allow
the full power-supply voltage to be used for signal
range.
Micro-sized packages provide options for portable and
space-restricted applications. The single (TP2011) is
available in SC70-5, and the dual (TP2012) is available
in SOT23-8.
The related TP2015/6/8 family of comparators from
3PEAK has an open-drain output. Used with a pull-up
resistor, these devices can be used as level-shifters for
any desired voltage up to 10V and in wired-OR logic.
3PEAK and the 3PEAK logo are registered trademarks of
3PEAK Incorporated. All other trademarks are the property of their
respective owners.
Typical Application of TP201x Comparators
Related Products
Fast 68ns, Low Power, Internal Hysteresis,
±3mV Maximum VOS, – 0.2V to VDD + 0.2V RRI,
Push-Pull (CMOS/TTL) Output Comparators
TP1941/TP1941N
/TP1942/TP1944
Fast 68ns, Low Power, Internal Hysteresis,
±3mV Maximum VOS, – 0.2V to VDD + 0.2V RRI,
Open-Drain Output Comparators
TP1945/TP1945N
/TP1946/TP1948
950ns, 3µA, 1.8V, ±2.5mV VOS-MAX, Internal
Hysteresis, RRI, Push-Pull Output Comparators
TP1931
/TP1932/TP1934
950ns, 3µA, 1.8V, ±2.5mV VOS-MAX, Internal
Hysteresis, RRI, Open-Drain Comparators
TP1935
/TP1936/TP1938
Ultra-low 200nA, 13µs, 1.6V, ±2mV VOS-MAX,
Internal Hysteresis, RRI, Open-Drain Output
Comparators
TP2015
/TP2016/TP2018
DEVICE DESCRIPTION
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Pin Configuration
(Top View)
Order Information
Model Name Order Number Package Transport Media, Quantity Marking
Information
TP2011
TP2011-TR 5-Pin SOT23 Tape and Reel, 3000 C1TYW (1)
TP2011-CR 5-Pin SC70 Tape and Reel, 3000 C1CYW (1)
TP2011-SR 8-Pin SOIC Tape and Reel, 4000 2011S
TP2011U TP2011U-TR 5-Pin SOT23 Tape and Reel, 3000 C1AYW (1)
TP2011U-CR 5-Pin SC70 Tape and Reel, 3000 C1BYW (1)
TP2011U2 TP2011U2-TR 5-Pin SOT23 Tape and Reel, 3000 C1EYW (1)
TP2011N TP2011N-TR 6-Pin SOT23 Tape and Reel, 3000 C1NYW (1)
TP2012
TP2012-TR 8-Pin SOT23 Tape and Reel, 3000 C12YW (1)
TP2012-SR 8-Pin SOIC Tape and Reel, 4000 2012S
TP2012-VR 8-Pin MSOP Tape and Reel, 3000 2012V
TP2014 TP2014-SR 14-Pin SOIC Tape and Reel, 2500 TP2014S
TP2014-TR 14-Pin TSSOP Tape and Reel, 3000 TP2014T
Note (1): ‘YW’ is date coding scheme. 'Y' stands for calendar year, and 'W' stands for single workweek coding scheme.
Pin Functions
N/C: No Connection.
–IN: Inverting Input of the Comparator. Voltage range of
this pin can go from V– – 0.3V to V+ + 0.3V.
+IN: Non-Inverting Input of Comparator. This pin has the
same voltage range as –IN.
V+ (VDD): Positive Power Supply. Typically the voltage is
from 1.6V to 5.5V. Split supplies are possible as long as
the voltage between V+ and V– is between 1.6V and
5.5V. A bypass capacitor of 0.1μF as close to the part as
possible should be used between power supply pins or
between supply pins and ground.
V– (VSS): Negative Power Supply. It is normally tied
to ground. It can also be tied to a voltage other than
ground as long as the voltage between V+ and V– is
from 1.6V to 5.5V. If it is not connected to ground,
bypass it with a capacitor of 0.1μF as close to the
part as possible.
OUT: Comparator Output. The voltage range
extends to within millivolts of each supply rail.
LATCH: Active Low Latch enable. Latch enable
threshold is 1/2V+ above negative supply rail.
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TP
2011/
TP
2012/
TP
2014
Ultra
-
Low Power 200nA, 1.6V, RRIO, Push
-
Pull Output
Comparator
s
www.3peakic.com.cn
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Absolute Maximum Ratings
Note 1
Supply Voltage: V+ – V–....................................6.0V
Input Voltage............................. V– – 0.3 to V+ + 0.3
Input Current: +IN, –IN, Note 2..........................±10mA
Output Current: OUT.................................... ±25mA
Output Short-Circuit Duration Note 3…......... Indefinite
Operating Temperature Range.......–40°C to 85°C
Maximum Junction Temperature................... 150°C
Storage Temperature Range.......... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ......... 260°C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any
Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power
supply, the input current should be limited to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply
voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The
specified values are for short traces connected to the leads.
ESD, Electrostatic Discharge Protection
Symbol Parameter Condition Minimum Level Unit
HBM Human Body Model ESD ANSI/ESDA/JEDEC JS-001 2 kV
CDM Charged Device Model ESD ANSI/ESDA/JEDEC JS-002 1 kV
Thermal Information
Package RΘJA RΘJC(Top) Unit
8-Pin SOP 112.4 64.1 °C/W
14-Pin SOP 96.7 46.7 °C/W
14-Pin TSSOP 108.1 42.7 °C/W
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Electrical Characteristics
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 27°C.
VDD = +1.6V to +5.5V, VIN+ = VDD, VIN- = 1.2V, CL =15pF.
SYMBOL
PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage ●
1.6 5.5 V
VOS Input Offset Voltage Note 1 VCM = 1.2V -3.0 0.5 +3.0 mV
VOS Input Offset Voltage Note 1 VCM = 0V -3.0 0.5 +3.0 mV
VOS Input Offset Voltage Note 1 VCM = Vdd -4.0 0.5 +4.0 mV
VOS TC Input Offset Voltage Drift Note 1 VCM = 1.2V 0.3 μV/°C
VHYST Input Hysteresis Voltage Note 1 VCM = 1.2V 2 4 7 mV
IB Input Bias Current VCM = 1.2V 6 pA
IOS Input Offset Current VCM = 1.2V 4 pA
RIN Input Resistance > 100 GΩ
CIN Input Capacitance Differential
Common Mode 2
4 pF
CMRR Common Mode Rejection Ratio VCM = VSS to VDD 50 82 dB
VCM Common-mode Input Voltage Range V– V+ V
PSRR Power Supply Rejection Ratio 60 90 dB
VOH High-Level Output Voltage IOUT=-1mA ●
VDD-0.3 V
VOL Low-Level Output Voltage IOUT=1mA ●
VSS+0.3
V
ISC Output Short-Circuit Current Sink or source current 25 mA
IQ Quiescent Current per Comparator 160 200 250 nA
tR Rising Time 5 ns
tF Falling Time 5 ns
tPD+ Propagation Delay (Low-to-High) Overdrive=100mV, VIN- =1.2V 13 19 μs
tPD- Propagation Delay (High-to-Low) Overdrive=100mV, VIN- =1.2V 14 18 μs
tPD-SKEW Propagation Delay Skew Note 2 Overdrive=100mV, VIN- =1.2V 1 5 μs
Note 1: The input offset voltage is the average of the input-referred trip points. The input hysteresis is the difference between the input-referred
trip points.
Note 2: Propagation Delay Skew is defined as: tPDSKEW = tPD+ - tPD-.
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Typical Performance Characteristics
Input Offset Voltage vs. Temperature
-5
-2.5
0
2.5
5
-50 -25 0 25 50 75 100
TEMPERATURE (℃)
Input Offset Voltage (mV)
5V
1.8V
V
CM
=1.2V
Input Hysteresis Voltage vs. Temperature
0
2
4
6
8
10
-50 -25 0 25 50 75 100
TEMPERATURE (
℃
)
Input Hysteresis Voltage (mV)
5V
1.8V
V
CM
=1.2V
Quiescent Current vs. Temperature
0
200
400
600
800
1000
-50 -25 0 25 50 75 100
TEMPERATURE (
℃
)
Quiescent Current (nA)
5V
V
CM
=1.2V
1.8V
Propagation Delay vs. Temperature
0
5
10
15
20
25
-50 0 50 100
TEMPERATURE (
℃
)
Propagation Delay (μs)
t
pd-
@V
DD
=5V t
pd+
@V
DD
=5V
t
pd-
@V
DD
=1.8V
VCM=1.2V
t
pd+
@V
DD
=1.8V
Propagation Delay Skew vs. Temperature
-8
-4
0
4
8
-50 0 50 100
TEMPERATURE (
℃
)
Propagation Delay Skew (μs)
1.8V
V
CM
=1.2V
5V
Propagation Delay vs. Overdrive Voltage
0
20
40
60
80
100
10 100 1V
Common Mode Voltage (mV)
Propagation Delay (μs)
V
DD
=5V
V
CM
=2.5V
t
pd+
t
pd-
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Typical Performance Characteristics
Propagation Delay Skew vs. Overdrive Voltage
-20
-15
-10
-5
0
5
10
15
20
10 100 1V
Common Mode Voltage (mV)
Propagation Delay Skew (μs)
V
DD
=5V
V
CM
=2.5V
Propagation Delay vs. Overdrive Voltage
0
20
40
60
80
100
10 100 1V
Common Mode Voltage (mV)
Propagation Delay (μs)
V
DD
=1.8V
V
CM
=0.9V
t
pd+
t
pd-
Propagation Delay Skew vs. Overdrive Voltage
-20
-15
-10
-5
0
5
10
15
20
10 100 1V
Common Mode Voltage (mV)
Propagation Delay Skew (μs)
V
DD
=1.8V
V
CM
=0.9V
Input Offset Voltage vs. Common Mode Voltage
-5
-2.5
0
2.5
5
0 1 2 3 4 5
Common Mode Voltage (V)
Input Offset Voltage (mV)
V
DD
=5V
Input Offset Voltage vs. Common Mode Voltage
-5
-2.5
0
2.5
5
0 0.5 1 1.5 2
Common Mode Voltage (V)
Input Offset Voltage (mV)
V
DD
=1.8V
Input Hysteresis Voltage vs. Common Mode Voltage
0
2
4
6
8
10
0 1 2 3 4 5
Common Mode Voltage (V)
Inpur Hysteresis Voltage (mV)
V
DD
=5V
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Typical Performance Characteristics
Input Hysteresis Voltage vs. Common Mode Voltage
0
2
4
6
8
10
0 0.5 1 1.5 2
Common Mode Voltage (V)
Input Hysteresis Voltage (mV)
V
DD
=1.8V
Quiescent Current vs. Common Mode Voltage
0
200
400
600
800
1000
0 1 2 3 4 5
Common Mode Voltage (V)
Quiescent Current (nA)
V
DD
=5V
Quiescent Current vs. Common Mode Voltage
0
200
400
600
800
1000
0 0.5 1 1.5 2
Common Mode Voltage (V)
Quiescent Current (nA)
V
DD
=1.8V
Propagation Delay V.S. Common Mode Voltage
0
5
10
15
20
0 1 2 3 4 5
Common Mode Voltage (V)
Propagation Delay (μs)
V
DD
=5V
t
pd+
t
pd-
Propagation Delay vs. Common Mode Voltage
0
5
10
15
20
0 0.5 1 1.5 2
Common Mode Voltage (V)
Propagation Delay (μs)
V
DD
=1.8V
t
pd+
t
pd-
Propagation Delay Skew vs. Common Mode Voltage
-5
-2.5
0
2.5
5
0 1 2 3 4 5
Common Mode Voltage (V)
Propagation Delay Skew (μs)
V
DD
=5V
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Typical Performance Characteristics
Propagation Delay Skew vs. Common Mode Voltage
-5
-2.5
0
2.5
5
0 0.5 1 1.5 2
Common Mode Voltage (V)
Propagation Delay Skew (μs)
V
DD
=1.8V
Input Offset Voltage Distribution
0%
10%
20%
30%
40%
50%
60%
-6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6
Input Offset Voltage (mV)
Percentage of Occurences
1462 Samples
V
DD
=5V
V
CM
=1.2V
Input Hysteresis Voltage Distribution
0%
10%
20%
30%
40%
50%
60%
0 1 2 3 4 5 6 7 8 9 10 11 12
Input Hysteresis Voltage (mV)
Percentage of Occurences
1462 Samples
V
DD
=5V
V
CM
=1.2V
Quiescent Current Distribution
0%
5%
10%
15%
20%
25%
30%
35%
40%
140 160 180 200 220 240 260
Quiscent Current (nA)
Percentage of Occurences
1462 Samples
V
DD
=5V
V
CM
=1.2V
Low to High Propagation Delay Distribution
0%
10%
20%
30%
40%
50%
60%
70%
12 14 16 18 20 22 24
Propagation Low to High Delay (μs)
Percentage of Occurences
1462 Samples
V
DD
=5V
V
CM
=1.2V
100mV overdrive
High to Low Propagation Delay Distribution
0%
5%
10%
15%
20%
25%
30%
35%
40%
45%
10 12 14 16 18 20 22
Propagation High to Low Delay (μs)
Percentage of Occurences
1462 Samples
V
DD
=5V
V
CM
=1.2V
100mV overdrive
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Typical Performance Characteristics
Propagation Delay Skew Distribution
0%
5%
10%
15%
20%
25%
30%
35%
40%
45%
50%
-2 0 2 4 6 8 10
Propagation Delay Skew (μs)
Percentage of Occurences
1462 Samples
V
DD
=5V
V
CM
=1.2V
100mV overdrive
Output Voltage Headroom vs. Output Load Current
0
1
2
3
4
5
0 5 10 15
Output Load Current (mA)
Output Voltage (V)
V
DD
=5V
Sourcing Current
Sinking Current
Output Voltage Headroom vs. Output Load Current
0
0.5
1
1.5
2
0.0 0.5 1.0 1.5 2.0
Output Load Current (mA)
Output Voltage (V)
V
DD
=1.8V
Sourcing Current
Sinking Current
Output Voltage Headroom vs. Supply Voltage
0
100
200
300
400
1 2 3 4 5
Supply Voltage (V)
Output Voltage (mV)
I
OUT
=±1mA
V
OH
V
OL
Output Short Current vs. Supply Voltage
0
5
10
15
20
25
30
1 2 3 4 5
Supply Voltage (V)
Short Current (mA)
I
sinking
I
sourcing
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Operation
The TP201x family single-supply comparators feature
internal hysteresis, high speed, and low power. Input
signal range extends beyond the negative and positive
power supplies. The output can even extend all the way
to the negative supply. The input stage is active over
different ranges of common mode input voltage.
Rail-to-rail input voltage range and low-voltage
single-supply operation make these devices ideal for
portable equipment.
Applications Information
Inputs
The TP201x comparator family uses CMOS transistors at the input which prevent phase inversion when the input pins
exceed the supply voltages. Figure 1 shows an input voltage exceeding both supplies with no resulting phase
inversion.
-2
0
2
4
6
Time (100μs/div)
Vout Voltage (mV)
V
DD
=5V
Input Voltage
Output Voltage
Figure 1. Comparator Response to Input Voltage
Chip
1KΩ
1KΩ Core
+In
-In
Figure 2. Equivalent Input Structure
The electrostatic discharge (ESD) protection input structure of two back-to-back diodes and 1kΩ series resistors are
used to limit the differential input voltage applied to the precision input of the comparator by clamping input voltages
that exceed supply voltages, as shown in Figure 2. Large differential voltages exceeding the supply voltage should be
avoided to prevent damage to the input stage.
Internal Hysteresis
Most high-speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This
tends to occur when the voltage on one input is at or equal to the voltage on the other input. To counter the parasitic
effects and noise, the TP201x implements internal hysteresis.
The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input
voltage. The difference between the trip points is the hysteresis. When the comparator’s input voltages are equal, the
hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking the input out of
the region where oscillation occurs. Figure 3 illustrates the case where IN- is fixed and IN+ is varied. If the inputs were
reversed, the figure would look the same, except the output would be inverted.
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Vin-
Vtr
Vtf
0
VDD
Hysteresis
Band
Vi
Time
Non-Inverting Comparator Output
Vhyst=Vtr-Vtf
Vos=Vtr+Vtf
2-Vin-
0
VDD
Inverting Comparator Output
Vin-
Vtr
Vtf
Hysteresis
Band
Vi
Time
Vhyst=Vtr-Vtf
Vos=Vtr+Vtf
2-Vin-
Figure 3. Comparator’s hysteresis and offset
External Hysteresis
Greater flexibility in selecting hysteresis is achieved by using external resistors. Hysteresis reduces output chattering
when one input is slowly moving past the other. It also helps in systems where it is best not to cycle between high and
low states too frequently (e.g., air conditioner thermostatic control). Output chatter also increases the dynamic supply
current.
Non-Inverting Comparator with Hysteresis
A non-inverting comparator with hysteresis requires a two-resistor network, as shown in Figure 4 and a voltage
reference (Vr) at the inverting input.
Figure 4. Non-Inverting Configuration with Hysteresis
When Vi is low, the output is also low. For the output to switch from low to high, Vi must rise up to Vtr. When Vi is high,
the output is also high. In order for the comparator to switch back to a low state, Vi must equal Vtf before the
non-inverting input V+ is again equal to Vr.
tr
V
R2
R1
R2
r
V
tf
V
21
1
)
tf
V
DD
(V
r
V
RR
R
r
V
R2
21
tr
VRR
DD
V
R2
1
r
V
R2
21
tf
VRRR
DD
V
R2
1
tf
V
tr
V
hyst
VR
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Inverting Comparator with Hysteresis
The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply
voltage (VDD), as shown in Figure 5.
Figure 5. Inverting Configuration with Hysteresis
When Vi is greater than V+, the output voltage is low. In this case, the three network resistors can be presented as
paralleled resistor R2 || R3 in series with R1. When Vi at the inverting input is less than V+, the output voltage is high.
The three network resistors can be represented as R1 ||R3 in series with R2.
DD
V
23
||
1
2
tr
V
RRR
R
DD
V
13
||
2
3
||
2
tf
V
RRR
RR
DD
V
32
||
1
2
||
1
tf
V
tr
V
hyst
V
RRR
RR
Low Input Bias Current
The TP201x family is a CMOS comparator family and features very low input bias current in pA range. The low input
bias current allows the comparators to be used in applications with high resistance sources. Care must be taken to
minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details.
PCB Surface Leakage
In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be
considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity
conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5pA of current to flow,
which is greater than the TP201x’s input bias current at +27°C (±6pA, typical). It is recommended to use multi-layer
PCB layout and route the comparator’s -IN and +IN signal under the PCB surface.
The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is
biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 6 for Inverting
configuration application.
1. For Non-Inverting Configuration:
a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface.
b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the same reference as the
comparator.
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
2. For Inverting Configuration:
a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as
the comparator (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface.
Figure 6. Example Guard Ring Layout for Inverting Comparator
Ground Sensing and Rail to Rail Output
The TP201x family implements a rail-to-rail topology that is capable of swinging to within 10mV of either rail. Since the
inputs can go 300mV beyond either rail, the comparator can easily perform ‘true ground’ sensing.
The maximum output current is a function of total supply voltage. As the supply voltage of the comparator increases,
the output current capability also increases. Attention must be paid to keep the junction temperature of the IC below
150°C when the output is in continuous short-circuit condition. The output of the amplifier has reverse-biased ESD
diodes connected to each supply. The output should not be forced more than 0.5V beyond either supply, otherwise
current will flow through these diodes.
ESD
The TP201x family has reverse-biased ESD protection diodes on all inputs and output. Input and output pins can not
be biased more than 300mV beyond either supply rail.
Power Supply Layout and Bypass
The TP201x family’s power supply pin should have a local bypass capacitor (i.e., 0.01μF to 0.1μF) within 2mm for
good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger) within 100mm to provide large,
slow currents. This bulk capacitor can be shared with other analog parts.
Good ground layout improves performance by decreasing the amount of stray capacitance and noise at the
comparator’s inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and place
external components as close to the comparator’ pins as possible.
Proper Board Layout
The TP201x family is a series of fast-switching, high-speed comparator and requires high-speed layout considerations.
For best results, the following layout guidelines should be followed:
1. Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane.
2. Place a decoupling capacitor (0.1μF ceramic, surface-mount capacitor) as close as possible to supply.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
4. Solder the device directly to the PCB rather than using a socket.
5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. The topside ground plane should be placed
between the output and inputs.
6. The ground pin ground trace should run under the device up to the bypass capacitor, thus shielding the inputs
from the outputs.
14 REV1.2 www.3peakic.com.cn
TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Typical Applications
IR Receiver
The TP2011 is an ideal candidate to be used as an infrared receiver shown in Figure 7. The infrared photo diode
creates a current relative to the amount of infrared light present. The current creates a voltage across RD. When this
voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions. Optional Ro
provides additional hysteresis for noise immunity.
Vo
Ro
R2
VDD
R1
TP2011
RD
Figure 7. IR Receiver
Relaxation Oscillator
A relaxation oscillator using TP2011 is shown in Figure 8. Resistors R1 and R2 set the bias point at the comparator's
inverting input. The period of oscillator is set by the time constant of R4 and C1. The maximum frequency is limited by
the large signal propagation delay of the comparator. TP2011’s low propagation delay guarantees the high frequency
oscillation.
If the inverted input (VC1) is lower than the non-inverting input (VA), the output is high which charges C1 through R4 until
VC1 is equal to VA. The value of VA at this point is
2
R
3
R||
1
R
2
R
DD
V
A1
V
At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is
3
R||
2
R
1
R
3
R||
2
R
DD
V
A2
V
If R1=R2=R3, then VA1=2VDD /3, and VA2= VDD/3
The capacitor C1 now discharges through R4, and the voltage VC decreases till it is equal to VA2, at which point the
comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to
discharge C1 from 2VDD/3 to VDD/3. Hence the frequency is:
1
C
4
Rln22
1
Freq
15
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Vo
R3
R2
VDD
R1
T2011
R4
C1
VC1
t
VO
R1=R2=R3
2/3VDD
1/3VDD
t
VC1
VA
Figure 8. Relaxation Oscillator
Windowed Comparator
Figure 9. shows one approach to designing a windowed comparator using a single TP2012 chip. Choose different
thresholds by changing the values of R1, R2, and R3. OutA provides an active-low undervoltage indication, and OutB
gives an active-low overvoltage indication. ANDing the two outputs provides an active-high, power-good signal. When
input voltage Vi reaches the overvoltage threshold VOH, the OutB gets low. Once Vi falls to the undervoltage threshold
VUH, the OutA gets low. When VUH<Vi<VOH, the AND Gate gets high.
1
)/R
3
R
2
R
1
(R
r
V
OH
V
)
2
R
1
)/(R
3
R
2
R
1
(R
r
V
UH
V
OutA+InB
+InA
-InB
-InA
TP2012
OutB
UnderVolt
OverVolt
Power
Good
AND
Gate
Vr
R3
R1
Vi
R2
Figure 9. Windowed Comparator
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Package Outline Dimensions
SOT23-5 / SOT23-6
Symbol
Dimensions
In Millimeters
Dimensions
In Inches
Min Max Min Max
A1 0.000 0.100 0.000 0.004
A2 1.050 1.150 0.041 0.045
b 0.300 0.400 0.012 0.016
D 2.820 3.020 0.111 0.119
E 1.500 1.700 0.059 0.067
E1 2.650 2.950 0.104 0.116
e 0.950TYP 0.037TYP
e1 1.800 2.000 0.071 0.079
L1 0.300 0.460 0.012 0.024
θ 0° 8° 0° 8°
17
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Package Outline Dimensions
SC-70-5 / SC-70-6 (SOT353 / SOT363)
Symbol
Dimensions
In Millimeters
Dimensions In
Inches
Min Max Min Max
A1 0.000 0.100 0.000 0.004
A2 0.900 1.000 0.035 0.039
b 0.150 0.350 0.006 0.014
C 0.080 0.150 0.003 0.006
D 2.000 2.200 0.079 0.087
E 1.150 1.350 0.045 0.053
E1 2.150 2.450 0.085 0.096
e 0.650TYP 0.026TYP
e1 1.200 1.400 0.047 0.055
L1 0.260 0.460 0.010 0.018
θ 0° 8° 0° 8°
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
D
E1
b
E
A1
A2
e
θ
L1
C
Package Outline Dimensions
SO-8 (SOIC-8)
Symbol
Dimensions
In Millimeters
Dimensions In
Inches
Min Max Min Max
A1 0.100 0.250 0.004 0.010
A2 1.350 1.550 0.053 0.061
b 0.330 0.510 0.013 0.020
C 0.190 0.250 0.007 0.010
D 4.780 5.000 0.188 0.197
E 3.800 4.000 0.150 0.157
E1 5.800 6.300 0.228 0.248
e 1.270TYP 0.050TYP
L1 0.400 1.270 0.016 0.050
θ 0° 8° 0° 8°
19
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Package Outline Dimensions
MSOP-8
Symbol
Dimensions
In Millimeters
Dimensions In
Inches
Min Max Min Max
A 0.800 1.200 0.031 0.047
A1 0.000 0.200 0.000 0.008
A2 0.760 0.970 0.030 0.038
b 0.30 TYP 0.012 TYP
C 0.15 TYP 0.006 TYP
D 2.900 3.100 0.114 0.122
e 0.65 TYP 0.026
E 2.900 3.100 0.114 0.122
E1 4.700 5.100 0.185 0.201
L1 0.410 0.650 0.016 0.026
θ 0° 6° 0° 6°
E1
e
E
A1
A2
A
D
L1 L2
L
R
R1
θ
b
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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Package Outline Dimensions
SO-14 (SOIC-14)
Symbol
Dimensions
In Millimeters
MIN TYP MAX
A 1.35 1.60 1.75
A1 0.10 0.15 0.25
A2 1.25 1.45 1.65
b 0.36 0.49
D 8.53 8.63 8.73
E 5.80 6.00 6.20
E1 3.80 3.90 4.00
e 1.27 BSC
L 0.45 0.60 0.80
L1 1.04 REF
L2 0.25 BSC
θ 0° 8°
21
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Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Package Outline Dimensions
TSSOP-14
Symbol
Dimensions
In Millimeters
MIN TYP MAX
A - - 1.20
A1 0.05 - 0.15
A2 0.90 1.00 1.05
b 0.20 - 0.28
c 0.10 - 0.19
D 4.86 4.96 5.06
E 6.20 6.40 6.60
E1 4.30 4.40 4.50
e 0.65 BSC
L 0.45 0.60 0.75
L1 1.00 REF
L2 0.25 BSC
R 0.09 - -
θ 0° - 8°
E
e
E1
A1
A2
A
D
L1 L2
L
R
R1
θ
c