General Description
The MAX4397DA/SA dual SCART switch matrices route
audio and video signals between an MPEG encoder
and two external SCART connectors under I2C control,
and meets the requirements of EN50049-1, IEC 933-1,
Canal+, and BSkyB standards.
The video and audio channels feature input source selec-
tion multiplexers, input buffers, and output buffers for rout-
ing all inputs to selected outputs. The MAX4397DA audio
encoder input is differential DC-coupled, while the
MAX4397SA audio encoder input is single-ended AC-cou-
pled. Except for the MAX4397DA’s audio encoder input,
all other inputs and outputs are AC-coupled with internal
DC-biasing set to predefined levels.
The MAX4397DA/SA provide programmable gain control
from +5dB to +7dB in 1dB steps for Red, Green, and
Blue component video signals. All other video outputs
have a fixed +6dB gain. Additional features include an
internal Luma and Chroma (Y/C) mixer that generates a
Composite video signal (CVBS) to supply an RF
modulator output and internal video reconstruction low-
pass filters with passband ripple between -1dB and
+1dB from 100kHz to 5.5MHz. The MAX4397DA/SA TV
audio channel feature clickless switching and program-
mable volume control from -56dB to +6dB in 2dB steps.
The VCR audio output also has programmable gain for
-6dB, 0dB, or +6dB. The device also generates
monaural audio from left and right stereo inputs.
All audio drivers deliver a 3.0VRMS minimum output.
The MAX4397DA/SA operate with standard 5V and 12V
power supplies and support slow-switching and fast-
switching signals. The I2C interface programs the gain
and volume control, and selects the input source
for routing.
The MAX4397DA/SA are available in a compact 48-pin
thin QFN package and are specified over the 0°C to
+70°C commercial temperature range.
Applications
Satellite Set-Top Boxes
Cable Set-Top Boxes
TVs
VCRs
DVDs
Features
♦Video Outputs Drive 2VP-P into 150Ω
♦Audio Outputs Drive 3VRMS into 10kΩ
♦Clickless, Popless Audio Gain Control
and Switching
♦AC-Coupled Video Inputs with Internal Clamp
and Bias
♦DC-Coupled Video Outputs
♦Composite Video Signal Created Internally from
Y/C Inputs
♦Internal Video Reconstruction Filters Provide
-40dB at 27MHz
♦Differential (MAX4397DA) or Single-Ended
(MAX4397SA) Audio Encoder Input
♦Red/Chroma Switch for Bidirectional I/O
♦I2C-Programmable RGB Gain from +5dB to +7dB
♦I2C-Programmable Audio Gain Control from +6dB
to -56dB
♦Meets EN50049-1, IEC 933-1, Canal+, and BSkyB
Requirements
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-0645; Rev 1; 5/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration and Typical Application Circuits appear at
end of data sheet.
System Block Diagram appears at end of data sheet.
EVALUATION KIT
AVAILABLE
PART TEMP
RANGE
PIN-PACKAGE
PKG
CODE
MAX4397DACTM
0°C to +70°C 48 Thin QFN-EP*
(7mm x 7mm)
T4877-6
MAX4397SACTM
0°C to +70°C 48 Thin QFN-EP*
(7mm x 7mm)
T4877-6
*EP = Exposed paddle.
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, and VVID to GNDVID,SET = 100kΩnominal, RLOAD = 150Ω, TA= 0°C to +70°C, unless otherwise noted. Typical
values are at TA = +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VVID to GNDVID........................................................-0.3V to +6V
V12 to GNDAUD .....................................................-0.3V to +14V
VAUD to GNDAUD ....................................................-0.3V to +6V
GNDAUD to GNDVID ............................................-0.1V to +0.1V
All Video Inputs, ENCIN_FS, VCRIN_FS,
SET to GNDVID......................................-0.3V to (VVID + 0.3V)
All Audio Inputs,
AUDBIAS to GNDAUD .........................-0.3V to (VAUD + 0.3V)
SDA, SCL, DEV_ADDR to GNDVID ..........................-0.3V to +6V
All Audio Outputs, TV_SS,
VCR_SS to GNDAUD...............................-0.3V to (V12 + 0.3V)
All Video Outputs, TVOUT_FS to VVID, VAUD,
GNDAUD, GNDVID ................................................Continuous
All Audio Outputs to VVID, VAUD, V12,
GNDVID, GNDAUD ................................................Continuous
Continuous Power Dissipation (TA= +70°C)
48-Pin Thin QFN (derate 27mW/°C above +70°C)......2105.3mW
Operating Temperature Range...............................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VVID Supply Voltage Range VVID Inferred from video gain test at 4.75V
and 5.2V
4.75
5.0
5.25
V
VAUD Supply Voltage Range VAUD Inferred from audio gain test at 4.75V
and 5.2V
4.75
5.0
5.25
V
V12 Supply Voltage Range V12 Inferred from slow switching levels
11.4 12.0 12.6
V
VVID Quiescent Supply Current IVID_Q All video output amplifiers are enabled,
no load 69 100 mA
VVID Standby Supply Current IVID_S
All video output amplifiers are in shutdown,
and TV_FS_OUT driver is in shutdown, no
load
40 60 mA
VAUD Quiescent Supply Current
IAUD_Q
No load 2.4 6 mA
V12 Quiescent Supply Current I12_Q No load 3.6 6 mA
VIDEO CHARACTERISTICS
CVBS and Y/C, 1VP-P input
+5.5 +6.0 +6.5
+4.5 +5.0 +5.5
+5.5 +6.0 +6.5
Voltage Gain G_V R,G,B, 1VP-P input, (programmable gain
control)
+6.5 +7.0 +7.5
dB
LP Filter Passband Flatness TA = +25°C, f = 5.5MHz, VIN = 1VP-P -1
-0.52
+1 dB
LP Filter Attenuation at 27MHz TA = +25°C, f = 27MHz, VIN = 1VP-P 30 40 dB
Slew Rate SR VOUT = 2VP-P 16 V/µs
Settling Time tSVOUT = 2VP-P, settle to 0.1% (Note 2)
300
ns
Gain Matching AG 1VP-P input, between RGB or Y/C
-0.5 +0.5
dB
Differential Gain DG 5-step modulated staircase 0.4 %
Differential Phase DP 5-step modulated staircase 0.2
degrees
Signal-to-RMS Noise
SNR_V
VIN = 1VP-P 65 dB
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, and VVID to GNDVID,SET = 100kΩnominal, RLOAD = 150Ω, TA= 0°C to +70°C, unless otherwise noted. Typical
values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
f = 0.1MHz to 4.43MHz 8
Group Delay Variation ∆GD
f = 0.1MHz to 5.5MHz 12
nS
Sync-Tip Clamp Level
V_CLMP
RGB, Composite, and Luma input, no signal,
no load
1.21
V
Chroma Bias
V_BIAS
Chroma input only, no signal, no load 1.9 V
Droop D Set by input current -2 +2 %
Power-Supply Rejection Ratio
PSRR_V
DC, 0.5VP-P 48 dB
CVBS, Y, or RGB video inputs, VIN > V_CLMP
4MΩ
Input Impedance ZIN Chroma video input, VIN = V_BIAS 11 kΩ
Input Clamp Current ICLMP VIN = 1.75V 2.5 5 8.0 µA
Pulldown Resistance RP
Enable VCR_R/C_OUT and TV_R/C_OUT
pulldown through I2C, (see registers 7 and 9
for loading register details)
10 Ω
RGB, Composite, and Luma, no signal,
no load
1.08
Output Pin Bias Voltage VOUT
Chroma, no signal, no load
2.27
V
Crosstalk XTLK Between any two active inputs, f = 4.43MHz,
VIN = 1VP-P -50 dB
Mute Suppression
M_SPR_V f = 4.43MHz, VIN = 1VP-P, on one input only
-50 dB
AUDIO CHARACTERISTICS (Note 3)
TV or VCR to stereo, gain = 0dB,
VIN = 1VP-P
-0.5
0
+0.5
TV or VCR to mono, gain = 0dB, VIN = 1VP-P
2.5 3 3.5
ENC to stereo, gain = 0dB, VIN = 1VP-P
3.02 3.52 4.02
Voltage Gain (From Application
Input) G_A
ENC to mono, gain = 0dB, VIN = 1VP-P
6.02 6.52 7.02
dB
Gain Matching Between
Channels ∆G_A Gain = 0dB, VIN = 1VP-P
-0.5
0
+0.5
dB
Flatness ∆Af = 20Hz to 20kHz, 0.5VRMS input,
gain = 0dB
0.01
dB
Frequency Bandwidth BW 0.5VRMS input, frequency where output is
-3dB referenced to 1kHz
230
kHz
Input DC Level (Excluding
Encoder Inputs that are High
Impedance)
VIN Gain = 0dB
0.2308
x V12
V
Encoder Input Common-Mode
Voltage Range VCM MAX4397DA only,
input differential signal = 0V 1.2 VAUD -
0.7 V
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, and VVID to GNDVID,SET = 100kΩnominal, RLOAD = 150Ω, TA= 0°C to +70°C, unless otherwise noted. Typical
values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
Encoder Common-Mode
Rejection Ratio
CMRR
MAX4397DA only, over VCM range 40 dB
Single-ended inputs, f = 1kHz, THD < 1% 3
ENC inputs differential level, MAX4397DA,
f = 1kHz, THD < 1%
2.08
Input Signal Amplitude
VIN_AC
ENC inputs single-ended, MAX4397SA,
f = 1kHz, THD < 1%
1.31
VRMS
Single ended: VCR_INR, VCR_INL, TV_INR,
TV_INL 0.1
Encoder, MAX4397DA: ENC_INL+,
ENC_INL-, ENC_INR+, ENC_INR- 1
Input Resistance (Measured at
Parts Input) RIN
Encoder, MAX4397SA: ENC_INL, ENC_INR 0.1
MΩ
Output DC Level
VOUT_DC
VIN = 0V 0.5 x
V12 V
Signal-to-Noise Ratio
SNR_A
f = 1.0kHz, 1VRMS application input,
gain = 0dB, 20Hz to 20kHz 95 dB
RLOAD = 10kΩ, f = 1.0kHz, 0.5VRMS output
0.004
Total Harmonic Distortion Plus
Noise
THD+N
RLOAD = 10kΩ, f = 1.0kHz, 2VRMS output
0.004
%
Output Impedance ZO f = 1kHz 1 Ω
1.414VP-P input, programmable gain to TV
SCART volume control range extends from
-56dB to +6dB
1.5 2 2.5
Volume Attenuation Step
ASTEP
1.414VP-P input, programmable gain to VCR
audio extends from -6dB to +6dB 5.5 6 6.5
dB
From V12, f = 1kHz, 0.5VP-P,
(CAUD_BIAS = 47µF), gain = 0dB 75
Power-Supply Rejection Ratio
PSRR_A
From VAUD, f = 1kHz, 0.5VP-P, VAUD ≥
+4.75V, VAUD ≤ +5.25V, gain = 0dB 75
dB
Mute Suppression
M_SPR_A
f = 1kHz, 0.5VRMS input, set through I2C, see
register 1 for loading register details 90 dB
Audio Clipping Level VCLIP f = 1kHz, 2.5VRMS input, gain = 6dB,
THD < 1% 3.6
VRMS
Left-to-Right Crosstalk
XTLK_LR
f = 1kHz, 0.5VRMS input, gain = 0dB 80 dB
Crosstalk
XTLK_CC
TV SCART to VCR SCART or VCR SCART to
TV SCART, f = 1kHz, 0.5VRMS input,
gain = 0dB
90 dB
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, and VVID to GNDVID,SET = 100kΩnominal, RLOAD = 150Ω, TA= 0°C to +70°C, unless otherwise noted. Typical
values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INTERFACE: SDA AND SCL (Note 5)
Low-Level Input Voltage VIL 0 0.8 V
High-Level Input Voltage VIH 2.6 V
Hysteresis of Schmitt Trigger
Input 0.2 V
ISINK = 3mA 0.4
SDA Low-Level Output Voltage VOL ISINK = 6mA 0.6 V
Output Fall Time for SDA Line 400pF bus load
250
ns
Spike Suppression 50 ns
Input Current -10
+10
µA
Input Capacitance 5pF
SCL Clock Frequency 0
400
kHz
Hold Time
tHD
,
STA
0.6 µs
Low Period of SCL Clock tLOW 1.3 µs
High Period of SCL Clock tHIGH 0.6 µs
Setup Time for a Repeated Start
Condition
tSU
,
STA
0.6 µs
Data Hold Time
tHD
,
DAT
0 0.9 µs
Data Setup Time
tSU
,
DAT 100
ns
Setup Time for Stop Condition
tSU
,
STO
0.6 µs
Bus Free Time Between a Stop
and Start tBUF 1.3 µs
OTHER DIGITAL PINS (Note 5)
DEV_ADDR Low Level 0.8 V
DEV_ADDR High Level 2.6 V
SLOW SWITCHING SECTION (Note 5)
Input Low Level 02V
Input Medium Level 4.5 7.0 V
Input High Level 9.5 V12 V
Input Current 50
100
µA
Output Low Level 10kΩ to ground, internal TV,
11.4V < V12 < 12.6V 0 1.5 V
Output Medium Level 10kΩ to ground, external 16/9,
11.4V < V12 < 12.6V 5.0 6.5 V
Output High Level 10kΩ to ground, external 4/3,
11.4V < V12 < 12.6V 10 V12 V
R/G/B LARGE-SIGNAL BANDWIDTH
vs. FREQUENCY
MAX4397DA/SA toc01
FREQUENCY (Hz)
GAIN (dB)
1M
-5
-4
-3
-2
-1
0
1
2
3
4
-6
100k 10M
VIN = 1VP-P
RL = 150Ω TO GNDVID
GROUP DELAY
vs. FREQUENCY
MAX4397DA/SA toc02
FREQUENCY (Hz)
DELAY (nS)
1M
20
40
60
80
100
120
0
100k 10M
Y VIDEO LARGE-SIGNAL BANDWIDTH
vs. FREQUENCY
MAX4397DA/SA toc03
FREQUENCY (Hz)
GAIN (dB)
1M
-5
-4
-3
-2
-1
0
1
2
3
4
-6
100k 10M
VIN = 1VP-P
RL = 150Ω TO GNDVID
Typical Operating Characteristics
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, VVID to GNDVID no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.)
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, and VVID to GNDVID,SET = 100kΩnominal, RLOAD = 150Ω, TA= 0°C to +70°C, unless otherwise noted. Typical
values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT
FAST SWITCHING SECTION (Note 5)
Input Low Level 0 0.4 V
Input High Level 13V
Input Current 110µA
Output Low Level ISINK = 0.5mA 0
0.01
0.2 V
Output High Level ISOURCE = 20mA, VVID - VOH
0.75
2V
Fast Switching Output to RGB
Skew (Note 4) 30 ns
Fast Switching Output Rise Time
150Ω to ground 30 ns
Fast Switching Output Fall Time 150Ω to ground 30 ns
Note 1: All devices are 100% tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 2: The settling time is measured from the 50% of the input swing to the 0.1% of the final value of the output.
Note 3: Maximum load capacitance is 200pF. All the listed parameters are measured at application’s inputs, unless otherwise
noted. See the Typical Application Circuits.
Note 4: Difference in propagation delays of fast-blanking signal and RGB signals. Measured from 50% input transition to 50%
output transition. Signal levels to be determined.
Note 5: Guaranteed by design.
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
_______________________________________________________________________________________ 7
AUDIO CROSSTALK
vs. FREQUENCY
MAX4397DA/SA toc08
FREQUENCY (kHz)
CROSSTALK (dB)
100.1
-100
-80
-60
-40
-20
0
-120
0.01 100
VIN = 0.5VRMS
RL = 10kΩ TO GNDAUD
1
AUDIO LARGE-SIGNAL BANDWIDTH
vs. FREQUENCY
MAX4397DA/SA toc07
FREQUENCY (kHz)
GAIN (dB)
10010
4
1 1000
3
2
1
0
-1
-2
-3
-4
-5
-6
VIN = 0.5VRMS
RL = 10kΩ TO GNDAUD
AUDIO TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
MAX4397DA/SA toc09
FREQUENCY (kHz)
THD+N (%)
101
0.001
0.01
0.1
0
0.0001
0.01 100
AMPLITUDE = 3.0VRMS
AMPLITUDE = 0.5VRMS
AMPLITUDE = 2.0VRMS
0.1
R/G/B SMALL-SIGNAL BANDWIDTH
vs. FREQUENCY
MAX4397DA/SA toc04
FREQUENCY (Hz)
GAIN (dB)
1M
-5
-4
-3
-2
-1
0
1
2
3
4
-6
100k 10M
VIN = 100mVP-P
RL = 150Ω TO GNDVID
Y VIDEO SMALL-SIGNAL BANDWIDTH
vs. FREQUENCY
MAX4397DA/SA toc05
FREQUENCY (Hz)
GAIN (dB)
1M
-5
-4
-3
-2
-1
0
1
2
3
4
-6
100k 10M
VIN = 100mVP-P
RL = 150Ω TO GNDVID
VIDEO CROSSTALK
vs. FREQUENCY
MAX4397DA/SA toc06
FREQUENCY (Hz)
CROSSTALK (dB)
1M
-80
-60
-40
-20
0
-100
100k 10M
VIN = 100mVP-P
RL = 150Ω TO GNDVID
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
MAX4397DA/SA toc10
FREQUENCY (kHz)
PSRR (dB)
1010.10.01 100
-90
-80
-70
-60
-50
-40
-30
-20
-10
-100
0
WITH RESPECT TO V12
WITH RESPECT TO VAUD
VVID QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX4397DA/SA toc11
TEMPERATURE (°C)
VVID QUIESCENT SUPPLY CURRENT (mA)
5025
55
60
65
70
75
80
50
075
ALL VIDEO OUTPUT AMPLIFIERS ENABLED
NO LOAD
Typical Operating Characteristics (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, VVID to GNDVID no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.)
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V12 = 12V, VVID = VAUD = 5V, 0.1µF X5R capacitor in parallel with a 10µF aluminum electrolytic capacitor from VAUD to GNDAUD,
V12 to GNDAUD, VVID to GNDVID no load, TA= 0°C to +70°C, unless otherwise noted. Typical values are at TA = +25°C.)
VVID STANDBY QUIESCENT SUPPLY
CURRENT vs. TEMPERATURE
MAX4397DA/SA toc12
TEMPERATURE (°C)
VVID STANDBY QUIESCENT SUPPLY CURRENT (mA)
5025
35
40
45
50
30
075
ALL VIDEO OUTPUT AMPLIFIERS DISABLED
V12 QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX4397DA/SA toc13
TEMPERATURE (°C)
V12 QUIESCENT SUPPLY CURRENT (mA)
5025075
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
1.0
VAUD QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
MAX4397DA/SA toc14
TEMPERATURE (°C)
VAUD QUIESCENT SUPPLY CURRENT (mA)
5025075
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
INPUT CLAMP AND BIAS LEVEL
vs. TEMPERATURE
MAX4397DA/SA toc15
TEMPERATURE (°C)
INPUT CLAMP AND BIAS LEVEL (V)
5025075
0.7
0.9
1.1
1.3
1.7
1.5
1.9
2.1
2.3
2.5
0.5
BOTTOM LEVEL
CLAMP
BIAS
INPUT CLAMP CURRENT
vs. TEMPERATURE
MAX4397DA/SA toc16
TEMPERATURE (°C)
INPUT CLAMP CURRENT (µA)
5025075
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
2.0
VIN = 1.75V
INPUT CLAMP CURRENT
vs. INPUT VOLTAGE
MAX4397DA/SA toc17
INPUT VOLTAGE (V)
INPUT CLAMP CURRENT (mA)
4321
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
05
OUTPUT BIAS VOLTAGE
vs. TEMPERATURE
MAX4397DA/SA toc18
TEMPERATURE (°C)
OUTPUT BIAS VOLTAGE (V)
5025
0.5
1.0
1.5
2.0
2.5
3.0
0
075
CHROMA
RGB, LUMA, CVBS
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
_______________________________________________________________________________________ 9
Pin Description
PIN
MAX4397DA
MAX4397SA
NAME FUNCTION
1 1 SDA Bidirectional Data I/O. I2C-compatible, 2-wire interface data input/output. Output
is open drain.
2 2 SCL Serial-Clock Input. I2C-compatible, 2-wire clock interface.
3 3 DEV_ADDR
Device Address Set Input. Connect to GNDVID to set write and read addresses of
94h or 95h, respectively. Connect to VVID to set write and read address of 96h or
97h, respectively.
4 — ENC_INL+ Digital Encoder Left-Channel Audio Positive Input
— 4 ENC_INL Digital Encoder Left-Channel Audio Input
5 — ENC_INL- Digital Encoder Left-Channel Audio Negative Input
— 5, 7 N.C. No Connection. Not internally connected.
6 — ENC_INR+ Digital Encoder Right-Channel Audio Positive Input
— 6 ENC_INR Digital Encoder Right-Channel Audio Input
7 — ENC_INR- Digital Encoder Right-Channel Audio Negative Input
8 8 VCR_INR VCR SCART Right-Channel Audio Input
9 9 VCR_INL VCR SCART Left-Channel Audio Input
10 10 TV_INR TV SCART Right-Channel Audio Input
11 11 TV_INL TV SCART Left-Channel Audio Input
12 12 GNDAUD Audio Ground
13 13 AUD_BIAS Audio Input Bias Voltage. Bypass AUD_BIAS with a 47µF capacitor and a 0.1µF
capacitor to GNDAUD.
14 14 VAUD Audio Supply. Connect to a +5V supply. Bypass with a 10µF aluminum electrolyte
capacitor in parallel with a 0.47µF low-ESR ceramic capacitor to GNDAUD.
15 15 VCR_OUTR VCR SCART Right-Channel Audio Output
16 16 VCR_OUTL VCR SCART Left-Channel Audio Output
17 17
RF_MONO_OUT
RF Modulator Mono Audio Output
18 18 TV_OUTL TV SCART Left-Channel Audio Output
19 19 TV_OUTR TV SCART Right-Channel Audio Output
20 20 V12 +12V Supply. Bypass V12 with a 10µF capacitor in parallel with a 0.1µF capacitor
to ground.
21 21 TV_SS TV SCART Bidirectional Slow-Switch Signal
22 22 VCR_SS VCR SCART Bidirectional Slow-Switch Signal
23 23 SET Filter Cutoff Frequency Set Input. Connect 100kΩ resistor from SET to ground.
24, 36 24, 36 VVID Video and Digital Supply. Connect to a +5V supply. Bypass with a 0.01µF
capacitor to GNDVID. VVID also serves as a digital supply for the I2C interface.
25 25 VCRIN_FS VCR SCART Fast-Switching Input
26 26 ENCIN_FS Digital Encoder Fast-Switching Input
27 27 TVOUT_FS TV SCART Fast-Switching Output. This signal is used to switch the TV to its RGB
inputs for on-screen display purposes.
28 28 GNDVID Video Ground
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
10 ______________________________________________________________________________________
Pin Description (continued)
PIN
MAX4397DA
MAX4397SA
NAME FUNCTION
29 29 RF_CVBS_OUT RF Modulator Composite Video Output. Internally biased at 1V.
30 30
TV_Y/CVBS_OUT
TV SCART Luma/Composite Video Output. Internally biased at 1V.
31 31 TV_R/C_OUT TV SCART Red/Chroma Video Output. Internally biased at 1V for Red video
signal and 2.2V for Chroma video signal.
32 32 TV_G_OUT TV SCART Green Video Output. Internally biased at 1V.
33 33 TV_B_OUT TV SCART Blue Video Output. Internally biased at 1V.
34 34
VCR_Y/CVBS_OUT
VCR SCART Luma/Composite Video Output. Internally biased at 1V.
35 35 VCR_R/C_OUT VCR SCART Red/Chroma Video Output. Internally biased at 1V for Red video
signals and 2.2V for Chroma video signal.
37 37 TV_R/C_IN TV SCART Red/Chroma Video Input. Internally biased at 1.2V for Red video
signals, or 1.9V for Chroma video signals.
38 38 TV_Y/CVBS_IN TV SCART Luma/Composite Video Input. Internally biased at 1.2V.
39 39
VCR_Y/CVBS_IN
VCR SCART Luma/Composite Video Input. Internally biased at 1.2V.
40 40 VCR_R/C_IN VCR SCART Red/Chroma Video Input. Internally biased at 1.2V for Red video
signals and 1.9V for Chroma video signals.
41 41 VCR_G_IN VCR SCART Green Video Input. Internally biased at 1.2V.
42 42 VCR_B_IN VCR SCART Blue Video Input. Internally biased at 1.2V.
43 43
ENC_Y/CVBS_IN
Digital Encoder Luma/Composite Video Input. Internally biased at 1.2V.
44 44 ENC_R/C_IN Digital Encoder Red/Chroma Video Input. Internally biased at 1.2V for Red
video signals, or 1.9V for Chroma video signals.
45 45 ENC_G_IN Digital Encoder Green Video Input. Internally biased at 1.2V.
46 46 ENC_B_IN Digital Encoder Blue Video Input. Internally biased at 1.2V.
47 47 ENC_Y_IN Digital Encoder Luma Video Input. Internally biased at 1.2V.
48 48 ENC_C_IN Digital Encoder Chroma Video Input. Internally biased at 1.9V.
EP EP GNDAUD Exposed Paddle. Solder to the circuit board ground (GNDAUD) for proper
thermal and electrical performance.
Detailed Description
The MAX4397DA/SA are switch matrices that route
audio and video signals between different ports using
the I2C interface. The ports consist of the MPEG
decoder output, and two SCART connectors for the TV
and VCR. Per EN50049 and IEC 933, the encoder can
only input a signal to the SCART connector, while TV
and VCR SCART connectors are bidirectional.
The MAX4397DA/SA circuitry consists of four major
sections: the video section, the audio section, the slow-
and fast-switching section, and the digital interface.
The video section consists of clamp and bias circuitry,
input buffers, reconstruction filters, a switch matrix, a Y/C
mixer, and output buffers. All video inputs are AC-cou-
pled through a 0.1µF capacitor to set an acceptable DC
level using clamp or bias networks. The bidirectional
Red/Chroma outputs can be connected to ground using
I2C control to make them terminations when Red/Chroma
is an input (see the Video Inputs section).
The audio section features an input buffer, a switching
matrix, volume- or gain-control circuitry, and output dri-
vers. The audio inputs are AC-coupled through a 0.1µF
capacitor. Only the audio encoder inputs of the
MAX4397DA are different from the MAX4397SA. The
MAX4397SA has a single-ended audio encoder input
while the audio encoder input for the MAX4397DA is dif-
ferential. The TV output audio path has volume control
from -56dB to +6dB in 2dB steps, while the VCR output
audio path has volume control from -6dB to +6dB in 6dB
steps. The MAX4397DA/SA can be configured to switch
inputs during a zero-crossing function to reduce clicks.
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 11
The slow-switching feature allows for bidirectional, tri-
level, slow-switching input and output signals at pin
VCR_SS and TV_SS, respectively. The slow-switching
signals from the VCR set the aspect ratio or video source
of the TV screen. See the Slow Switching section.
Fast switching consists of two inputs from the encoder
and VCR, and one output to the TV to insert an on-
screen display (OSD). Fast switching is used to route
video signals from the VCR or from the encoder to the
TV. In addition, the fast-switching output can be config-
ured to a high or low voltage. Fast switching is con-
trolled through the I2C interface.
The digital block contains the 2-wire interface circuitry,
control, and status registers. The MAX4397DA/SA can
be configured through an I2C-compatible interface.
DEV_ADDR sets the I2C-compatible address.
SCART Video Switching
The MAX4397DA/SA switch video signals between an
MPEG decoder, TV SCART, and VCR SCART. The video
switch includes reconstruction filters, multiplexed video
amplifiers, and a Y/C mixer driver for an RF modulator.
See Figure 1 for the functional diagram of the video sec-
tion. While the SCART connector supports RGB, S-video,
and Composite video formats, RGB, and S-video typically
share a bidirectional set of SCART connector pins.
CLAMP/BIAS
TV_R/C_IN
CLAMP
TV_Y/CVBS_IN
CLAMP
VCR_B_IN
CLAMP
VCR_G_IN
CLAMP/BIAS
VCR_R/C_IN
VCRIN_FS
CLAMP
VCR_Y/CVBS_IN
CLAMP
ENC_Y/CVBS_IN
CLAMP/BIAS
ENC_R/C_IN
CLAMP
ENC_G_IN
CLAMP
ENC_B_IN
CLAMP
ENC_Y_IN
ENCIN_FS
BIAS
ENC_C_IN
0.7V
0.7V
2kΩ
2kΩ
V12
VCR_Y/CVBS_OUT
VCR_R/C_OUT
TV_R/C_OUT
TV_G_OUT
TV_B_OUT
TV_Y/CVBS_OUT
TVOUT_FS
RF_CVBS_OUT
TV_SS
VCR_SS
BIAS
5V
0V
PULLDOWN
TVRCOUT
VGA
5dB, 6dB, OR 7dB
PULLDOWN
VCRRCOUT
x2
x2
x2
x1
x2
VGA
5dB, 6dB, OR 7dB
VGA
5dB, 6dB, OR 7dB
N
N
MAX4397DA/SA
FILTER
FILTER
MIXER
SLOW SWITCHING
FILTER
FILTER
FILTER
FILTER
Figure 1. MAX4397DA/SA Video Section Functional Diagram
MAX4397DA/SA
Video Inputs
All video inputs are AC-coupled with an external 0.1µF
capacitor. Either a clamp or bias circuit sets the DC
input level of the video signals. The clamp circuit posi-
tions the sync tip of the Composite (CVBS), the
Component RGB, or the S-Video Luma signal. If the sig-
nal does not have a sync tip, then the clamp positions
the minimum of the signal at the clamp voltage. The bias
circuitry is used to position the S-video Chroma signal at
midlevel of the Luma (Y) signal. On the video inputs that
can receive either a Chroma or a Red video signal, the
bias or clamp circuit is selected through I2C. See Tables
3–12 for loading register details.
The MPEG decoder and VCR uses the RGB format and
fast switching to insert an on-screen display (OSD), usu-
ally text, onto the TV. The MAX4397DA/SA support RGB
as an input from either the VCR or the MPEG decoder
and as an output only to the TV. The Red video signal of
the RGB format and the Chroma video signal of the S-
VHS format share the same SCART connector pin.
Therefore, RGB and S-video signals cannot be present
at the same time. Loop-through is possible with a
Composite video signal but not with RGB signals
because the RGB SCART pins are used for both input
and output.
In SCART, there is the possibility of a bidirectional use
of the Red/Chroma pin. When using the Red/Chroma
pin as an input port, terminate the Red/Chroma output
with a 75Ωresistor to ground. Thus, a ground state is
provided by an active pulldown to GNDVID on the
Red/Chroma output to support the bidirectional Chroma
or Red I/O, turning the output source resistors into ter-
minations (see Figure 2). The active pulldown also pro-
vides the “Mute Output” function and disables the
deselected video outputs. The “Mute Output” state is
the default power-on state for video.
For high-quality home video, the MPEG decoder, VCR,
and TV use the S-video format. The MAX4397DA/SA
support S-video signals as an input from the VCR, the
MPEG decoder, and the TV, and also as a separately
switchable output to the TV and VCR. Because S-video
support was not included in the original specifications
of the SCART connector, the Luma (Y) signal of S-video
and the CVBS signal share the same SCART connector
pins. If S-video is present, then a Composite signal
must be created from the Y and C signals to drive the
RF_CVBS_OUT pin. For S-video, loop-through is not
possible since the Chroma SCART port is used for both
input and output.
The MAX4397DA/SA support Composite video (CVBS)
format, with inputs from the VCR, MPEG decoder, and
TV. Full loop-through is possible to the TV and VCR
only since the MPEG decoder SCART connector has
separate input and output pins for the CVBS format.
Audio/Video Switch for Dual SCART Connectors
12 ______________________________________________________________________________________
CLAMP
N
CLAMP/BIAS
TV_R/C_IN
VIDEO INPUT
TV_R/C_IN
VIDEO INPUT
75Ω
0.1µF0.1µF
75Ω
PIN 15
PIN 13
PIN 15
PIN 13
MAX4397DA/SA MAX4397DA/SA
TV_R/C_OUT
PULLDOWN
SCART
CABLE
SCART
CONNECTORS
PULLDOWN
CLAMP
N
TV_R/C_OUT
CLAMP/BIAS
Figure 2. Bidirectional SCART Pins
Video Outputs
The DC level at the video outputs is controlled so that
coupling capacitors are not required, and all of the video
outputs are capable of driving a DC-coupled, 150Ω,
back-terminated coax load with respect to ground.
In a typical television input circuit (see Figure 3), the
video output driver on the SCART chip only needs to
source current. Users should note that, while the
SCART specification states 75Ωimpedance, in prac-
tice, typical SCART chip implementations assume 75Ω
input resistance to ground (and source current from the
video output stage).
Since some televisions and VCRs use the horizontal
sync height for automatic gain control, the
MAX4397DA/SA accurately reproduce the sync height
to within ±2%.
Slow Switching
The MAX4397DA/SA support the IEC 933-1,
Amendment 1, tri-level slow switching that selects the
aspect ratio for the display (TV). Under I2C-compatible
control, the MAX4397DA/SA set the slow-switching out-
put voltage level. Table 1 shows the valid input levels of
the slow-switching signal and the corresponding oper-
ating modes of the display device.
Two bidirectional ports are available for slow-switching
signals for the TV and VCR. The slow-switching input
status is continuously read and stored in the register
0Eh. The slow-switching outputs can be set to a logic
level or high impedance by writing to registers 07h and
09h. See Tables 8 and 10 for details.
Fast Switching
The VCR or MPEG decoder outputs a fast-switching
signal to the display device or TV to insert an on-screen
display (OSD). The fast-switching signal can also be
set to a constant high or low output signal through the
I2C interface. The fast-switching output can be set
through writing to register 07h.
Y/C Mixer
The MAX4397DA/SA include an on-chip mixer to pro-
duce Composite video (CVBS) when S-video (Y and C)
is present. The Composite video drives the
RF_CVBS_OUT output pin. The circuit sums Y and C
signals to obtain the CVBS component. A +6dB output
buffer drives RF_CVBS_OUT.
Video Reconstruction Filter
The encoder DAC outputs need to be lowpass-filtered
to reject the out-of-band noise. The MAX4397DA/SA
integrate the reconstruction filter. The filter is fourth
order, which is composed of two Sallen-Key biquad in
cascade, implementing a Butterworth-type transfer
function. The internal reconstruction filters feature a
5.5MHz cutoff frequency and -30dB minimum attenua-
tion at 27MHz. Note that the SET pin is used to set the
accuracy of the filter cutoff frequency. Connect a
100kΩresistor from SET to ground.
SCART Audio Switching
Audio Inputs
All audio inputs for the MAX4397SA are single-ended
and AC-coupled. The MAX4397DA audio inputs are
singled-ended and AC-coupled except for the audio
encoder input, which is differential DC-coupled.
The audio block has three stereo audio inputs from the
TV, the VCR, and the MPEG decoder SCART. Each
input has a 100kΩresistor connected to an internally
generated voltage equal to 0.23 x V12, except for the
encoder input of the MAX4397DA, where the DC bias is
fixed externally.
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 13
Table 1. Slow-Switching Modes
SLOW-SWITCHING
SIGNAL VOLTAGE
(V)
MODE
0 to 2
Display device uses an internal source
such as a built-in tuner to provide a
video signal
4.5 to 7.0
Display device uses a video signal from
the SCART connector and sets the
display to a 16:9 aspect ratio
9.5 to 12.6
Display device uses a signal from the
SCART connector and sets the display
to a 4:3 aspect ratio
MAX4397DA/SA
SET-TOP BOX
TV
+5V
VIDEO
OUTPUT DC
RESTORE
SCART
CABLE 0.1µF
5kΩ
75Ω
INPUT
TERMINATION
RESISTOR
75Ω
BACK
TERMINATION
RESISTOR
Figure 3. Typical TV Input Circuit
MAX4397DA/SA
Audio Outputs
Both right and left channels have a stereo output for the
TV and VCR SCART. The monaural output, which is a
mix of the TV right and left channels, drives the RF
modulator, RF_MONO_OUT. The monaural mixer, a
resistor summer, attenuates the amplitude of each of
the two signals by 6dB. A 12.54dB gain block follows
the monaural mixer. If the left and right audio channels
were completely uncorrelated, then a 9.54dB gain
block is used. See Figures 4 and 5 for the functional
diagram of the audio section.
Clickless Switching
The TV channel incorporates a zero-crossing detect
(ZCD) circuit that minimizes click noise due to abrupt
signal level changes that occur when switching
between audio signals at an arbitrary moment.
Audio/Video Switch for Dual SCART Connectors
14 ______________________________________________________________________________________
ENC_INL+
AUDIO INPUTS AUDIO OUTPUTS
ENC_INL-
TV_INL
VCR_INL
DIFF/SE
DIFF/SE
MUTE
MUTE
MUTE
Σ/2
MUTE
MUTE
MUTE
MUTE
MUTE IS AN INTERNAL SIGNAL
-6dB, 0dB, OR +6dB
-6dB, 0dB, OR +6dB
9.54dB
9.54dB
12.54dB
GNDAUD
9.54dB
ZCD
TV_OUTL
RF_MONO_OUT
TV_OUTR
VOLUME CONTROL BYPASS
VOLUME CONTROL
+6dB TO -56dB
VOLUME CONTROL
+6dB TO -56dB
I2C
VCR_OUTL
VCR_OUTR
9.54dB
ENC_INR+
ENC_INR-
TV_INR
VCR_INR
VOLUME CONTROL BYPASS
Figure 4. MAX4397DA Audio Section Functional Diagram
To implement the zero-crossing function when switch-
ing audio signals, set the ZCD bit by loading register
00h through the I2C-compatible interface (if the ZCD bit
is not already set). Then set the mute bit low by loading
register 00h. Next, wait for a sufficient period of time for
the audio signal to cross zero. This period is a function
of the audio signal path’s low-frequency 3dB corner
(fL3dB). Thus, if fL3dB = 1kHz, the time period to wait for
a zero-crossing detect is 1/2kHz or 0.5ms.
Next, set the appropriate TV switches using register
01h. Finally, clear the mute bit (while leaving the ZCD bit
high) using register 00h. The MAX4397DA/SA switch the
signal out of mute at the next zero crossing.
To implement the zero-cross function for TV volume
changes, or for TV and phono volume bypass switch-
ing, simply ensure the ZCD bit in register 00h is set.
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 15
AUDIO INPUTS AUDIO OUTPUTS
ENC_INL
TV_INL
VCR_INL
MUTE
MUTE
MUTE
Σ/2
MUTE
MUTE
MUTE
MUTE
MUTE IS AN INTERNAL SIGNAL
-6dB, 0dB, OR +6dB
-6dB, 0dB, OR +6dB
9.54dB
9.54dB
12.54dB
GNDAUD
9.54dB
ZCD
TV_OUTL
RF_MONO_OUT
TV_OUTR
VOLUME CONTROL BYPASS
VOLUME CONTROL
+6dB TO -56dB
VOLUME CONTROL
+6dB TO -56dB
I2C
VCR_OUTL
VCR_OUTR
9.54dB
ENC_INR
TV_INR
VCR_INR
VOLUME CONTROL BYPASS
Figure 5. MAX4397SA Audio Section Features Singled-Ended Encoder Input
MAX4397DA/SA
Volume Control
The TV channel volume control ranges from -56dB to
+6dB in 2dB steps. The VCR volume control settings
are programmable for -6dB, 0dB, and +6dB. These
gain levels are referenced to the application inputs,
where some dividers are present. With the ZCD bit set,
the TV volume control switches only at zero-crossings,
thus minimizing click noise. The TV outputs can bypass
the volume control. Likewise, the monaural output sig-
nal can be processed by the TV volume control or it
can bypass the volume control.
Digital Section
Serial Interface
The MAX4397DA/SA use a simple 2-wire serial inter-
face requiring only two standard microprocessor port
I/O lines. The fast-mode I2C-compatible serial interface
allows communication at data rates up to 400kbps or
400kHz. Figure 6 shows the timing diagram of the sig-
nals on the 2-wire interface.
The two bus lines (SDA and SCL) must be at logic-high
when the bus is not in use. The MAX4397DA/SA are slave
devices and must be controlled by a master device.
Pullup resistors from the bus lines to the supply are
required when push-pull circuitry is not driving the lines.
The logic level on the SDA line can only change when
the SCL line is low. The start and stop conditions occur
when SDA toggles low/high while the SCL line is high
(see Figure 6). Data on SDA must be stable for the
duration of the setup time (tSU,DAT) before SCL goes
high. Data on SDA is sampled when SCL toggles high
with data on SDA stable for the duration of the hold time
(tHD,DAT). Note that data is transmitted in an 8-bit byte.
A total of nine clock cycles are required to transfer a
byte to the MAX4397DA/SA. The device acknowledges
the successful receipt of the byte by pulling the SDA
line low during the 9th clock cycle.
Audio/Video Switch for Dual SCART Connectors
16 ______________________________________________________________________________________
SCL
SDA
tLOW
tF
tR
tHD, STA
tHD, DAT
tHD, STA
tSU, DAT tSU, STA
tBUF
tSU, STA
STOP CONDITIONREPEATED START CONDITIONSTART CONDITION
Figure 6. SDA and SCL Signal Timing Diagram
Data Format of the I2C Interface
I2C Compatibility
The MAX4397DA/SA are compatible with existing I2C
systems. SCL and SDA are high-impedance inputs.
SDA has an open drain that pulls the bus line to a logic-
low during the 9th clock pulse. Figure 7 shows a typical
I2C interface application. The communication protocol
supports the standard I2C 8-bit communications. The
MAX4397DA/SA address is compatible with the 7-bit I2C
addressing protocol only; 10-bit format is not supported.
Digital Inputs and Interface Logic
The I2C-compatible, 2-wire interface has logic levels
defined as VIL = 0.8V and VIH = 2.0V. All of the inputs
include Schmitt-trigger buffers to accept low-transition
interfaces. The digital inputs are compatible with 3V
CMOS logic levels.
Programming
Connect DEV_ADDR to ground to set the MAX4397DA/SA
write and read address as shown in Table 2.
Data Register Writing and Reading
Program the SCART video and audio switches by writ-
ing to registers 00h through 0Dh. Registers 00h through
0Eh can also be read, allowing readback of data after
programming and facilitating system debugging. The
status register is read-only and can be read from
address 0Eh. See Tables 3–12 for register program-
ming information.
Applications Information
Hot Plug of SCART Connectors
The MAX4397DA/SA feature high-ESD protection on all
SCART inputs and outputs, and requires no external
transient-voltage suppressor (TVS) devices to protect
against floating chassis discharge. Some set-top boxes
have a floating chassis problem in which the chassis is
not connected to earth ground. As a result, the chassis
can charge up to 500V. When a SCART cable is con-
nected to the SCART connector, the charged chassis
can discharge through a signal pin. The equivalent cir-
cuit is a 2200pF capacitor charged to 311V connected
through less than 0.1Ωto a signal pin. The
MAX4397DA/SA are soldered on the PCB when it expe-
riences such a discharge. Therefore, the current spike
flows through the ESD protection diodes and is
absorbed by the supply bypass capacitors, which have
high capacitance and low ESR.
To better protect the MAX4397DA/SA against excess
voltages during the cable discharge condition, place
an additional 75Ωresistor in series with all inputs and
outputs to the SCART connector. For harsh environ-
ments where ±15kV protection is needed, the
MAX4385E and MAX4386E single and quad high-
speed op amps feature the industry’s first integrated
±15kV ESD protection on video inputs and outputs.
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 17
µC
SCL
SCL
SDA
VVID
MAX4397DA/SA
SCL
SDA
VDD
SCL
SDA
VDD
DEVICE 2
DEVICE 1
SDA
Figure 7. Typical I2C Interface Application
ADDRESS PIN
STATE
WRITE
ADDRESS
READ ADDRESS
VVID 96h 97h
GNDVID 94h 95h
Table 2. Slave Address Programming
S
Slave Address
(Write address)
A
Register
Address
A
Data
A
P
Write Mode
S
Slave
Address
(Write
address)
A
Register
Address
A
Sr
Slave
Address
(Read
address)
A
Data
NA
P
Read Mode
S = Start Condition, A = Acknowledge, NA = Not Acknowledge,
Sr = Repeat Start Condition, P = Stop Condition
MAX4397DA/SA
Power Supplies and Bypassing
The MAX4397DA/SA feature single 5V and 12V supply
operation and requires no negative supply. The +12V
supply V12 is for the SCART switching function. For pin
V12, place all bypass capacitors as close as possible
with a 10µF capacitor in parallel with a 0.1µF ceramic
capacitor. Connect all VAUD pins together to +5V and
bypass with a 10µF electrolytic capacitor in parallel with a
0.47µF low-ESR ceramic capacitor to audio ground.
Bypass VAUD pins with a 0.1µF capacitor to audio
ground. Bypass AUD_BIAS to audio ground with a 10µF
electrolytic in parallel with a 0.1µF ceramic capacitor.
Bypass VDIG with a 0.1µF ceramic capacitor to digital
ground. Bypass each VVID to video ground with a 0.1µF
ceramic capacitor. Connect VVID in series with a 200nH
ferrite bead to the +5V supply.
Layout and Grounding
For optimal performance, use controlled-impedance
traces for video signal paths and place input termina-
tion resistors and output back-termination resistors
close to the MAX4397DA/SA. Avoid routing video
traces parallel to high-speed data lines.
The MAX4397DA/SA provide separate ground connec-
tions for video, audio, and digital supplies. For best
performance, use separate ground planes for each of
the ground returns and connect all three ground planes
together at a single point. Refer to the MAX4397DA/SA
evaluation kit for a proven circuit board layout example.
Audio/Video Switch for Dual SCART Connectors
18 ______________________________________________________________________________________
REGISTER
ADDRESS
(HEXADECIMAL)
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2
BIT 1
BIT 0
00h TV volume
bypass ZCD TV volume control TV audio
output mute
01h VCR volume control Not used
Not used
VCR audio selection TV audio selection
02h Not used
03h Not used
04h Not used
05h Not used
06h TV_R/C_IN
clamp RGB gain
TV G and B video switch
TV video switch
07h
Not used RF_CVBS_
OUT switch
TV_Y/
CVBS_OUT switch
TV fast blank
(fast switching)
TV_R/C_OUT
ground Set function TV
08h VCR_R/
C_IN clamp Not used
Not used
Not used
ENC_R/
C_IN clamp
VCR video switch
09h
Not used Not used
Not used
Not used Not used VCR_R/C_OUT
ground Set function VCR
0Ah Not used
0Bh Not used
0Ch Not used
0Dh
VCR_Y/
CVBS_OUT
enable
VCR_R/
C_OUT
enable
TV_R/C_OUT
enable
TV_G_OUT
enable
TV_B_OUT
enable
TV_Y/
CVBS_OUT
enable
TVOUT
_FS
enable
RF_CVBS_
OUT
enable
Table 3. Data Format for Write Mode
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 19
BIT
DESCRIPTION
76543210
COMMENTS
0
Off
TV Audio Mute
1
On (power-on default)
00000
+6dB gain
00001
+4dB gain
00010
+2dB gain
00011
0dB gain (power-on default)
00100
-2dB gain
00101
-4dB gain
11110
-54dB gain
TV Volume Control
11111
-56dB gain
0
Off
TV Zero-Crossing Detector
1
On (power-on default)
0
TV audio passes through volume
control (power-on default)
TV Volume Bypass
1
TV audio bypasses volume control
Table 5. Register 00h: TV Audio Control
BIT
DESCRIPTION
76543210
COMMENTS
00
Encoder audio
01
VCR audio
10
TV audio
Input Source for TV Audio
11
Mute (power-on default)
00
Encoder audio
01
VCR audio
10
TV audio
Input Source for VCR Audio
11
Mute (power-on default)
00
0dB gain (power-on default)
01
+6dB gain
10
-6dB gain
VCR Volume Control
11
0dB gain
Table 6. Register 01h: TV/VCR Audio Control
REGISTER
ADDRESS
(HEXADECIMAL)
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0Eh
Thermal SHDN
Power-on
reset Not used VCR slow switch input
TV slow switch input
Table 4. Data Format for Read Mode
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
20 ______________________________________________________________________________________
BIT
DESCRIPTION
76543210
COMMENTS
TV_Y/CVBS_OUT TV_R/C_OUT
000
ENC_Y/CVBS_IN ENC_R/C_IN
001
ENC_Y_IN ENC_C_IN
010
VCR_Y/CVBS_IN VCR_R/C_IN
011
TV_Y/CVBS_IN TV_R/C_IN
100
Not used Not used
101
Mute Mute
110
Mute Mute
Input Sources for TV Video
111
Mute (power-on
default)
Mute (power-on
default)
TV_G_OUT TV_B_OUT
00
ENC_G_IN ENC_B_IN
01
VCR_G_IN VCR_B_IN
10
Mute Mute
Input Sources for TV_G_OUT and
TV_B_OUT
11
Mute (power-on
default)
Mute (power-on
default)
00
6dB (power-on default)
01
7dB
10
5dB
RGB Gain
11
5dB
0
DC restore clamp active at input (power-on
default)
TV_R/C_IN Clamp/Bias
1
Chrominance bias applied at input
Table 7. Register 06h: TV Video Input Control
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 21
BIT
DESCRIPTION 76543210 COMMENTS
00
Low (< 2V), internal source (power-on default)
01
Medium (4.5V to 7V), external SCART source
with 16:9 aspect ratio
1 0 High impedance
Set TV Function Switching
11
High (> 9.5V), external SCART source with 4:3
aspect ratio
0Normal operation, pulldown on TV_R/C_OUT
is off (power-on default)
TV_R/C_OUT Ground
1
Ground, pulldown on TV_R/C_OUT is on, the
output amplifier driving TV_R/C_OUT is turned
off
0 0 0V (power-on default)
0 1 Same level as ENC_FB_IN
1 0 Same level as VCR_FB_IN
Fast Blank (Fast Switching)
11 V
VID
0
Composite video from the Y/C mixer is output
TV_Y/CVBS_OUT Switch 1The TV_Y/CVBS_OUT signal selected in
register 06h is output (power-on default)
0Composite video from the Y/C mixer is output
(power-on default)
RF_CVBS_OUT Switch
1The TV_Y/CVBS_OUT signal selected in
register 06h is output
Table 8. Register 07h: TV Video Output Control
BIT
DESCRIPTION
76543210
COMMENTS
VCR_Y/CVBS_OUT VCR_R/C_OUT
000
ENC_Y/CVBS_IN ENC_R/C_IN
001
ENC_Y_IN ENC_C_IN
010
VCR_Y/CVBS_IN VCR_R/C_IN
011
TV_Y/CVBS_IN TV_R/C_IN
100
Not used Not used
101
Mute Mute
110
Mute Mute
Input Sources for VCR
Video
111
Mute (power-on default) Mute (power-on default)
0
DC restore clamp active at input (power-on default)
VCR_R/C_IN Clamp/Bias 1
Chrominance bias applied at input
0
DC restore clamp active at input (power-on default)
ENC_R/C_IN Clamp/Bias 1
Chrominance bias applied at input
Table 9. Register 08h: VCR Video Input Control
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
22 ______________________________________________________________________________________
BIT
DESCRIPTION 76543210 COMMENTS
0 0 Low (< 2V), internal source (power-on default)
01
Medium (4.5V to 7V), external SCART source
with 16:9 aspect ratio
1 0 High impedance
Set VCR Function
Switching
11
High (> 9.5V), external SCART source with 4:3
aspect ratio
0Normal operation, pulldown on VCR_R/C_OUT
is off (power-on default)
VCR_R/C_OUT ground
1
Ground, pulldown on VCR_R/C_OUT is on,
the output amplifier driving VCR_R/C_OUT
is turned off
Table 10. Register 09h: VCR Video Output Control
BIT
DESCRIPTION 76543210 COMMENTS
0 Off (power-on default)
RF_CVBS_OUT 1On
0 Off (power-on default)
TVOUT_FS 1On
0 Off (power-on default)
TV_Y/CVBS_OUT 1On
0 Off (power-on default)
TV_B_OUT 1On
0 Off (power-on default)
TV_G_OUT 1On
0 Off (power-on default)
TV_R/C_OUT 1On
0 Off (power-on default)
VCR_R/C_OUT 1On
0 Off (power-on default)
VCR_Y/CVBS_OUT 1On
Table 11. Register 0Dh: Output Enable
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 23
BIT
DESCRIPTION 76543210 COMMENTS
0 0 0 to 2V, internal source
0 1 4.5V to 7V, external source with 16:9 aspect ratio
1 0 Not used
TV Slow Switch
Input
1 1 9.5V to 12.6V, external source with 4:3 aspect ratio
0 0 0 to 2V, internal source
0 1 4.5V to 7V, external source with 16:9 aspect ratio
1 0 Not used
VCR Slow Switch
Input
1 1 9.5V to 12.6V, external source with 4:3 aspect ratio
0V
VID is too low for digital logic to operate
Power-On Reset 1V
VID is high enough for digital logic to operate
0 The part is in thermal shutdown
Thermal Shutdown 1 The temperature is below the TSHD limit
Table 12. Register 0Eh Status
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
24 ______________________________________________________________________________________
Typical Application Circuits
MAX4397DA
ALL CAPACITORS ARE 0.1µF AND ALL RESISTORS ARE 75Ω, UNLESS OTHERWISE NOTED.
VCR_Y/CVBS_OUT
VCR_Y/CVBS_IN
10
11
12
SDA
1
SCL
2
DEV_ADDR
3
ENC_INL+
ENC_INL-
4
5
ENC_INR+
ENC_INR-
6
7
VCR_INR
8
3.3kΩ
9.4kΩ
9.4kΩ
9
RF_CVBS_OUT
TV_Y/CVBS_OUT
TV_R/C_OUT
TV_G_OUT
TV_B_OUT
VCR_R/C_OUT
VVID
VCR_G_IN
VCR_B_IN
ENC_Y/CVBS_IN
ENC_R/C_IN
ENC_G_IN
ENC_B_IN
ENC_Y_IN
ENC_C_IN
ENC_C_IN_SC
373839404142434445464748
VCR_INL
TV_INR
TV_INL
GNDAUD
SDA
SCL
DEV_ADDR
ENC_INL+_SC
ENC_INL-_SC
ENC_INR+_SC
ENC_INR-_SC
VCR_INR_SC
VCR_INL_SC
TV_INR_SC
TV_INL_SC
TVOUT_FS
GNDVID
ENCIN_FS
VCRIN_FS
VCR_Y/CVBS_OUT_SC
RF_CVBS_OUT_SC
TV_Y/CVBS_OUT_SC
TV_R/C_OUT_SC
TV_G_OUT_SC
TV_B_OUT_SC
VCR_R/C_OUT_SC
TVOUT_FS_SC
VCR_R/C_IN
TV_Y/CVBS_IN
TV_R/C_IN
VCR_SS
V
12
TV_OUTR
TV_OUTR_SC
TV_OUTL
RF_MONO_OUT
VCR_OUTL
VCR_OUTR
V
AUD
AUD_BIAS
TV_SS
SET
V
VID
ENC_Y_IN_SC
ENC_B_IN_SC
ENC_B_IN_SC
ENC_R/C_IN_SC
ENC_Y/CVBS_IN_SC
VCR_B_IN_SC
VCR_G_IN_SC
VCR_R/C_IN_SC
VCR_Y/CVBS_IN_SC
TV_Y/CVBS_IN_SC
TV_R/C_IN_SC
3.3kΩ
4.7kΩ
4.7kΩ
4.7kΩ
4.7kΩ
3.3kΩ
3.3kΩ3.3kΩ
3.3kΩ
3.3kΩ
3.3kΩ
3.3kΩ3.3kΩ
27
26
25
36 10µF
0.1µF
35
34
33
32
31
30
29
28
TV_OUTL_SC
RF_MONO_OUT_SC
VCR_OUTL_SC
VCR_OUTR_SC
242322212019181716151413
100kΩ
10µF0.1µF
10µF
0.1µF
10µF
VAUD 10µF10µF10µF10µF
0.1µF
3.3kΩ
3.3kΩ
VVID
ENCIN_FS
VCRIN_FS
VVID
TV_SS
VCR_SS
V12
10kΩ10kΩ
10µF
47µF
0.1µF
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 25
MAX4397SA
ALL CAPACITORS ARE 0.1µF AND ALL RESISTORS ARE 75Ω, UNLESS OTHERWISE NOTED.
VCR_Y/CVBS_OUT
VCR_Y/CVBS_IN
10
11
12
SDA
1
SCL
2
DEV_ADDR
3
ENC_INL
N.C.
4
5
ENC_INR
N.C.
6
7
VCR_INR
8
3.3kΩ
4.7kΩ
9
RF_CVBS_OUT
TV_Y/CVBS_OUT
TV_R/C_OUT
TV_G_OUT
TV_B_OUT
VCR_R/C_OUT
VVID
VCR_G_IN
VCR_B_IN
ENC_Y/CVBS_IN
ENC_R/C_IN
ENC_G_IN
ENC_B_IN
ENC_Y_IN
ENC_C_IN
ENC_C_IN_SC
373839404142434445464748
VCR_INL
TV_INR
TV_INL
GNDAUD
SDA
SCL
DEV_ADDR
ENC_INL_SC
ENC_INR_SC
VCR_INR_SC
VCR_INL_SC
TV_INR_SC
TV_INL_SC
TVOUT_FS
GNDVID
ENCIN_FS
VCRIN_FS
VCR_Y/CVBS_OUT_SC
RF_CVBS_OUT_SC
TV_Y/CVBS_OUT_SC
TV_R/C_OUT_SC
TV_G_OUT_SC
TV_B_OUT_SC
VCR_R/C_OUT_SC
VVID
TVOUT_FS_SC
ENCIN_FS
VCRIN_FS
VCR_R/C_IN
TV_Y/CVBS_IN
TV_R/C_IN
ENC_Y_IN_SC
ENC_B_IN_SC
ENC_B_IN_SC
ENC_R/C_IN_SC
ENC_Y/CVBS_IN_SC
VCR_B_IN_SC
VCR_G_IN_SC
VCR_R/C_IN_SC
VCR_Y/CVBS_IN_SC
TV_Y/CVBS_IN_SC
TV_R/C_IN_SC
3.3kΩ
4.7kΩ
4.7kΩ
3.3kΩ
3.3kΩ3.3kΩ
3.3kΩ
3.3kΩ
3.3kΩ
3.3kΩ
3.3kΩ
27
26
25
36 10µF
0.1µF
35
34
33
32
31
30
29
28
4.7kΩ
3.3kΩ
3.3kΩ
VCR_SS
V
12
TV_OUTR
TV_OUTR_SC
TV_OUTL
RF_MONO_OUT
VCR_OUTL
VCR_OUTR
V
AUD
AUD_BIAS
TV_SS
SET
V
VID
TV_OUTL_SC
RF_MONO_OUT_SC
VCR_OUTL_SC
VCR_OUTR_SC
242322212019181716151413
100kΩ
10µF0.1µF
10µF
0.1µF
10µF
VAUD 10µF10µF10µF10µF
0.1µF
VVID
TV_SS
VCR_SS
V12
10kΩ10kΩ
10µF
47µF
0.1µF
Typical Application Circuits (continued)
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
26 ______________________________________________________________________________________
System Block Diagram
MAX4397DA/SA
V12
12V 5V 5V
VVID VAUD
TV
SCART
CONNECTOR
RGB
CVBS, Y/C
R/L AUDIO
SLOW SWITCHING
FAST SWITCHING
VCR SCART
CONNECTOR
RGB
CVBS, Y/C
R/L AUDIO
SLOW SWITCHING
FAST SWITCHING
VIDEO
ENCODER
RGB
R/L AUDIO
CVBS, Y/C
FAST SWITCHING
AUDIO
DAC
CVBS/Y SWITCHES
AND FILTERS
ADDRESS
SDA
SCL
µC
RF MOD MONO AUDIO
RF_CVBS
GNDAUD GNDVID
EP
SLOW AND FAST
SWITCHING
AUDIO SWITCHES
RGB AND CHROMA
SWITCHES AND
FILTERS
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 27
Pin Configurations
VVID
SET
TV_SS
V12
RF_MONO_OUT
VCR_OUTL
VCR_OUTR
AUD_BIAS
VAUD
TV_OUTR
TV_OUTL
VCR_SS
VCR_Y/CVBS_IN
VCR_R/C_IN
VCR_G_IN
VCR_B_IN
ENC_Y/CVBS_IN
ENC_R/C_IN
ENC_G_IN
ENC_C_IN
ENC_B_IN
TV_Y/CVBS_IN
TV_R/C_IN 37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
ENC_INL-
ENC_INR+
ENC_INR-
VCR_INL
GNDAUD
TV_INL
TV_INR
ENC_INL+
DEV_ADDR
SCL
SDA
VCR_R/C_OUT
VCR_Y/CVBS_OUT
TV_B_OUT
TV_G_OUT
TV_R/C_OUT
TV_Y/CVBS_OUT
RF_CVBS_OUT
GNDVID
TVOUT_FS
VCRIN_FS
ENCIN_FS
VVID
THIN QFN
MAX4397DA
VCR_INR
TOP VIEW
36 35 34 33 32 31 30 29 28 27 26 25
123456789101112
ENC_Y_IN
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
28 ______________________________________________________________________________________
Pin Configurations (continued)
VVID
SET
TV_SS
V12
RF_MONO_OUT
VCR_OUTL
VCR_OUTR
AUD_BIAS
VAUD
TV_OUTR
TV_OUTL
VCR_SS
VCR_Y/CVBS_IN
VCR_R/C_IN
VCR_G_IN
VCR_B_IN
ENC_Y/CVBS_IN
ENC_R/C_IN
ENC_G_IN
ENC_C_IN
ENC_B_IN
TV_Y/CVBS_IN
TV_R/C_IN 1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
N.C.
ENC_INR
N.C.
TV_INR
GNDAUD
TV_INL
VCR_SS
ENC_INL
DEV_ADDR
SCL
SDA
VCR_R/C_OUT
VCR_Y/CVBS_OUT
TV_B_OUT
TV_G_OUT
TV_R/C_OUT
TV_Y/CVBS_OUT
RF_CVBS_OUT
GNDVID
TVOUT_FS
VCRIN_FS
ENCIN_FS
VVID
THIN QFN
MAX4397SA
VCR_INR
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
THIN QFN
36 35 34 33 32 31 30 29 28 27 26 25
123456789101112
ENC_Y_IN
Chip Information
TRANSISTOR COUNT: 13,265
PROCESS: BiCMOS
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
______________________________________________________________________________________ 29
32, 44, 48L QFN.EPS
e
L
e
L
A1 A
A2
E/2
E
D/2
D
DETAIL A
D2/2
D2
b
L
k
E2/2
E2
(NE-1) X e
(ND-1) X e
e
C
L
C
L
C
L
C
L
k
PACKAGE OUTLINE
21-0144 2
1
F
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX4397DA/SA
Audio/Video Switch for Dual SCART Connectors
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
21-0144
2
2
F
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
Revision History
Pages changed at Rev 1: 1, 2, 17, 26, 29, 30
