© 2005 Fairchild Semiconductor Corporation DS009909 www.fairchildsemi.com
September 1988
Revised February 2005
74AC86 Quad 2-Input Exclusive-OR Gate
74AC86
Quad 2-Input Exclusive-OR Gate
General Descript ion
The AC86 contains four, 2-input exclusive-OR gates. Features
■ICC reduced by 50%
■Outputs source/sink 24 mA
Ordering Code:
Device a l s o av ailable in Tape and R eel. Specify by appending su ffix le t te r “X” to the ordering co de.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram Logic Symbol
IEEE/IEC
Pin Descriptions
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74AC86SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC86SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC86PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Nam es Desc ription
A0–A3Inputs
B0–B3Inputs
O0–O3Outputs
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74AC86
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exc eption, to e nsure that the system des ign is reliabl e over its power
supply, temperatu re, and output /input lo ading variable s. Fairch ild do es not
recomm end operation of FACT
¥
circuits outside databo ok s pecificat ions.
DC Electrical Characteristi cs
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximu m test duration 20 m s , o ne output lo aded at a time.
Note 4: IIN and ICC @ 3.0V are guara nt eed to be les s th an or equa l to th e respect iv e limit @ 5. 5V VCC.
Supply Voltage (VCC)
0.5V to
7.0V
DC Input Diode Current (IIK)
VI
0.5V
20 mA
VI
V CC
0.5V
20 mA
DC Input Voltage (VI)
0.5V to VCC
0.5V
DC Output Diode Current (IOK)
VO
0.5V
20 mA
VO
VCC
0.5V
20 mA
DC O utput Voltage ( VO)
0.5V to VCC
0.5V
DC Output Source or Sink Current (IO)
r
50 mA
DC VCC or Ground Current
Per Output Pin (ICC or IGND)
r
50 mA
Storage Temperature (TSTG)
65
q
C to
150
q
C
Junction Temperature (TJ)
PDIP 140
q
C
Supply Voltage (VCC) 2.0V to 6.0V
Input Voltage (VI) 0V to VCC
Output Volt age (VO) 0V to VCC
Operating Temperature (TA)
40
q
C to
85
q
C
Minimum Input Edge Rate (
'
V/
'
t) 125 mV/ns
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
Symbol Parameter VCC TA
25
q
CT
A
40
q
C to
85
q
CUnits Conditions
(V) Typ Guaranteed Limits
VIH Minimum HIGH Level 3.0 1.5 2.1 2.1 VOUT
0.1V
Input Voltage 4.5 2.25 3.15 3.15 V or VCC
0.1V
5.5 2.75 3.85 3.85
VIL Maximum LOW Level 3.0 1.5 0.9 0.9 VOUT
0.1V
Input Voltage 4.5 2.25 1.35 1.35 V or VCC
0.1V
5.5 2.75 1.65 1.65
VOH Minimum HIGH Level 3.0 2.99 2.9 2.9
Output Voltage 4.5 4.49 4.4 4.4 V IOUT
50
P
A
5.5 5.49 5.4 5.4 VIN
VIL or VIH
3.0 2.56 2.46 IOH =
12 mA
4.5 3.86 3.76 V IOH =
24 mA
5.5 4.86 4.76 IOH =
24 mA (Note 2)
VOL Maximum LOW Level 3.0 0.002 0.1 0.1
Output Voltage 4.5 0.001 0.1 0.1 V IOUT
50
P
A
5.5 0.001 0.1 0.1 VIN
VIL or VIH
3.0 0.36 0.44 IOL = 12 mA
4.5 0.36 0.44 V IOL = 24 mA
5.5 0.36 0.44 IOL = 24 mA (Note 2)
IIN (Note 4) Maximum Input Leakage Current 5.5
r
0.1
r
1.0
P
AV
I
VCC, GND
IOLD Minimum Dynamic 5.5 75 mA VOLD
1.65V Max
IOHD Output Current (Note 3) 5.5
75 mA VOHD
3.85V Min
ICC Maximum Quiescent 5.5 2.0 20.0
P
AVIN
VCC
(Note 4) Supply Current or GND
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74AC86
AC Electrical Characteristics
Note 5: Voltage Range 3. 3V is 3.3V
r
0.3V
Voltage R ange 5.0V is 5. 0V
r
0.5V
Capacitance
VCC TA
25
q
CT
A
40
q
C to
85
q
C
Symbol Parameter (V) CL
50 pF CL 40 pF Units
(Note 5) Min Typ Max Min Max
tPHL Propagation Delay 3.3 2.0 6.0 11.5 1.5 12.5 ns
Inputs to Outputs 5.0 1.5 4.5 8.5 1.0 9.5
tPLH Propagation Delay 3.3 2.0 6.5 11.5 1.5 12.5 ns
Inputs to Outputs 5.0 1.5 4.5 8.5 1.0 9.0
Symbol Parameter Typ Units Conditions
CIN Input Capacitance 4.5 pF VCC
OPEN
CPD Power Dissipation Capacitance 35 pF VCC
5.0V
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74AC86
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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74AC86
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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74AC86
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
7 www.fairchildsemi.com
74AC86 Quad 2-Input Exclusive-OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assum e any responsibility for use of any circuitry described, no cir cuit patent licenses are im plied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syst ems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instruct ions fo r use provided in the l abe li ng, can be re a-
sonably expected to result in a significant injury to the
user.
2. A crit ical com ponen t in any com ponen t of a life s uppor t
device or system whose failure to perform can be rea-
sonabl y e xpec ted to cause th e fa i lure of the l ife suppor t
device or system, or to affect its safety or effectiveness.
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