ACFL-5211T
Automotive R2CouplerTM Wide Operating Temperature 1MBd Digital
Optocoupler in a Stretched 12-Pin Surface Mount Plastic Package
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this
component to prevent damage and/or degradation which may be induced by ESD. The components
featured in this datasheet are not to be used in military or aerospace applications or environments.
Description
The ACFL-5211T is an automotive grade dual channel, bi-
directional, high speed 1MBd digital optocoupler. The
stretched SO-12 stretched package outline is designed
to be compatible with standard surface mount processes
and occupies the same land area as the single channel
equivalent, ACPL-K43T, in stretched SO8 package.
This digital optocoupler uses an insulating layer between
the light emitting diode and an integrated photo detector
to provide electrical insulation between input and output.
Each channel is also galvanically isolated from the other
with no cross-talk.
Avago R2Coupler provides with reinforced insulation and
reliability that delivers safe signal isolation critical in auto-
motive and high temperature industrial applications
Functional Diagram
Features
• Qualied to AEC Q100 Grade 1 Guidelines
• Wide Temperature Range: -40°C to +125°C
• Ultra low LED drive current for status feedback at IF =
0.8mA or 1.5mA
• High speed (1MBd) operation at IF = 10mA with low
propagation delay: 1µs (max.)
• Low standby leakage:
- ICCH: 2.5µA (max.)
- IOH: 5µA (max.)
• 30 kV/µs High Common-Mode Rejection at VCM = 1500
V (typ)
• Compact, Auto-Insertable Stretched SO12 Packages
• Worldwide Safety Approval:
- UL 1577 recognized, 5kVRMS/1 min.
- CSA Component Acceptance Notice#5A
- IEC/EN/DIN EN 60747-5-5
Applications
• Automotive Low Speed Digital Signal Isolation Interface
• Inverter Fault Feedback Signal Isolation
• Switching Power Supplies Feedback Circuit
Truth Table
LED VO
ON LOW
OFF HIGH
Note: The connection of a 1 μF bypass capacitor between pins 1 and 3
and pins 8 and 10 is recommended.
1
2
3
4
5
6
12
11
10
9
8
7
VCC1
VOUT1
GND1
AN2
CA2
CA2
VCC2
VOUT2
GND2
AN1
CA1
GND2
2
Pin Description
Pin No. Pin Name Description Pin No. Pin Name Description
1 VCC1 Primary Side Power Supply 7 GND2 Secondary Side Ground
2 VOUT1 Output 1 8 GND2 Secondary Side Ground
3 GND1 Primary Side Ground 9 VOUT2 Output 2
4 AN2 Anode 2 10 VCC2 Secondary Side Power Supply
5 CA2 Cathode 2 11 AN1 Anode 1
6 CA2 Cathode 2 12 CA1 Cathode 1
Ordering Information
Part number
Option
(RoHS Compliant) Package
Surface
Mount
Tape
& Reel
UL 5000 Vrms/
1 Minute rating
IEC/EN/DIN
EN 60747-5-5 Quantity
ACFL-5211T -000E Stretched
SO-12
X X 80 per tube
-060E X X X 80 per tube
-500E X X X 1000 per reel
-560E X X X X 1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
ACFL-5211T-560E to order product of SSO-12 Surface Mount package in Tape and Reel packaging with IEC/EN/DIN EN
60747-5-5 Safety Approval in RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
3
Package Outline Drawing
12-Lead Surface Mount
Dimensions in inches (millimeters)
Lead coplanarity = 0.004 inches (0.1mm)
Recommended Pb-Free IR Prole
Recommended reow condition as per JEDEC Standard, J-STD-020 (latest revision).
Note: Non-halide ux should be used
LAND PATTERN RECOMMENDATION
0.080 (2.030)
0.458 (11.630)
0.020 (0.500)
0.015
(0.381)
0.125 ± 0.005
(3.180 ± 0.127)
7°
0.015
(0.381)
0.032
(0.800)
1 2 3 4 5 6
12 11 10 9 8 7
5211T
YYWW
EE
0.230
( 5.842
0.295
( 7.493
TYPE NUMBER
DATECODE
EXTENDED
DATECODE FOR
LOT TRACKING
+ 0.005
− 0
+ 0.127
− 0 )
+ 0.005
− 0
+ 0.127
− 0 )
45°
0.326 ± 0.010
(8.284 ± 0.254)
0.029 ± 0.004
(0.731 ± 0.100)
0.408 ± 0.010
(10.363 ± 0.250)
0.010 ± 0.002
(0.254 ± 0.050)
7°
0.008 ± 0.004
(0.200 ± 0.100)
0.063 ± 0.005
(1.590 ± 0.127)
RoHS-COMPLIANCE
INDICATOR
0° to 7°
4
Regulatory Information
The ACFL-5211T is approved by the following organizations:
UL Approved under UL 1577, component recognition program up to VISO = 5kVRMS
CSA Approved under CSA Component Acceptance Notice #5A
IEC/EN/DIN EN 60747-5-5 Approved under IEC/EN/DIN EN 60747-5-5
Insulation and Safety Related Specications
Parameter Symbol ACFL-5211T Units Conditions
Minimum External Air Gap (Clear-
ance)
L(101) 8.3 mm Measured from input terminals to output terminals,
shortest distance through air.
Minimum External Tracking
(Creepage)
L(102) 8.5 mm Measured from input terminals to output terminals,
shortest distance path along body.
Minimum Internal Plastic Gap
(Internal Clearance)
0.08 mm Through insulation distance conductor to conductor,
usually the straight line distance thickness between
the emitter and detector.
Tracking Resistance
(Comparative Tracking Index)
CTI 175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group (DIN VDE0109) IIIa Material Group (DIN VDE 0109)
IEC / EN / DIN EN 60747-5-5 Insulation Related Characteristic (Option 060E and 560E)
Description Symbol Characteristic Units
Installation classication per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 600 V rms
for rated mains voltage < 1000 V rms
I-III
I-III
Climatic Classication 40/125/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 1140 VPEAK
Input to Output Test Voltage, Method b
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC
VPR 2137 VPEAK
Input to Output Test Voltage, Method a
VIORM x 1.6 = VPR, Type and sample test, tm = 10 sec, Partial Discharge < 5 pC
VPR 1824 VPEAK
Highest Allowable Overvoltage (Transient Overvoltage, tini = 60 sec) VIOTM 6000 VPEAK
Safety Limiting Values (Maximum values allowed in the event of a failure)
Case Temperature
Input Current
Output Power
TS
IS,INPUT
PS,OUTPUT
175
230
600
°C
mA
mW
Insulation Resistance at TS, VIO = 500 V RS109W
5
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units Condition
Storage Temperature TS-55 150 °C
Operating Temperature TA-40 125 °C
Junction Temperature TJ150 °C
Lead Soldering Cycle Temperature 260 °C
Time 10 s
Average Forward Input Current IF(avg) 20 mA
Peak Forward Input Current
(50% duty cycle, 1ms pulse width)
IF(peak) 40 mA
Peak Transient Input Current
(≤1µs pulse width, 300ps)
IF(trans) 100 mA
Reversed Input Voltage VR5 V
Input Power Dissipation PIN 30 mW
Output Power Dissipation PO100 mW
Average Output Current IO8 mA
Peak Output Current IO(pk) 16 mA
Supply Voltage VCC1/VCC2 -0.5 30 V
Output Voltage VOUT1/VOUT2 -0.5 20 V
Solder Reow Temperature Prole See Reow Temperature Prole
Recommended Operating Conditions
Parameter Symbol Min. Max. Units Note
Supply Voltages VCC1/VCC2 20.0 V
Operating Temperature TA-40 125 °C
6
Electrical Specications (DC) for 5-Pin Conguration
Over recommended operating conditions, unless otherwise specied. All typical specications are at TA=25°C, VCC= 5V.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Current Transfer Ratio CTR 32 65 100 % TA=25°C, VCC=4.5V, VO=0.5V,
IF=10mA
1, 2,
4
1
24 65 VCC=4.5V, VO=0.5V, IF=10mA
33 160 VCC=4.5V, VO=0.5V, IF=1.5mA
25 165 VCC=4.5V, VO=0.5V, IF=0.8mA
Logic Low Output Voltage VOL 0.1 0.5 V TA=25ºC, VCC=4.5V, IF=10mA,
IO=2.4mA,
0.1 VCC=4.5V, IF=1.5mA, IO=0.5mA,
0.1 VCC=4.5V, IF=0.8mA, IO=0.2mA,
Logic High Output Current IOH 0.003 0.5 µATA=25ºC, VO=VCC=5.5V,IF=0mA 13,
14
0.01 5 VO=VCC=20V,IF=0mA
Logic Low Supply Current ICCL 85 200 µAIF=10mA, VO=open, VCC=20V
15 µAIF=1.5mA, VO=open, VCC=20V
Logic High Supply Current ICCH 0.02 1 µA TA=25°C, IF=0mA, VO=open,
VCC=20V
2.5 µAIF=0mA, VO=open, VCC=20V
Input Forward Voltage VF1.45 1.55 1.75 V TA=25ºC, IF=10mA 3
1.25 1.5 1.85 V IF=10mA
Input Reversed Breakdown
Voltage
BVR5 V IR=10µA
Temperature Coecient
of Forward Voltage
DV/DTA-1.5 mV/°CIF=10mA
-1.8 IF=1.5mA
Input Capacitance CIN 90 pF F=1MHz, VF=0
Switching Specications (AC)
Over recommended operating conditions, unless otherwise specied. All typical specications are at TA=25°C, VCC= 5V.
Parameter Sym. Min. Typ. Max. Units Conditions Fig. Note
Propagation Delay Time
to Logic Low at Output
tPHL 0.03 0.15 1.0 μs IF = 10mA, RL = 1.9kΩ Pulse: f=10kHz,
Duty cycle = 50%,
VCC = 5.0 V,
CL = 15pF,
VTHHL=1.5V
5 to
12
2
0.7 5.0 IF = 1.5mA, RL = 10kΩ
1 10 IF = 0.8mA, RL = 27kΩ
Propagation Delay Time
to Logic High at Output
tPLH 0.03 0.5 1.0 μs IF = 10mA, RL = 1.9kΩ Pulse: f=10kHz,
Duty cycle = 50%,
VCC = 5.0 V,
CL = 15pF,
VTHLH=2.0V
5 to
12
2
0.9 5.0 IF = 1.5mA, RL = 10kΩ
2 10 IF = 0.8mA, RL = 27kΩ
Pulse Width Distortion PWD 0.35 0.85 μs Pulse: f=10kHz, Duty cycle = 50%,
IF = 10mA, RL = 1.9kΩ,VCC = 5.0 V,
CL = 15pF, VTHHL=1.5V, VTHLH=2.0V
5 to
12
2,3
Propagation Delay Dierence
between Any 2 Parts
PDD 0.35 0.9 μs 2,4
Common Mode Transient
Immunity at Logic High Output
|CMH| 15 30 kV/ μs IF=0mA VCM=1500Vp-p,
TA=25°C
VCC = 5.0 V,
RL=1.9kΩ
5
Common Mode Transient
Immunity at Logic Low Output
|CML| 15 30 kV/ μs IF=10mA
7
Package Characteristics
All Typical at TA = 25°C.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary
Withstand Voltage*
VISO 5000 VRMS RH ≤ 50%, t = 1 min;
TA = 25°C
6, 7
Input-Output Resistance RI-O 1014 Ω VI-O = 500 Vdc 6
Input-Output Capacitance CI-O 0.6 pF f = 1 MHz; VI-O = 0 VDC 6
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage
rating.
Notes:
1. Current Transfer Ratio in percent is dened as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
2. Use of 1µF bypass capacitors connected between pins 1 and 3 and pins 8 and 10.
3. Pulse Width Distortion (PWD) is dened as |tPHL-tPLH| for any given device.
4. The dierence between tPHL and tPLH between any 2 parts under the same test conditions.
5. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM,
to assure that the ouput will remain in a Logic High state (i.e., Vo > 2.0V). Common mode transient immunity in a Logic Low level is the maximum
tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state
(i.e., Vo < 0.8V).
6. Device considered a two terminal device: pins 1to 6 shorted together, and pins 7 to 12 shorted together.
7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000VRMS for 1 second.
8
Typical Performance Plots
0
5
10
15
20
25
30
35
0 5 10 15 20
IO - OUTPUT CURRENT - mA
VO - OUTPUT VOLTAGE - V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0 1 10 100
NORMALIZED CURRENT TRANSFER RATIO
IF - INPUT CURRENT - mA
0.1
1.0
10.0
1.1 1.2 1.3 1.4 1.5 1.6 1.7
IF - FORWARD CURRENT - mA
VF - FORWARD VOLTAGE - V
Temp=-40°C
Temp=25°C
Temp=125°C
0.6
0.7
0.8
0.9
1.0
1.1
-40 -20 0 20 40 60 80 100 120 140
NORMALIZED CURRENT TRANSFER RATIO
TA - TEMPERATURE - °C
0
0.2
0.4
0.6
0.8
1
1.2
-40 -20 0 20 40 60 80 100 120 140
T
P
- PROPAGATION DELAY - µs
TA - TEMPERATURE - °C
TPLH, VCC=5V
TPHL, VCC=5V
TPLH, VCC=3.3V
TPHL, VCC=3.3V
0
0.1
0.2
0.3
0.4
-40 -20 0 20 40 60 80 100 120 140
T
P
- PROPAGATION DELAY - µs
TA - TEMPERATURE - °C
TPLH, VCC=20V
TPHL, VCC=20V
TPLH, VCC=15V
TPHL, VCC=15V
VCC=5V, TA=25°CVO=0.4V, VCC=5V, TA=25°C
Normalized: IF=10mA
IF=10mA, VO=0.4V, VCC=5V
Normalized: TA=25°C
IF=10mA, RL=1.9kΩ
IF=10mA, RL=20kΩ
IF=40mA
IF=35mA
IF=30mA
IF=25mA
IF=20mA
IF=15mA
IF=10mA
IF=5mA
IF=4mA
Figure 1. DC and Pulsed Transfer Characteristics Figure 2. Current Transfer Ratio vs Input Current
Figure 3. Input Current vs Input Voltage Figure 4. Current Transfer Ratio vs Temperature
Figure 5. Propagation Delay Time vs Temperature Figure 6. Propagation Delay Time vs Temperature
9
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0 5 10 15 20 25
TP - PROPAGATION DELAY - µs
RLOAD - LOAD RESISTANCE - kΩ
TPLH, VCC=5V
TPHL, VCC=5V
TPLH, VCC=3.3V
TPHL, VCC=3.3V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0 5 10 15 20 25
TP - PROPAGATION DELAY - µs
RLOAD - LOAD RESISTANCE - kΩ
TPLH, VCC=20V
TPHL, VCC=20V
TPLH, VCC=15V
TPHL, VCC=15V
0
0.1
0.2
0.3
0.4
0.5
0.6
10 11 12 13 14 15 16
TP - PROPAGATION DELAY - µs
IF - FORWARD CURRENT - mA
TPLH, VCC=5V
TPHL, VCC=5V
TPLH, VCC=3.3V
TPHL, VCC=3.3V
0
0.5
1
1.5
2
2.5
3
3.5
10 11 12 13 14 15 16
TP - PROPAGATION DELAY - µs
IF - FORWARD CURRENT - mA
TPLH, VCC=5V
TPHL, VCC=5V
TPLH, VCC=3.3V
TPHL, VCC=3.3V
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
10 11 12 13 14 15 16
TP - PROPAGATION DELAY - µs
IF - FORWARD CURRENT - mA
TPLH, VCC=5V
TPHL, VCC=5V
TPLH, VCC=3.3V
TPHL, VCC=3.3V
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
10 11 12 13 14 15 16
TP - PROPAGATION DELAY - µs
IF - FORWARD CURRENT - mA
TPLH, VCC=5V
TPHL, VCC=5V
TPLH, VCC=3.3V
TPHL, VCC=3.3V
IF=10mA, TA=25°C
IF=10mA, TA=25°C
RL=1.9kΩ, TA=25°C
RL=20kΩ, TA=25°C
RL=10kΩ, TA=25°CRL=27kΩ, TA=25°C
Figure 7. Propagation Delay Time vs Load Resistance Figure 8. Propagation Delay Time vs Load Resistance
Figure 9. Propagation Delay Time vs Input Current Figure 10. Propagation Delay Time vs Input Current
Figure 11. Propagation Delay Time vs Input Current Figure 12. Propagation Delay Time vs Input Current
10
Figure 13. Logic High Output Current vs Supply Voltage Figure 14. Logic High Output Current vs Temperature
Test Circuits
0.0001
0.001
0.01
0.1
1
10
100
1000
2 4 6 8 10 12 14 16 18 20
IOH - LOGIC HIGH OUTPUT CURRENT - nA
VCC - SUPPLY VOLTAGE - V
Temp = -40°C
Temp = 25°C
Temp = 125°C
0.0001
0.001
0.01
0.1
1
10
100
1000
-40 -20 0 20 40 60 80 100 120 140
IOH - LOGIC HIGH OUTPUT CURRENT - nA
TA - TEMPERATURE - °C
IF=0mA, VCC=VO
TA=25°C, VO=VCC=5V, IF=0mA
VIN
0
VO
2V
VOL
1.5V
tPHL tPLH
OUTPUT
MONITORING
NODE
PULSE
GENERATOR
ZO=50 Ω
tr=tf=5ns
INPUT
MONITORING
NODE
RMONITOR
=100 Ω
VCC
CL*
GND1
GND2
1
2
3
4
5
6
12
11
10
9
8
7
RL
*CL IS APPROXIMATELY 15pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE
IF
trtf
1500V
0V 10%
90% 90%
SWITCH AT A: IF = 0mA
SWITCH AT B: IF = 10mA
5V
VOL
10%
OUTPUT
MONITORING
NODE
1µF
BYPASS
CAPACITOR
B
A
HIGH VOLTAGE PULSE
VCM=1500V
+ -
1
2
3
4
5
6
12
11
10
9
8
7
IFVCC
RL
VCM
VO
RLIMIT
VIN
VO
1µF
Figure 15. Switching Test Circuit
Figure 16. Test Circuit for Transient Immunity and Typical Waveforms
11
Thermal Resistance Measurement
The diagram of ACFL-5211T for measurement is shown in Figure 17. This is a multi-chip package with four heat sources,
the eect of heating of one die due to the adjacent dice are considered by applying the theory of linear superposition.
Here, one die is heated rst and the temperatures of all the dice are recorded after thermal equilibrium is reached. Then,
the 2nd die is heated and all the dice temperatures are recorded and so on until the 4th die is heated. With the known
ambient temperature, the die junction temperature and power dissipation, the thermal resistance can be calculated.
The thermal resistance calculation can be cast in matrix form. This yields a 4 by 4 matrix for our case of two heat sources.
Figure 17. Diagram of ACFL-5211T for measurement
R11: Thermal Resistance of Die1 due to heating of Die1 (˚C/W)
R12: Thermal Resistance of Die1 due to heating of Die2 (˚C/W)
R13: Thermal Resistance of Die1 due to heating of Die3 (˚C/W)
R14: Thermal Resistance of Die1 due to heating of Die4 (˚C/W)
R21: Thermal Resistance of Die2 due to heating of Die1 (˚C/W)
R22: Thermal Resistance of Die2 due to heating of Die2 (˚C/W)
R23: Thermal Resistance of Die2 due to heating of Die3 (˚C/W)
R24: Thermal Resistance of Die2 due to heating of Die4 (˚C/W)
R31: Thermal Resistance of Die3 due to heating of Die1 (˚C/W)
R32: Thermal Resistance of Die3 due to heating of Die2 (˚C/W)
R33: Thermal Resistance of Die3 due to heating of Die3 (˚C/W)
R34: Thermal Resistance of Die3 due to heating of Die4 (˚C/W)
R41: Thermal Resistance of Die4 due to heating of Die1 (˚C/W)
R42: Thermal Resistance of Die4 due to heating of Die2 (˚C/W)
R43: Thermal Resistance of Die4 due to heating of Die3 (˚C/W)
R44: Thermal Resistance of Die4 due to heating of Die4 (˚C/W)
P1: Power dissipation of Die1 (W)
P2: Power dissipation of Die2 (W)
P3: Power dissipation of Die3 (W)
P4: Power dissipation of Die4 (W)
T1: Junction temperature of Die1 due to heat from all dice (°C)
T2: Junction temperature of Die2 due to heat from all dice (°C)
T3: Junction temperature of Die3 due to heat from all dice (°C)
T4: Junction temperature of Die4 due to heat from all dice (°C)
Ta: Ambient temperature.
∆T1: Temperature dierence between Die1 junction and ambient (°C)
∆T2: Temperature deference between Die2 junction and ambient (°C)
∆T3: Temperature dierence between Die3 junction and ambient (°C)
∆T4: Temperature deference between Die4 junction and ambient (°C)
T1 = (R11 x P1 + R12 x P2 + R13 x P3 + R14 x P4 ) + Ta -- (1)
T2 = (R21 x P1 + R22 x P2 + R23 x P3 + R24 x P4) + Ta -- (2)
T3 = (R31 x P1 + R32 x P2 + R33 x P3 + R34 x P4) + Ta -- (3)
T4= (R41 x P1 + R42 x P2 + R43 x P3 + R44 x P4 ) + Ta -- (4)
Measurement data on a low K (conductivity) board:
R11 = 181 °C/W
R21 = 103 °C/W
R31 = 82 °C/W
R41 = 110 °C/W
R12 = 91 °C/W
R22 = 232 °C/W
R32 = 97 °C/W
R42 = 86 °C/W
R13 = 85 °C/W
R23 = 109 °C/W
R33 = 180 °C/W
R43 = 101 °C/W
R14 = 112 °C/W
R24 = 91 °C/W
R34 = 91 °C/W
R44 = 277 °C/W
Measurement data on a high K (conductivity) board:
R11 = 117 °C/W
R21 = 37 °C/W
R31 = 35 °C/W
R41 = 47 °C/W
R12 = 42 °C/W
R22 = 161 °C/W
R32 = 53°C/W
R42 = 30 °C/W
R13 = 32 °C/W
R23 = 39 °C/W
R33 = 114 °C/W
R43 = 29 °C/W
R14 = 60 °C/W
R24 = 33 °C/W
R34 = 34 °C/W
R44 = 189 °C/W
1
2
3
4
5
6
12
11
10
9
8
7
Die 1:
IC1
Die 4:
LED2
Die 2:
LED1
Die 3:
IC2
R11 R12 R13 R14
•
P1
=
∆T1
R21 R22 R23 R24 P2 ∆T2
R31 R32 R33 R34 P3 ∆T3
R41 R42 R43 R44 P4 ∆T4
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2015 Avago Technologies. All rights reserved.
AV02-4892EN - August 11, 2015
Mouser Electronics
Authorized Distributor
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