1. General description
The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded
outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs
(CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is
advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a
HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9
output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to drive
the CP0 input of the next counter. A HIGH on MR resets the counter to zero (Q0 = Q5-9 =
HIGH; Q1 to Q9 = LOW) independent of the clock inputs (CP0 an d CP 1). Automatic code
correction of the counter is provided by an internal circuit: following any illegal code the
counter returns to a proper counting mode within 11 clock pulses. Inputs include clamp
diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.
2. Features and benefits
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC4017: CMOS leve l
For 74HCT4017: TTL level
Complies with JEDEC standard no. 7 A
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Rev. 5 — 3 February 2016 Product data sheet
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 2 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
3. Ordering information
4. Functional diagram
Tabl e 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC4017
74HC4017D 40 C to +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74HC4017DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm SOT338-1
74HC4017PW 40 Cto+125C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74HC4017BQ 40 Cto+125C DHVQFN16 plastic dual in-line compatible thermal-enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
74HCT4017
74HCT4017D 40 C to +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74HCT4017BQ 40 Cto+125C DHVQFN16 plastic dual in-line compatible thermal-enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
Fig 1. Functional di agram
DDK
'(&2',1*$1'287387&,5&8,75<
67$*(-2+1621&2817(5
4
&3
05


 &3
4
4
4
4

4
4
4
4
4
4


© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 3 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Fig 2. Logic symbol Fig 3. IEC logic symbol
4
4


4
05

 &3
&3
4
4
4
4
4

4
4
4
DDK
&7


&7 
&75',9'(&




DDK
Fig 4. Logic diag ram
DDK
))
'
&3
5'
4
4
))
'
&3
5'
4
4
))
'
&3
5'
4
4
))
'
&3
5'
4
4
))
'
&3
5'
4
4
4
&3
&3
05
4 4 4 4 4 4 4 4 4 4
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 4 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Fig 5. Timing diagram
DDK
&3,1387
&3,1387
05,1387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
4287387
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 5 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 6. Pin configuration SO16 and (T)SSOP16 Fig 7. Pin configuration DHVQFN16
+&
+&7
4 9&&
4 05
4 &3
4 &3
4 4
4 4
4 4
*1' 4
DDK







Table 2. Pin description
Symbol Pin Description
Q[0:9] 3, 2, 4, 7, 10, 1, 5, 6, 9, 11 decoded output
GND 8 ground (0 V)
Q5-9 12 carry output (active LOW)
CP1 13 clock input (HIGH-to-LOW edge-triggered)
CP0 14 clock input (LOW-to-HIGH edge-triggered)
MR 15 master reset input (active HIGH)
VCC 16 supply voltage
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 6 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH transition;
= HIGH-to-LOW transition;
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 C.
[3] Ptot derates linearly with 5.5 mW/K above 60 C.
[4] Ptot derates linearly with 4.5 mW/K above 60 C.
Table 3. Function table[1]
MR CP0 CP1Operation
HXXQ0 = Q
5-9 = HIGH;
Q1 to Q9 = LOW
LHcounter advan ces
LL counter advances
L L X no change
L X H no change
LHno change
LL no change
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI>V
CC +0.5 V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -20 mA
IOoutput curren t 0.5 V < VO < VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO16 package [2] -500mW
(T)SSOP16 package [3] -500mW
DHVQFN16 package [4] -500mW
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 7 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
74HC4017
VCC supply voltage 2.0 5.0 6.0 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
t/V input transition rise and fall rate VCC = 2.0 V - - 625 ns/V
VCC = 4.5 V - 1.67 139 ns/V
VCC = 6.0 V - - 83 ns/V
Tamb ambient temperature 40 - +125 C
74HCT4017
VCC supply voltage 4.5 5.0 5.5 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
t/V input transition rise and fall rate VCC = 4.5 V - 1.67 139 ns/V
Tamb ambient temperature 40 - +125 C
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC4017
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL
IO=20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V
IO=4.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V
IO=5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 8 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
VOL LOW-level
output voltage VI=V
IH or VIL
IO=20A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO=20A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO=20A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V
IO=4.0mA; V
CC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V
IO=5.2mA; V
CC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND;
VCC =6.0V --0.1 - 1.0 - 1.0 A
ICC supply current VI=V
CC or GND; IO=0A;
VCC =6.0V - - 8.0 - 80 - 160 A
CIinput
capacitance -3.5- - - - - pF
74HCT4017
VIH HIGH-level
input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage VI=V
IH or VIL; VCC =4.5V
IO=20 A 4.4 4.5 - 4.4 - 4.4 - V
IO=4 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level
output voltage VI=V
IH or VIL; VCC =4.5V
IO=20A - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V
IIinput leakage
current VI=V
CC or GND;
VCC =5.5V --0.1 - 1.0 - 1.0 A
ICC supply current VI=V
CC or GND;
VCC =5.5V; I
O=0A - - 8.0 - 80 - 160 A
ICC additional
supply current per input pin;
VI=V
CC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V;
IO=0A
CP0 input - 25 90 - 113 - 123 A
CP1 input - 40 144 - 180 - 196 A
MR input - 50 180 - 225 - 245 A
CIinput
capacitance -3.5- - - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 9 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 11.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
74HC4017
tpd propagation
delay CP0 to Qn; CP0 to Q5-9;
see Figure 10 [1]
VCC = 2.0 V - 63 230 - 290 - 345 ns
VCC = 4.5 V - 23 46 - 58 - 69 ns
VCC = 5.0 V;
CL=15pF -20- - - - -ns
VCC = 6.0 V - 18 39 - 49 - 59 ns
CP1 to Qn; CP1 to Q5-9;
see Figure 10
VCC = 2.0 V - 61 250 - 315 - 375 ns
VCC = 4.5 V - 22 50 - 63 - 75 ns
VCC = 5.0 V;
CL=15pF -20- - - - -ns
VCC = 6.0 V - 18 43 - 54 - 64 ns
tPHL HIGH to LOW
propagation
delay
MR to Q[1:9];
see Figure 10
VCC = 2.0 V - 52 230 - 290 - 345 ns
VCC = 4.5 V - 19 46 - 58 - 69 ns
VCC = 6.0 V - 15 39 - 49 - 59 ns
tPLH LOW to HIGH
propagation
delay
MR to Q5-9, Q0;
see Figure 10
VCC = 2.0 V - 55 230 - 290 - 345 ns
VCC = 4.5 V - 20 46 - 58 - 69 ns
VCC = 6.0 V - 16 39 - 49 - 59 ns
tttransition time see Figure 10 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns
tWpulse width CP0 and CP1 (HIGH or
LOW); see Figure 9
VCC = 2.0 V 80 17 - 100 - 120 - ns
VCC = 4.5 V 16 6 - 20 - 24 - ns
VCC = 6.0 V 14 5 - 17 - 20 - ns
MR (HIGH); see Figure 9
VCC = 2.0 V 80 19 - 100 - 120 - ns
VCC = 4.5 V 16 7 - 20 - 24 - ns
VCC = 6.0 V 14 6 - 17 - 20 - ns
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 10 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
tsu set-up time CP1toCP0; CP0 to CP1;
see Figure 8
VCC = 2.0 V 50 8 - 65 - 75 - ns
VCC = 4.5 V 10 3 - 13 - 15 - ns
VCC = 6.0 V 9 2- 11 - 13 -ns
thhold time CP1toCP0; CP0 to CP1;
see Figure 8
VCC = 2.0 V 50 17 - 65 - 75 - ns
VCC = 4.5 V 10 6 - 13 - 15 - ns
VCC = 6.0 V 9 5 - 11 - 13 - ns
trec recovery time MR to CP0 and
MR to CP1; see Figure 9
VCC = 2.0 V 5 17 - 5 - 5 - ns
VCC = 4.5 V 5 6- 5 - 5 -ns
VCC = 6.0 V 5 5- 5 - 5 -ns
fmax maximum
frequency CP0 or CP1; see Figure 9
VCC = 2.0 V 6.0 23 - 4.8 - 4.0 - MHz
VCC = 4.5 V 30 70 - 24 - 20 - MHz
VCC = 5.0 V;
CL=15pF -77- - - - -MHz
VCC = 6.0 V 25 83 - 28 - 24 - MHz
CPD power
dissipation
capacitance
VI = GND to VCC;
VCC =5V; f
i=1MHz [3] -35- - - - -pF
74HCT4017
tpd propagation
delay CP0 to Qn; CP0 to Q5-9;
see Figure 10 [1]
VCC = 4.5 V - 25 46 - 58 - 69 ns
VCC = 5.0 V;
CL=15pF -21- - - - -ns
CP1 to Qn; CP1 to Q5-9;
see Figure 10
VCC = 4.5 V - 25 50 - 63 - 75 ns
VCC = 5.0 V;
CL=15pF -21- - - - -ns
tPHL HIGH to LOW
propagation
delay
MR to Q[1:9];
see Figure 10
VCC = 4.5 V - 22 46 - 58 - 69 ns
tPLH LOW to HIGH
propagation
delay
MR to Q5-9, Q0;
see Figure 10
VCC = 4.5 V - 20 46 - 58 - 69 ns
Table 7. Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 11.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 11 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
tttransition time see Figure 10 [2]
VCC = 4.5 V - 7 15 - 19 - 22 ns
tWpulse width CP0 and CP1 (HIGH or
LOW); see Figure 9
VCC = 4.5 V 16 7 - 20 - 24 - ns
MR (HIGH); see Figure 9
VCC = 4.5 V 16 4 - 20 - 24 - ns
tsu set-up time CP1toCP0; CP0 to CP1;
see Figure 8
VCC = 4.5 V 10 3 - 13 - 15 - ns
thhold time CP1toCP0; CP0 to CP1;
see Figure 8
VCC = 4.5 V 10 6 - 13 - 15 - ns
trec recovery time MR to CP0 and
MR to CP1; see Figure 9
VCC = 4.5 V 5 5- 5 - 5 -ns
fmax maximum
frequency CP0 or CP1; see Figure 9
VCC = 4.5 V 30 61 - 24 - 20 - MHz
VCC = 5.0 V;
CL=15pF -67- - - - -MHz
CPD power
dissipation
capacitance
VI = GND to VCC 1.5 V;
VCC =5V; f
i=1MHz [3] -36- - - - -pF
Table 7. Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 11.
Symbol Parameter Conditions 25 C40 C to +85 C40 C to +125 CUnit
Min Typ Max Min Max Min Max
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 12 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
11. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8. Waveforms sh owing the set-up and ho ld times for CP0 to CP1 and CP1 to CP 0
WK
WVX
&3LQSXW
*1'
*1'
&3LQSXW
90
9,
9,
WK
WVX
90
DDK
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 9. Waveforms showing the minimum pulse width for CP0, CP1 and MR input; the maximum frequency for
CP0 and CP1 input; the recovery time for MR and the MR input to Qn and Q5-9 output propagation delays
&3LQSXW
9,
*1'
9,
*1'
9,
*1'
92+
92/
92+
92/
44
RXWSXW
05LQSXW
&3LQSXW
90
90
IPD[
W:
W:
WUHF
90
IPD[
W:
W3/+
W3+/
90
90
DDK
444
RXWSXW
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 13 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Conditions: CP1 = LOW while CP0 is triggered on a LOW-to-HIGH transition and CP0 = HIGH, while CP1 is triggered on a
HIGH-to-LOW transition.
Fig 10. Waveforms showing the propagation delays for CP0, CP1 to Qn, Q5-9 outputs and the output transition
times
&3LQSXW
9,
*1'
9,
*1'
92+
92/
92+
92/
44
RXWSXW
&3LQSXW
90
90
W3/+
W3+/ W3/+
W3+/
90
W7/+ W7+/
90
DDK
444
RXWSXW
Table 8. Measurement points
Type Input Output
VMVM
74HC4017 0.5 VCC 0.5 VCC
74HCT4017 1.3 V 1.3 V
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 14 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
12. Application information
Some examples of applications for the 74HC4017; 74HCT4017 are:
Decade counter with decimal decoding
1 out of n decoding counter (when cascaded)
Sequential controller
Timer
Figure 12 shows a technique for extending the number of decoded output states for the
74HC4017; 74HCT4017. Decoded output s are sequential within each stage and from
stage to stage, with no dead time (exce pt propagation delay).
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 11. Load circuitry for measuring switching times
9
0
9
0
W
:
W
:


9
9
,
9
,
QHJDWLYH
SXOVH
SRVLWLYH
SXOVH
9
9
0
9
0


W
I
W
U
W
U
W
I
DDG
'87
9
&&
9
&&
9,92
57
5/6
&/
RSHQ
*
Table 9. Test data
Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC4017 VCC 6ns 15pF, 50 pF 1kopen GND VCC
74HCT4017 3 V 6 ns 15 pF, 50 pF 1 k open GND VCC
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 15 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
Remark: It is essential not to enable the counter on CP1 when CP0 is HIGH, or on CP0
when CP1 is LOW, as this would cause an extra count.
Figure 13 shows an example of a divi de -b y 2 thr oug h divide-by 10 circuit usin g on e
74HC4017; 74HCT4017. Since the 74HC4017 ; 74HCT4017 has an asynchronous reset,
the output pulse widths are narrow (minimum expected pulse width is 6 ns). The output
pulse widths can be enlarged by inserting an RC network at the MR input.
Fig 12. Counter expan sion
Fig 13. Divide-by 2 through divide-by 10
DDK
GHFRGHG
RXWSXWV
GHFRGHG
RXWSXWV
&3
&3
4 4 4 4
+&
+&7
+&
+&7
+&
+&7

&3
&3
4 4 4 4

&3
&3
4 4 4

05
FORFN ILUVWVWDJH ODVWVWDJHLQWHUPHGLDWHVWDJHV
05 05
GHFRGHG
RXWSXWV
4
4*1'
GLYLGHE\
GLYLGHE\
4 GLYLGHE\
4GLYLGHE\
4GLYLGHE\
4GLYLGHE\
4GLYLGHE\
4
4
4GLYLGHE\
4 GLYLGHE\
&3
&3 ILQ
IRXW
05
9&& 9&&
DDK
+&
+&7
© Nexperia B.V. 2017. All rights reserved
74HC_HCT4017 All information provided in this document is subject to legal disclaimers. .
Product data sheet Rev. 5 — 3 February 2016 16 of 23
Nexperia 74HC4017; 74HCT4017
Johnson decade counter with 10 decoded outputs
13. Package outline
Fig 14. Package outline SOT109-1 (SO16)
;
Z 0
ș
$
$

$

E
S
'
+
(
/
S
4
GHWDLO;
(
=
H
F
/
Y 0 $
$

$




\
SLQLQGH[
81,7 $
PD[ $
 $
 $
 E
S F '
 (
 
H +
( / /
S 4 =\ZY ș
5()(5(1&(6
287/,1(
9(56,21
(8523($1
352-(&7,21 ,668('$7(
,(& -('(& -(,7$
PP
LQFKHV
 


  






  




 

R
R
 
',0(16,216LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV
1RWH
3ODVWLFRUPHWDOSURWUXVLRQVRIPPLQFKPD[LPXPSHUVLGHDUHQRWLQFOXGHG


627 

( 06
 


  






 










 


  PP
VFDOH
62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627