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Data Sheet
SCR2100-D08
Single Axis Gyroscope with Digital SPI Interface
Features
• ±125°/s X-axis angular rate measurement range
• −40°C…+125°C operating range
• 3. 0V… 3.6V s uppl y voltage
• S PI digi tal i nterfac e
• E xt ensive sel f diagnost i cs feat ures
• S i ze 15.0 x 8.5 x 4.3 mm (l × w × h)
• RoHS compliant robust SOIC plastic package
suitable for lead free soldering process and SMD
mounting
• Proven capacitive 3D-MEMS technology
Applications
SCR2100-D08 i s t arget ed at appli cat i ons dem andi ng
high stability with tough environmental requirements.
Typical applications include:
• Inertial Measurement Units (IMUs) for highly
demanding environments
• Platform stabilization and control
• Motion analysis and control
• Roll over detection
• Robotic control systems
• Machine control systems
• Navigation systems
Overview
The SCR2100-D08 is a combined high performance angular rate sensor component. Angular rate sensor is
based on Murata's proven capacitive 3D-MEMS technology. Signal processing is done in mixed signal ASIC that
provides angular rate output via flexible SPI digital interface. Sensor elements and ASIC are packaged to 24 pin
premolded plastic housing that guarantees reliable operation over product's lifetime.
The SCR2100-D08 is designed, manufactured and tested for high stability, reliability and quality requirements.
The component has extremely stable output over wide range of temperature, humidity and vibration. The
component has several advanced self diagnostics features, is suitable for SMD mounting and is compatible with
RoHS and ELV directives.
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T ABL E O F CO NT ENT S
1 Introduction ....................................................................................................................................... 4
2 Specifications ................................................................................................................................... 4
2.1 General Specifica tions .................................................................................................................4
2.2 Performanc e Specifications for Gyroscope ..............................................................................5
2.3 Performanc e Specification for Temperatur e Sensor ...............................................................6
2.4 A bs olute Ma x imum Ratings ........................................................................................................6
2.5 Pin Desc ription .............................................................................................................................7
2.6 Typical performance characteristics..........................................................................................9
2.6.1 Gyro typical performance characteristics ..........................................................................9
2.7 Digital I/O Specification .............................................................................................................12
2.8 SPI AC Characteristics...............................................................................................................13
2.9 Measurement Axis a nd Directions ...........................................................................................14
2.10 Package Characteristics ........................................................................................................14
2.10.1 Package Outline Draw ing ................................................................................................14
2.11 PCB Footprint ..........................................................................................................................15
2.12 Abbreviations ..........................................................................................................................15
3 G eneral Pr oduct Descr i pt i on ...................................................................................................... 16
3.1 Factory Calibration .....................................................................................................................17
4 Compone nt O pe r at ion, Reset a nd Power Up ......................................................................... 18
4.1 Component Operation................................................................................................................18
4.2 Reset and Pow e r Up Sequence For Enabling Internal Fa ils a fe Diagnostics ......................19
5 Compone nt I nterfaci ng................................................................................................................. 20
5.1 SPI Interface ................................................................................................................................20
5.1.1 General ..................................................................................................................................20
5.1.2 Protocol.................................................................................................................................20
5.1.3 General Ins truction format..................................................................................................21
5.1.4 Operations ............................................................................................................................22
5.1.5 Return Statu s........................................................................................................................22
5.1.6 Checksum (CRC) ..................................................................................................................23
5.1.7 Recommendation for the SPI interface implementation .................................................24
6 Register Definition ......................................................................................................................... 25
6.1 Sensor Data Block ......................................................................................................................25
6.1.1 Example of Angula r Rate Data Conversion ......................................................................25
6.1.2 Example of Temperatur e Data Conversion.......................................................................25
6.2 Sensor Status Block ...................................................................................................................26
6.2.1 RATE Status 1 Register (09h) .............................................................................................27
6.2.2 RATE Status 2 Register (0Ah) ............................................................................................27
6.2.3 ACC Status Register (0Fh) ..................................................................................................28
6.2.4 Reset Control Register (16h) ..............................................................................................28
6.2.5 Serial ID0 and Serial ID1 Registers (18h a nd 1 9 h) ...........................................................29
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6.2.6 Common Status Register (1Bh) .........................................................................................30
6.2.7 Identification Register (1Dh)...............................................................................................31
6.2.8 Status Summary Regis ter (1Fh) .........................................................................................31
7 Appl i ca ti on inf or m at ion ............................................................................................................... 32
7.1 A pplic ation Circuitry and External Component Characteristics ..........................................32
7.2 A s sembly Instructions ...............................................................................................................33
8 Order informati on .......................................................................................................................... 34
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1 Introduction
This document contains essential technical information about the SCR2100-D08 sensor including
specifications, SPI interface descriptions, user accessible register details, electrical properties and
application information. This document should be used as a reference when designing in
SCR2100-D08 component.
2 Specifications
2.1 General Specifications
General specifications for SCR2100-D08 component are presented in Table 1. All analog voltages
are related to t he pot ential at A V S S and all di gi t al vol t ages are rel at ed to t he pot ential at DV S S.
Table 1. G eneral s pecificat ions.
Parameter
Condition
Min
Typ
Units
A nalog supply v oltage: AVDD
3.0
3.3
V
A nalog supply current: I_AVDD
Temperature range -40 ... +125 °C
13.9
mA
Digital supply v oltage: DVDD
3.0
3.3
V
Digital supply current: I_DVDD
Temperature range -40 ... +125 °C
3.3
mA
Boost supply current: I_L1
(c ur r ent t hr ough inductor L1, see
Figure 22)
Mean value
Peak value, T < 1µ s
M ax . v alue during startup (T≤0.4ms)
6.7
110
mA
mA
mA
T otal cur r ent, I_T OTAL
I_AVDD + I_DVDD + I_L1
23.9
mA
T otal cur r ent reset
Total av erage current during reset
mA
Rise/fall time: AVDD, DVDD,
Vin_BOOST (see Figure 22)
200 ms
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2.2 P erformance S pecifications for Gyroscop e
Table 2. G y ro perform ance speci fi cations (DVDD=AVDD=3.3V, ambient temperature and
ODR=2.3kHz unless otherwise specified).
Parameter Condition Min Typ Max Units
Operating range M easurement ax is X -125 125 °/s
O ff set ( zero r ate out put)
0
LSB
Offset error (A
-1
1
°/s
Offset temperature drift (B
-40°C ... +125°C
-0.8
0.8
°/s
Offset short term bias stability
1
°/h
A ngular random walk 0.23 º/ h
Sensitivity 50 LSB/(°/s)
Sensit ivity error (C
-40°C ... +125°C
-2.5
2.5
%
Linearity err or
(D
±0.5 °/s
Integrated noise (RM S) 60Hz f ilter 0.05 °/sRMS
Noise density
0.005
(º/s)/ Hz
Cr oss axis sensit ivit y
(E
-1.5 1.5 %
G-sensitivity
-0.1
0.1
(°/s)/g
Shoc k sensit ivit y
50g, 6ms
2.0
°/s
Shock recov ery
50
ms
A mplitude response
10Hz filter, -3dB frequency
60Hz filter, -3dB frequency
10
60
Hz
Hz
Power on start-up time
10Hz f ilter
60Hz f ilter
750
620
ms
ms
Recommended ODR
(F
2300 Hz
Min/Max values are validation ±3 sigma variation limits from test population. T ypical values are not guaranteed.
A) Includes offset calibration error and drift over lifetime.
B) Deviation from value at ambient temperature.
C) Includes calibration error, deviation from room temperature value and drift over lifetime.
D) St raight line through specified measurement range end point s .
E) Cr o ss a xi s sensitivity is the maximum sensitivity in the plane perpendicular to the measuring direction:
Cross a xi s fo r Y a xi s = S e n si ti vi ty Y / S e n si ti vi ty X
Cr o ss a xi s fo r Z axis = Sensitivity Z / Sensitivity X
F) O DR = Ou tp u t Data Ra te , se e secti on 5.1.7 for more details.
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2.3 P erformance S pecification for Temperature Sensor
Table 3. Tem perat ure s ensor performance spec i fications.
Parameter
Condition
Min.
Typ
Unit
Temperature signal range
-50
°C
Temperature signal se nsitiv ity
Temperature sensor output in 2's
complement format
14.7
LSB/°C
Temperat ure i s converted t o ° C wi t h foll owi ng equat ion:
Temperat ure [ °C] = 60 + (TEMP / 14.7),
where TEMP is temperature sensor output register content in dec imal format.
2.4 Absolute Maximum Ratings
Within the maximum ratings (Table 4), no damage to the component shall occur. Parametric values
may deviate from specification, yet no functional deviation shall occur. All analog voltages are
related t o t he potent i al at AVS S , all di gi t al vol t ages are related to DVSS .
Table 4. Abs ol ute m axi m um rat i ngs.
Parameter
Remark
Min.
Max.
Unit
AVDD
Supply volt age analog cir c uitry
-0.3
4.3
V
DVDD
Supply volt age digital cir c uitr y
-0.3
4.3
V
DIN/DOUT
M ax imum v oltage at digital input and output pins
-0.3
DVDD+0.3
V
VBoost,
LBoost
M ax imum v oltage at high v oltage input and output
pins
-0.3
40 V
Topr
Operating temperature range
-40
125
°C
Tstg
Storage temperature range
-40
150
°C
ESD_HBM
ESD according Human Body M odel (HBM ),
Q100-002
±2000
V
ESD_MM
ESD according M achine M odel (M M ),
Q100-003 ±200
V
ESD_CDM
ESD according Charged Dev ice M odel (CDM ),
Q100-011
±500
±750 (c or ner
pins)
V
US
Ultrasonic agitation (cleaning, welding, etc)
Prohibited
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2.5 Pin Description
The pinout for SCR2100-D08 is presented in Figure 1, while the pin descriptions can be found in
Table 5.
Figure 1. Pinout for SCR2100-D08.
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Table 5. SCR2100-D08 pin descriptions.
Pin#
Name
Type
Description
1, 12,
13, 24
HEAT -
Heat sink connection, connect ex ternally to A V SS
2, 11
RESERVED
-
Factory us e only, leave floating
3 EXTRESN DIN
Ex ternal Reset, 3.3V logic compatible Schmitt-trigger input with internal
pull-up, LOW-HIGH transition causes sy stem restart. M inimum low time
100us
4
SCK
DIN
CLK signal of SPI Interface
5
MISO
DOUT
Data Out of SPI Interface
6 VBOOST AOUT_HV
Ex ternal capacitor connection for high v oltage analog supply ,
high voltage pad ≈30V
7 LBOOST AIN_HV
Connection for inductor for high v oltage generation,
high voltage pad ≈30V
8
DVSS
GND
Digit al Supply Ret urn, connec t ext er nally t o AVSS
9
DVDD
SUPPLY
Digital Supply V oltage
10
D_EXTC
AOUT
External capacitor connection for digital core ( typ. 1.8V)
11
RESERVED
-
Factory us e only, leave floating
14
AVDD
SUPPLY
Analog Supply volt age
15
A_EXTC
AOUT
Ex ternal capacitor connection for positiv e reference v oltage
16
AVSS_REF
GND
A nalog reference ground, connect ex ternally to A V SS
17
AVSS
GND
Analog Supply Ret ur n, connec t ext er nally t o DVS S
18
CSB
DIN
Chip Select of SPI Interface, 3.3V logic compatible Schmitt-trigger input
19
MOSI
DIN
Dat a In of S P I I nterfac e, 3. 3V logic c ompat ible Sc hmit t -trigger input
20
RESERVED
-
Factory us e only, leave floating or connect to GND
21
RESERVED
-
Factory us e only, leave floating or connect to GND
22
RESERVED
-
Factory us e only, leave floating
23
RESERVED
-
Factory us e only, leave floating
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2.6 Typ ical p erformance charact eristics
2.6.1 Gy ro typical perform ance characteristics
Figure 2. SCR2100-D08 gyro typical out put t em perat ure dri ft i n °/s .
Figure 3. SCR2100-D08 gyro typi c al sens i tivi t y devi at i on from room temperat ure val ue i n %.
Figure 4. SCR2100-D08 gyro ty pi cal RM S noi se in °/s RMS.
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Figure 5. SCR2100-D08 gyro Al l an devi at i on i n °/h.
Figure 6. SCR2100-D08 gyro typi c al cros s a xis se nsitivity in %.
Figure 7. SCR2100-D08 gy ro typi c al G -s ensi tivi t y in (°/s )/ g.
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Figure 8. SCR2100-D08 gyro amplitude and phase response with 60Hz filter setting.
Figure 9. SCR2100-D08 gyro amplitude and phase response with 10Hz filter setting.
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2.7 Dig ita l I/O Sp e c ific a tio n
Table 6 describes the DC characteristics of SCR2100-D08 sensor SPI I/O pins. Supply voltage is
3. 3 V unl ess otherwise speci fied. Current flowi ng i nto the c i rcui t has a positive val ue.
Table 6. SPI DC characteristics.
Symbol
Description
Min.
Nom.
Max.
Unit
Serial Cl ock SCL K
VinHigh
Input high v oltage
2
DVDD+0.3
V
VinLow
Input low v oltage
-0.3
0.8
V
Vhy
I nput hysteresis
0.3
V
Ileak
Input leakage current, 0V ≤ Vin ≤ DVDD
-1
1
uA
Cin
I nput capac itance
15
pF
Chip select CSB (Pull Up), low active
VinHigh
Input high v oltage
2
DVDD+0.3
V
VinLow
Input low v oltage
-0.3
0.8
V
Vhy
I nput hysteresis
0.3
V
Isource
Input current source (Pull Up), V in = 0V
10
50
uA
Cin
I nput capac itance
15
pF
Vin_open
O pen c ir c uit out put volt age
2
V
Serial data input MOSI (Pull D own)
VinHigh
Input high v oltage
2
DVDD+0.3
V
VinLow
Input low v oltage
-0.3
0.8
V
Vhy
I nput hysteresis
0.3
V
Isource
Input current source (Pull Up), V in = DV DD
10
50
uA
Cin
I nput capac itance
15
pF
Vin_open
O pen c ir c uit out put volt age
0.3
V
Serial d ata o u tp u t MISO (Tri st at e)
VoutHigh_-1mA
O utput high volt age, I out = -1mA
DVDD-0.5
V
VoutHigh_-50µA
O utput high volt age, I out = -50µA
DVDD-0.2
V
VinHigh_1mA
O utput low volt age, Iout = + 1mA
0.5
V
VinHigh_50µA
O utput low volt age, Iout = + 50µ A
0.3
V
Iout_Hz
High impedance output current,
0V < VM I S O < DVDD
-1
1
uA
Cld_miso
Capacitiv e load. The slope of the M ISO
output signal may need to be controlled to
meet EM I requiremen ts under speci fied load
conditions.
200
pF
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2.8 SPI A C Charact er i st i cs
The AC charac t eri st i cs of SCR2100-D08 are defined in Figure 10 and Table 7.
Figure 10. Ti m i ng di agram of S PI c om m uni cat i on.
Table 7. SPI AC electrical characteristics.
Symbol
Description
Min.
Nom.
Max.
Unit
FSPI
It is recommended to use max imum SCK frequency ,
see section 5.1.7 for more details.
0.1 8 MHz
TSPI
1/FSPI
TCH
High time: duration of logical high level at S CLK
45
TSPI/2
ns
T
CL
Low time: duration of logical low lev el at SCLK
45
T
SPI
/2
ns
TLS1
Setup time CSB: time between the falling edge of
CSB and the rising edge of SCLK
45 TSPI/2 ns
TVAL1
Delay t ime: t ime delay f r om t he falling edge of CSB
to dat a valid at MI S O
30 ns
TSET
Setup time at M OSI: setup time of M OSI before the
rising edge of SCLK
15 ns
THOL
MOSI data hold time
8
ns
TVAL2
Delay t ime: t ime delay f r om f alling edge of S CLK to
dat a valid at MI S O
30 ns
TLS2
Hold time of CSB: time between the falling edge of
SCLK and the rising edge of CSB
45 TSPI/2 ns
TLZ
Tri-state delay time: time between the rising edge of
CSB t o MISO in Tri-state
15 ns
TLH
Time between SPI cy cles: minimum high time of
CSB between two consecutiv e transfers
250 ns
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2.9 Measurement Axis and D irections
Figure 11. SCR2100-D08 measurement directions.
2.10 Package Characteristics
2.10.1 Package Outline Drawing
Figure 12. Package outline. The tolerances are ac cording to ISO2768-f (see Table 8).
Table 8. Limits for linear measures (ISO2768-f).
Tolerance
class
Li m its i n m m for nom i nal size in mm
0. 5 to 3
Above 3 t o 6
Above 6 t o 30
Above 30 t o 120
f (fin e )
±0.05
±0.05
±0.1
±0.15
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2.11 PCB Footprint
Figure 13. Recomm ended P WB pad l ayout for SCR2100-D08. The tolerances are according to
ISO2768-f (see Table 8).
2.12 Abbreviations
ASIC Application Spec i fic Int egrat ed Ci rc ui t
SPI Serial Peripheral Interface
RT Room Temperature
DPS Degrees per second
FS Full sc ale
CSB Chip Select
SCK Serial Cloc k
MOSI Mast er Out Sl ave In
MISO M ast er In Slave Out
MCU Microcontroller
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3 G eneral Pr oduct Descr i ption
The SCR2100-D08 sensor consists of angular rate sensing element and Application-Specific
Integrated Circuit (ASIC) used to sense and control the element. SCR2100-D08 utilizes the same
ASIC as Murata's other high performance gyro accelerometer combo products (SCC2000 series).
With SCR2100-D08 the ASIC's the accelerometer functionality is powered down. Figure 14
contains an upper level block diagram of the component. The ASIC provides SPI interface used to
control and read the gyroscope.
Figure 14. SCR2100-D08 c om ponent bl ock di agram .
The angular rate sensing element is manufactured using Murata proprietary High Aspect Ratio
(HAR) 3D-MEMS proces s, which enables making robust, extremely stable and low noise capacitive
sensors.
The angular rate sensing element consists of moving masses that are purposely exited to in-plane
drive motion. Rotation in sensitive direction causes out of plane movement that can be measured
as capac i tanc e change wit h the s i gnal conditi oni ng AS IC.
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3.1 Factor y Cal i br at i on
SCR2100-D08 sensors are factory calibrated. No separate calibration is required in the application.
Parameters that are trimmed during production include sensitivities, offsets and frequency
responses. Calibration parameters are stored to non-volatile memory during manufacturing. The
parameters are read automatically from the internal non-vol at i l e m em ory duri ng the st art-up.
It should be noted that assembly can cause minor offset/bias errors to the sensor output. If best
possible offset/bias accuracy is required, system level offset/bias calibration (zeroing) after
assem bly i s recom m ended.
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4 Component Operation, Reset and Power Up
4.1 Component Operation
Simplified sensor power up sequence is shown in Figure 15 below. The SCR2100-D08 component
has internal power-on reset circuit. It releases the internal reset-signal once the power supplies are
within the specified range. After the reset, the sensor performs an internal startup sequence.
During the startup sequence SCR2100-D08 reads configuration and calibration data from the non-
volatile memory to volatile registers. 620ms after the power on or reset, sensor shall be able to
provide valid angular rate data, separat e m easurem ent m ode activat i on i s not needed.
Figure 15. Simplified reset and power up sequence.
Sensor uses 60Hz low pass filter setting by default. In case the optional 10Hz low pass filter is
used the filter setting can be set by writing the FLT bits to 01b in Status Summary register. See
section 6.2.8 for more information on Status Summary register. Section 5.1.4 shows full SPI write
frames for filter settings
SCR2100-D08 component has extensive internal failsafe diagnostics to detect over range and
possible internal failures. If the internal failsafe diagnostics are used they should be enabled by
clearing the status registers during component power up by following the sequence shown in
section 4.2 (Figure 16).
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4.2 Reset and Power Up Sequence For Enabling I nt ernal Fai l saf e Di agnost i cs
Reset and power up sequence for enabling component internal failsafe diagnostics is shown below
in Figure 16. After the reset, the sensor performs an internal startup sequence. 20 ms after the
reset the SPI bus becomes accessible and the output filter can be set to a desired val ue. If t he fil ter
is not set to a valid value (60Hz or 10Hz setting), the default setting (00b = 60Hz) is used and the
S_OK_C flag in Status Summary Register will indicate a failure. In 750ms (10Hz filter setting) or in
620ms (60Hz filter selection) the gyro s hal l be abl e t o del i ver val id dat a.
During the startup sequence the sensor performs a series of internal tests that will set various error
fl ags i n the s ensor st atus regi s ters and to clear them i t i s nec essary t o read al l s tat us regist ers aft er
t he st art up sequence i s c om pl ete.
Once startup sequence is completed, the normal operation is indicated with Status Summary
register content of 0041h. In case of failure Common Status register is read, then sensor should be
reset and re-started. In case the LOOPF_OK bit in Common Status register is failing, the sensor
should be reset and re-started. After start up, in normal operation, when only RATE and TEMP
registers are read, RS bits will indicate possible signal saturation and failure conditions normally. In
case acceleration registers are read, RS bits will indicate a failure due to disabled acceleration
functionality.
Figure 16. Res et and power up sequence.
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5 Component Interfacing
5.1 SPI I nt erf ace
5.1.1 General
The SCR2100-D08 has one SPI interface for the angular rate sensor. SPI communication transfers
data between the SPI master and registers of the SCR2100-D08 ASIC. The SCR2100-D08 always
operat es as a slave devi ce i n m ast er-slave operation mode. 3-wire SPI connection cannot be used.
SP I i nterfa ce pi ns:
CSB Chip Sel ect (active l ow) MCU → ASIC
SCK Serial Clock MCU → ASIC
MOSI M aster Out S l ave In MCU → ASIC
MISO M aster In S l ave Out ASIC → MCU
5.1.2 Protocol
S PI c om m uni cat i on uses off-fram e prot ocol so eac h trans fer has t wo phases.
The first phase contains the SPI command (Request) and the data (Response) of the previous
command. The second phase contains the next Request and the Response to the Request of the
fi rs t phas e, s ee Figure 17.
Data word length is 32 bits, the data is transferred MSB first. The first response after reset is
undefined and shall be discarded.
Dat a word l ength is 32 bits . E ac h trans fer has t wo phases ().
1. F i rs t phas e cont ai ns the c om m and and t he data of t he previous command
2. Second phase contains the data from the command of the first phase.
The first res ponse after reset i s undefined and shal l be di sc arded.
Figure 17. SP I prot ocol exam pl e.
The interleaved Request - Response cycle t hen cont i nues as shown i n Figure 18.
Figure 18. Request – Response frame relationship.
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The SPI transmission is always started with the CSB falling edge and terminated with the CSB
rising edge. The data is captured on the SCK's rising edge (MOSI line) and it is propagated on the
SCK’s falling edge (MISO line). This equals to SPI Mode 0 (CPOL = 0 and CPHA = 0), see Figure
19.
Figure 19. SP I F rame F orm at.
5.1.3 General Instruction form at
The SP I fram e is divi ded i nto four parts (S ee Figure 20 and Table 9):
1. Operation Code (OP)
2. Return status (RS, in MISO )
3. Data (DI, DO)
4. Checks um (CRC)
Unus ed bi ts shall be set to 0, t hi s i s im portant for t he chec ksum cal c ul ation.
Figure 20. SP I i nstruc ti on format.
Table 9. SPI bit defini tions.
Bits
Name
MOSI
MISO
OP[5:0]
Operation code
Requested operation:
• OP5: Write =1 / Read = 0
• OP[4:0] = Register address
Performed operation:
• OP 5 : Wri te = 1 / Read = 0
• OP[4:0] = Register address
RS[1:0]
Return status
n.a.
Sensor status
D[15:0]
Data
Dat a to be writt en
Return data
CR[7:0]
Checksum
Checksum of MOSI bits [31:8]
Checksum of MISO bits [31:8]
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5.1.4 Operations
Table 10. Operations and their equivalent SPI frames.
Operation
Register
S PI Fram e
B inary (O P , RS, Data, CRC)
S PI Fram e
Hex
Read RATE
RAT E (01h)
000001 00 0000000000000000 11110111
040000F7h
Read TEMP
TEMP (07h)
000111 00 0000000000000000 11100011
1C0000E3h
Read RATE Status 1
RATE Stat us 1
(09h)
001001 00 0000000000000000 11000111
240000C7h
Read RATE Status 2
RATE Stat us 2
(0Ah)
001010 00 0000000000000000 11001101
280000CDh
Read A CC Status
A CC Status (15h)
001111 00 0000000000000000 11010011
3C0000D3h
Write Reset Control
HardReset
Reset Control (16h)
110110 00 0000000000000100 00110001
D8000431h
Write Reset Control
MonitorST
Reset Control (16h)
110110 00 0000000000001000 10101101
D80008ADh
Read Serial ID0
Serial ID0 (18h)
011000 00 0000000000000000 10100001
600000A1h
Read Serial ID1
Serial ID0 (19h)
011001 00 0000000000000000 10100111
640000A7h
Read Common
Status
Common Status
(1Bh)
011011 00 0000000000000000 10101011
6C0000ABh
Read Status
Summary
Status Summary
(1Fh)
011111 00 0000000000000000 10110011
7C0000B3h
Write Flt[1:0] =10b:
set 60Hz f ilter ac tive
Status Summary
(1Fh)
111111 00 0010000000000000 00000110
FC200006h
Write Flt[1:0] =01b:
set 10Hz f ilter ac tive
Status Summary
(1Fh)
111111 00 0001000000000000 11000111
FC1000C7h
5.1.5 Return Status
SPI frame Return Status bits (RS bits) indicate the functional status of the sensor, see Return
Status definitions in Table 11.
Table 11. Return St atus definitions.
RS[1]
Description
0
Initializ ation running
0
Normal operation of selected channel
1
Selftest of selected channel
1
Reserv ed or not ex isting register addressed , error of selected channel or common failure
(see Status Summary Register bits S_OK_C, S_OK_R, S_OK_A )
• S_OK_C is t he summar y of Common Stat us
• S_OK_R is the summary of RATE S tatus 1 and RATE Status 2
•
S_OK_A is the summary of ACC Status
The pri ori t y of t he return st atus s tat es is from hi gh to low: 10 → 00 → 11 → 01.
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5.1.6 Checksum (CRC)
For SPI transmission error detection a Cyclic Redundancy Check (CRC) is implemented, for details
see Table 12.
Table 12. SPI CRC definition.
Parameter
Value
Name
CRC-8
Width
8 bit
Poly
1Dh (generator poly nom: X 8+X 4+X 3+X 2+1)
Init
FFh (initializ ation v alue)
XOR out
FFh (inv ersion of CRC result)
The CRC register has to be initialized with FFh to ensure a CRC failure in case of stuck-at-0 and
stuck-at-1 error on the SPI bus. C-programming language example for CRC calculation is
presented in Figure 21. It can be us ed as is in an appropri at e program m i ng c ontext.
// Calculate CRC for 24 MSB's of the 32 bit dword
// (8 LSB's are the CRC field and are not included in CRC calculation)
uint8_t CalculateCRC(uint32_t Data)
{
uint8_t BitIndex;
uint8_t BitValue;
uint8_t CRC;
CRC = 0xFF;
for (BitIndex = 31; BitIndex > 7; BitIndex--)
{
BitValue = (uint8_t)((Data >> BitIndex) & 0x01);
CRC = CRC8(BitValue, CRC);
}
CRC = (uint8_t)~CRC;
return CRC;
}
static uint8_t CRC8(uint8_t BitValue, uint8_t CRC)
{
uint8_t Temp;
Temp = (uint8_t)(CRC & 0x80);
if (BitValue == 0x01)
{
Temp ^= 0x80;
}
CRC <<= 1;
if (Temp > 0)
{
CRC ^= 0x1D;
}
return CRC;
}
Figure 21. C-programming language example for CRC calculation.
CRC calculation example:
Read RATE register (01h) -> SP I[ 31:8] = 040000h -> CRC [ 7 :0 ] -> F 7h.
Further exampl es c an be found i n Table 10.
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5.1.7 Recommendation for the SPI interfac e implementation
SPI communication may interfere with the measured angular rate signal due to sensor internal
capacitive coupling. If the harmonic overtones of the SPI communication activity are close to gyro
operational frequency, the SPI cross talk can be seen as increased noise level in angular rate
signal.
Cross talk can be eliminated by choosing the output data rate (sample rate) in a suitable way, i.e.
avoiding the overtones on the gyro operation frequency. For optimum performance it is
recommended that 2.3kHz or 3.2kHz output data rate is used with maximum serial clock (SCK)
frequency (8MHz). The design performance should be verified carefully.
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6 Re g is te r De finitio n
6.1 Sensor Data Bl ock
Table 13. Sensor data block.
Addr
OP[4:0]
Bits Register Name
No. of
Bits
Read/
Write
Description
01h
RATE
16
R
Rate output in 2's complement format
07h [15:0] TEMP 16 R
Temperature sensor output in 2's complemen t
format. See section 2.3 for temperature conv ersion
example.
SPI read frames with CRC content for these registers are shown in Table 10.
6.1.1 Exa mple of Angular Rate Data Conversion
For example, if RATE register read results: RATE = 05FFE08Bh, the register content is converted
t o angul ar rat e as fol l ows :
• 05h = 000001 01b
o 000001b = operation code = Read RATE
o 01b = return st atus (RS bi ts ) = no error
• FFE0h = 1111 1111 1110 0000b = RATE register content
o FF E0h i n 2's com pl em ent format = -32d
o A ngul ar rat e = -32LS B / s ensitivi t y = -32LSB / (50LSB/(°/s)) = -0.64°/s
• 8Bh = CRC of 05FFE0h
6.1.2 Exam ple of Tem perature Data Conversion
For example, if TEMP register read results: TEMP = 1DFE6F4Eh, the register content is converted
t o temperature as fol l ows :
• 1Dh = bi n 000111 01b
o bin 000111b = operation code = Read TEMP
o 01 = return st atus (RS bi ts ) = no error
• FE6Fh = bin 1111 1110 0110 1111 = TEMP register content
o FE6Fh i n 2's compl em ent format = -401d
o Temperature = 60 + ( TEMP / 14.7) = 60 + [ -401/ 14. 7] = +32.7°C
o See section 2.3 for temperature conversion equation
• 4Eh = CRC of 1DFE6Fh
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6.2 Sensor St at us Bl ock
Table 14. S ens or st atus bl oc k.
Addr
OP[4:0]
Bits Register Name
No. of
Bits
Read/
Write
Description
09h
RA TE Status 1
16
R
G yr o sensor status
0Ah
R ATE S ta tu s 2
16
R
G yr o sensor status
0Fh [15:0] AC C S ta tu s 16 R
Accelerometer status
Note: accelerometer functionali ty is powered down,
This register is read during sensor power up
sequence, see more details in section 4.
15h
Test
16
R/W
R/W register for SPI communication checking
16h
Reset Control
16
R/W
Reset status and trigger bits
18h
Serial ID0
16
R
Component seria l numb er least significant bits
19h
Serial ID1
16
R
Component seria l number most significa nt bits
1Bh
Common Status
16
R
Status of common blocks
1Dh
Identification
16
R
Product type Identification
1Fh
Status Summary
16
R/W
Status overview
Note:
R/W for the register means, that the content of the register can be read, and that it is also possible
to over write the content of the register in normal mode operation. The following signal blocks will
then operate with the value written to the register. After a write cycle to the register, the register will
keep its val ue unt i l another wri t e cy cle or reset occurs .
S PI read and write frames with CRC c ontent for these regist ers are shown i n Table 10.
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6.2.1 RATE Statu s 1 Register (09h)
Table 15. RAT E Status 1 register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
Write
VCMF_OK
Vboost_OK
Reserved[7:0]
SDM_D_OK
dQ_Amp_OK
dDR_Amp_OK
Q_AmpCtrl_OK
DR_AmpCtrl_OK
OF_R_OK
Read
RATE Status 1 register indicates saturation or failure in gyroscope. Failure is indicated by setting
OK flag to 0, t he condi t i on wi ll be l atc hed unti l a read cycl e on the register.
Table 16. RATE Status 1 regist er bi t desc ri pti on.
Register Bit
Description
OF_R_OK
This bit indicates signal path saturation and ov erflow conditions
DR_AmpCtrl_OK
Status o f d riv e amplitude control
Q_AmpCtrl_OK
Status of c ompensation signal ampli tude control
dDR_Amp_OK
Status of dr ive amplit ude
dQ_Amp_OK
Status of c ompensation signal amplitude
SDM_D_OK
St atus of drive pat h st ability
VBoost_OK
Status of VBoost volt age
VCMF_OK
Status of bias ing voltage
6.2.2 RATE Statu s 2 Register (0Ah)
Table 17. RA TE St at us 2 regi s ter.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
Write
Reserved[6:0]
S_P_Pk_OK
S_N_OK
S_P_OK
D_N_OK
D_P_OK
SI_N_OK
SI_P_OK
DI_N_OK
DI_P_OK
Read
RATE Status 2 register indicates saturation or failure in gyroscope. Failure is indicated by setting
OK flag to 0, t he condi t i on wi ll be l atc hed unti l a read cy cle on the regi st er.
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Table 18. RA TE St at us 2 regi s ter bi t des cripti on.
Register Bit
Description
DI_P_OK
Indicates saturation or failure condition
DI_N_OK
Indicates saturation or failure condition
SI_P_OK
Indicates saturation or failure condition
SI_N_OK
Indicates saturation or failure condition
D_P_OK
Indicates saturation or failure condition
D_N_OK
Indicates saturation or failure condition
S_P_OK
Indicates saturation or failure condition
S_N_OK
Indicates saturation or failure condition
S_P_Pk_OK
Indicates saturation or failure condition
6.2.3 ACC Status Register (0Fh)
ACC Status register indicates accelerometer related failures since the accelerometer functionality
i s powered down in SCR2100-D08.
6.2.4 Reset Control Register (16h)
Table 19. Reset Control register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
Reserved[11:0]
MonitorST
HardReset
Reserved[1:0]
Write
-
-
Read
Table 20. Reset Control register bit description.
Register Bit
Description
HardReset
Writing this bit t o 1 generates an EX TRESN compatible signal. Thus it is
possibl e to generate hardware reset v ia SPI interface
MonitorST
Writing this bit t o 1 initiates self test of internal monitoring circuit
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6.2.5 Serial ID0 a nd Serial ID1 Registers (18h and 19h)
SCR2100-D08 serial number is laser marked on top of component lid and stored in to Serial ID0
and Serial ID1 registers. Serial number is in 32bit unsigned integer format. Serial number register
bit descriptions are shown below in Table 21 and Table 22.
Table 21. Serial ID0 (18h) register (serial number LSB word).
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
ID0[15:0] Read
Table 22. Serial ID1 (19h) register (serial number MSB word).
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
ID1[15:0] Read
Example serial number conversion shown below:
• Serial ID0 register content: 8612h = bin 1000 0110 0001 0010
• Serial ID1 register content: 8FB9h = bin 1000 0110 0001 0010
• Full serial number: 8FB9 8612h = 2411300370
• S eri al num ber laser m ark ed on l i d is 2411300370SCC
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6.2.6 Common Status Register (1Bh)
Table 23. Com m on Stat us regist er.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
NMode_OK
MonCheck_OK
CRC_OTP_OK
CRC_SPI_OK
OF_C_OK
StateMon[3:0]
LOOPF_OK
TEMP_Mon_OK
VBG2_0P9V_OK
Reserved
VDDD_OK
VBG1_0P9V_OK
DVDD_OK
Read
Common Status register indicates failure in common signals/blocks. Failure is indicated by setting
OK flag to 0, the c ondi tion wi ll be l atc hed unti l a read cycl e on the regist er.
Table 24. Com m on Stat us regist er bit des cripti on.
Register Bit
Description
DVDD_OK
Status of DV DD digital 3.3V supply v oltage
VBG1_0P9V_OK
Status of internal reference voltage
VDDD_OK
Status o f d igital core supply v oltage
VBG2_0P9V_OK
Status of internal reference voltage
TEMP_Mon_OK
Status of temperature sensor signal
LOOPF_OK
Status of loop filter
StateMon[3:0]
Status of state machine for self test of monitoring circuit.
OF_C_OK
This bit indicates signal path saturation and ov erflow conditions related
to common signals/blocks
CRC_SPI_OK
This bit indicates CRC failure in SPI com m unication
CRC_OTP_OK
This bit indicates CRC failure in OTP memory
MonCheck_OK
Result of the monitoring circuit self test
NMode_OK
Bit = 0 : ASIC test mode activ ated
Bit = 1 : ASIC is in normal mode
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6.2.7 Identification Register (1Dh)
Table 25. Identification register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Write
Identification[15:0] Read
Table 26. Ident ificat i on regist er bi t descri pti on.
Register Bit
Description
Identification
Default v alue: 0500h (bin 0000 0101 0000 0000) for S CR2100-D08
6.2.8 Sta tu s Su mma ry Register (1Fh)
Table 27. S tat us S um m ary register.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
- -
Flt[1:0]
- - - - - - Write
STC_EN
SelfTestDis
Reserved[5:0]
S_OK_C
Reserved[1:0]
S_OK_A
Reserved[1:0]
S_OK_R
Read
Table 28. Identi ficat i on regist er bi t desc ri pti on.
Register Bit
Description
S_OK_R
Sensor status summary flag for gyro
S_OK_A
Sensor status summary flag for accelerometer
Note: since accelerometer functionality is powered down, S_OK_A flag
shows always error (S_OK_A='0')
S_OK_C
Status summary flag for common blocks and functionali ties
Flt[1:0]
O utput Filt er S elec tion:
00b: 60Hz f ilter ac tive f or GYRO signal (default after reset),
with Flt default setting S_OK_C is set to 0
01b: 10Hz f ilter ac tive f or GYRO signals
10b: 60Hz f ilter ac tive f or GYRO signal
11b: Reserved
SelfTestDis
SelfTestDis=‘1’ indicates that the self test of the monitoring circuit is
disabled.
STC_EN
STC_EN=‘1’ indicates that the accelerometer self test is enabled.
Note: since accelerometer functionality is powered down, STC_EN='0',
(not functional).
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7 Application information
7.1 A ppl i cat i on Ci rcui t r y and Exter nal Component Charact eristi cs
See Figure 22 and Table 29 for specification of the external components. The PCB layout example
i s shown in Figure 23.
Figure 22. Application schematic.
Table 29. External component description for SCR2100-D08.
Symbol
Description
Unit
C1
High v oltage capacitor.
Voltage rating
ESR
Rec ommended c omponent:
Murata G CM21BR71H474KA55, 0805, 470N, 50V, X7R
30
100
nF
V
mΩ
C2
Decoupling capacitor between DV DD and DV SS
ESR
Rec ommended c omponent:
Murata G CM21BR71C105KA58, 0805, 1U, 16V, X7R
100
nF
mΩ
C3
Decoupling capacitor between D_EX TC and DV SS
ESR
Rec ommended c omponent:
Murata GCM21BR71C105KA58, 0805, 1U, 16V, X7R
100
nF
mΩ
C4
Decoupling capacitor between A V DD and A V SS
ESR
Rec ommended c omponent:
Murata G CM188R71C104KA37, 0603, 100N, 16V, X7R
100
nF
mΩ
C5
Decoupling capacitor between A _EX TC and AVSS
ESR
Rec ommended c omponent:
Murata G CM21BR71C105KA58, 0805, 1U, 16V, X7R
100
nF
mΩ
C6, C7
Optional decoupling capacitor
ESR
Rec ommended c omponent:
Murata GRM32ER71A476KE15L, 1210, 47U, 10V, X7R
100
µF
mΩ
L1
Inductance for high v oltage generation from V in_Boost
ESR
Rec ommended c omponent:
Bourns C M 322522-470KL
5
µH
Ω
(Vin_Boost)
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Figure 23. Appli cat i on P CB l ayout .
General circuit diagram and PCB layout recommendations for SCR2100-D08 (refer to Figure 22
and Figure 23):
1. Connec t dec oupl i ng S M D capacitors (C1 - C5) right next to res pective component pins.
2. Locate ground plate under component.
3. Do not route signals or power supplies under the component on top layer.
4. Minimize the trace length between the L1 inductor and LBOOST pin (pin 7).
5. E nsure good ground connect i on of DVSS, A VSS _RE F and A V SS pins (pins 8, 15, 16).
6. For optimum performance the use of decoupling capacitors C6 and C7 is recommended.
Capac i tor C6 shoul d be l ocat ed close t o C2 and C7 cl os e to C4.
7.2 Assembly Instructio ns
Usage of PCB coating materials may effect component performance. The coating material and
coating process used should be validated. For additional assembly related details please refer to
“Technical Note 96” for assembly instructions:
TN96_Assembly_Instructions_for_SCC2000_Series
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8 Orde r info rmatio n
Table 30. SCR2100-D08 order codes wi t h pack i ng quantity .
O rder code
Description
Qty
SCR2100-D08-004
Gyro (X-ax is ±125dps) with digital SPI i/f
4pcs
SCR2100-D08-05
Gyro (X-ax is ±125dps) with digital SPI i/f
50pcs
SCR2100-D08-6
Gyro (X-ax is ±125dps) with digital SPI i/f
600pcs