HCPL-576x*
5962-8947701
AC/DC to Logic Interface Hermetically Sealed Optocouplers
Data Sheet
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Features
• Dual marked with device part number and DSCC stan-
dard microcircuit drawing
• Manufactured and tested on a MIL-PRF-38534 certied
line
• QML-38534, class H and K
• Hermetically sealed 8-pin dual in-line packages
• Performance guaranteed over -55° C to +125° C
• AC or DC input
• Programmable sense voltage
• Hysteresis
• HCPL-3700 operating compatibility
• Logic compatible output
• 1500 Vdc withstand test voltage
• Thresholds guaranteed over temperature
• Thresholds independent of LED characteristics
Applications
• Military and space
• High reliability systems
• Transportation, medical, and life critical systems
• Limit switch sensing
• Low voltage detector
• AC/DC voltage sensing
• Relay contact monitor
• Relay coil voltage monitor
• Current sensing
• Microprocessor interface
• Telephone ring detection
• Harsh industrial environments
Schematic
The connection of a 0.1 µF bypass capacitor between pins 8 and 5 is recommended.
Description
These devices are single channel, hermetically sealed,
voltage/current threshold detec tion optocouplers. The
products are capable of operation and storage over the
full military temperature range and can be purchased as
either standard product, or with full MIL-PRF-38534 Class
Level H or K testing, or from the DSCC Standard Micro-
circuit Drawing (SMD) 5962-89477. All devices are manu-
factured and tested on a MIL-PRF-38534 certied line and
are included in the DSCC Qualied Manufac tur ers List,
QML-38534 for Hybrid Microcircuits.
*See matrix for available extensions
TRUTH TABLE
Input Output
H (VTH+ < Vdc) (on) L
L (Vdc < VTH–) (o ) H
2
Each unit contains a light emit ting diode (LED), a threshold
sensing input buer IC, and a high gain photon detector
to provide an optocoupler which permits adjustable
external threshold levels. The input buer circuit has a
nominal turn on threshold of 2.5 mA (ITH+) and 3.6 volts
(VTH+). The addition of one or more external attenuation
resistors permits the use of this device over a wide range
of input voltages and currents. Threshold sensing prior to
the LED and detector elements minimizes eects of any
variation in optical coupling. Hysteresis is also provided in
the buer for extra noise immunity and switching stability.
The buer circuit is designed with internal clamping
diodes to pro tect the circuitry and LED from a wide range
of over-voltage and over-current transients while the
diode bridge enables easy use with AC voltage input.
These units combine several unique functions in a single
package, providing the user with an ideal component
for computer input boards and other applica tions where
a predetermined input threshold optocoupler level is
desirable.
The high gain output stage features an open collector
output providing both TTL compatible saturation voltages
and CMOS compatible breakdown voltages.
This is an eight pin DIP which may be purchased with a
variety of lead bend and plating options. See Selection
Guide Table for details. Standard Microcircuit Drawing
(SMD) parts are available for each lead style.
Selection Guide – Package Styles and Lead Conguration Options
Avago Part # and Options
Commercial HCPL-5760
MIL-PRF-38534 Class H HCPL-5761
MIL-PRF-38534 Class K HCPL-576K
Standard Lead Finish Gold
Solder Dipped Option #200
Butt Joint/Gold Plate Option #100
Gull Wing/Soldered Option #300
Crew Cut/Gold Plate Option #600
Class H SMD Part #
Prescript for all below 5962-
Either Gold or Soldered 8947701PX
Gold Plate 8947701PC
Solder Dipped 8947701PA
Butt Joint/Gold Plate 8947701YC
Butt Joint/Soldered 8947701YA
Gull Wing/Soldered 8947701XA
Crew Cut/Gold Plate Available
Crew Cut/Soldered Available
Class K SMD Part #
Prescript for all below 5962-
Either Gold or Soldered 8947702KPX
Gold Plate 8947702KPC
Solder Dipped 8947702KPA
Butt Joint/Gold Plate 8947702KYC
Butt Joint/Soldered 8947702KYA
Gull Wing/Soldered 8947702KXA
Crew Cut/Gold Plate Available
Crew Cut/Soldered Available
3
Outline Drawing
8 Pin DIP Through Hole
Device Marking
Absolute Maximum Ratings
Parameter Symbol Min. Max. Units Notes
Storage Temperature Range TS-65 +150 °C
Operating Temperature TA-55 +125 °C
Lead Solder Temperature 260 for 10 sec °C 2
Average Input Current IIN 15 mA 3
Surge Input Current IIN,SG 140 mA 3, 4
Peak Transient Input Current IIN,PK 500 mA 3, 4
Input Power Dissipation PIN 195 mW 5
Total Package Power Dissipation Pd260 mW
Output Power Dissipation PO65 mW
Average Output Current IO40 mA
Supply Voltage (Pins 8-5) VCC -0.5 20 V min.
Output Voltage (Pins 6-5) VO-0.5 20 V min.
ESD Classication
MIL-STD-883, Method 3015 (∆∆), Class 2
Recommended Operating Conditions
Parameter Symbol Min. Max. Units
Power Supply VCC 3.0 18 V
Operating Frequency [1] f 0 10 KHz
0.51 (0.020)
MIN.
9.40 (0.370)
9.91 (0.390)
7.16 (0.282)
7.57 (0.298)
7.36 (0.290)
7.87 (0.310)
2.29 (0.090)
2.79 (0.110)
0.20 (0.008)
0.33 (0.013)
8.13 (0.320)
MAX.
4.32 (0.170)
MAX.
3.81 (0.150)
MIN.
0.76 (0.030)
1.27 (0.050)
Note: Dimensions in millimeters (inches).
0.51 (0.020)
MAX.
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
COUNTRY OF MFR.
Agilent FSCN*
Agilent DESIGNATOR
DSCC SMD*
PIN ONE/
ESD IDENT
Agilent P/N
DSCC SMD*
* QUALIFIED PARTS ONLY
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
50434
4
Hermetic Optocoupler Options
Option Description
100 Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is available on
commercial and hi-rel product.
7.36 (0.290)
7.87 (0.310)
4.32 (0.170)
MAX.
0.51 (0.020)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
0.20 (0.008)
0.33 (0.013)
1.14 (0.045)
1.40 (0.055)
200 Lead nish is solder dipped rather than gold plated. This option is available on commercial and hi-rel product.
DSCC Drawing part numbers contain provisions for lead nish.
300 Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This option is available on
commercial and hi-rel product. This option has solder dipped leads.
5° MAX.
4.57 (0.180)
MAX.
4.57 (0.180)
MAX.
0.51 (0.020)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
0.20 (0.008)
0.33 (0.013)
9.65 (0.380)
9.91 (0.390)
1.40 (0.055)
1.65 (0.065)
600 Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option is available on
commercial and hi-rel product. Contact factory for the availability of this option on DSCC part types.
3.81 (0.150)
MAX.
1.02 (0.040)
TYP.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
Note: Dimensions in millimeters (inches).
5
Electrical Characteristics TA = -55° C to 125° C, unless otherwise specied. See note 16.
Parameter Symbol Conditions
Group A
Subgroup Min. Typ.* Max. Units Fig. Note
Input Threshold Current ITH+ VIN = VTH+; VCC = 4.5 V;
VO = 0.4 V; IO ≥ 2.6 mA
1, 2, 3 1.75 2.5 3.20 mA 1, 2 7
ITH- VIN = VTH-; VCC = 4.5 V;
VO = 2.4 V; IOH ≤ 250 µA
1, 2, 3 0.93 1.3 1.62 mA
Input Threshold
Voltage
DC
(Pins 2, 3)
VTH+ VIN = V2 – V3;
Pins 1 & 4 Open
VCC = 4.5 V; VO = 0.4 V;
IO ≥ 2.6 mA
1, 2, 3 3.18 3.6 4.10 V
VTH- VIN = V2 – V3;
Pins 1 & 4 Open
VCC = 4.5 V; VO = 2.4 V;
IO ≤ 250 µA
1, 2, 3 1.90 2.5 3.00 V
AC
(Pins 1, 4)
VTH+ VIN = |V1 – V4|;
Pins 2 & 3 Open
VCC = 4.5 V; VO = 0.4 V;
IO ≥ 2.6 mA
1, 2, 3 3.79 5.0 5.62 V 7, 8
VTH- VIN = |V1 – V4|;
Pins 2 & 3 Open
VCC = 4.5 V; VO = 2.4 V;
IO ≤ 250 µA
1, 2, 3 2.57 3.7 4.52 V
Input Clamp Voltage VIHC1 VIHC1 = V2 - V3;
V3 = GND;
IIN = 10 mA; Pin 1 & 4
Connected to Pin 3
1, 2, 3 5.3 5.9 7.5 V 3 15
VIHC2 VIHC2 = |V1 - V4|;
|IIN| = 10 mA;
Pins 2 & 3 Open
1, 2, 3 6.0 6.6 8.0 V
VIHC3 VIHC3 = V2 - V3;
V3 = GND;
IIN = 13.5 mA;
Pins 1 & 4 Open
1, 2, 3 12.0 14.0 V
Input Current IIN VIN = V2 - V3 = 5.0 V;
Pins 1 & 4 Open
1, 2, 3 3.0 3.9 4.5 mA 4
Logic Low Output Voltage VOL VCC = 4.5 V;
IOL = 2.6 mA
1, 2, 3 0.05 0.4 V 4 7
Logic High Output Current IOH VOH = VCC = 18 V 1, 2, 3 250 µA
Logic Low Supply Current ICCL V2 - V3 = 5.0 V;
VO = Open; VCC = 18 V
1, 2, 3 0.8 3.0 mA
Logic High Supply Current ICCH VCC = 18 V; VO = Open
45% RH, t = 5 s;
1, 2, 3 0.001 20 mA 5
Input-Output Insulation II-O VI-O = 1500 Vdc;
TA = 25° C
1 1 µA 9, 10
6
Figure 1. Typical transfer characteristics. Figure 2. Typical dc threshold levels vs. temperature.
Electrical Characteristics TA = -55° C to 125° C, VCC = 5.0 V, unless otherwise specied (continued)
Parameter Symbol Conditions
Group A
Subgroup Min. Typ.* Max. Units Fig. Note
Propagation Delay Time
to Logic Low Output Level
tPHL RL = 1.8 kΩ, CL = 15 pF 9, 10, 11 4 20 µs 6, 7 6, 11
Propagation Delay Time
to Logic High Output Level
tPLH RL = 1.8 kΩ, CL = 15 pF 9, 10, 11 8 40 µs 6, 12
Logic High Common
Mode Transient Immunity
|CMH| VCM = 50 V TA = 25° C
IIN = 0 mA
9 1000 ≥ 10,000 V/µs 8 13,
14,
17
VCM = 450 V ≥ 10,000
Logic Low Common
Mode Transient Immunity
|CML| VCM = 50 V TA = 25° C
IIN = 4 mA
9 1000 ≥ 5,000 V/µs
VCM = 250 V ≥ 5,000
* All typical values are at TA = 25° C, VCC = 5 V unless otherwise noted.
7
Notes:
1. Maximum operating frequency is dened when output waveform
(Pin 6) attains only 90% of VCC with RL = 1.8 kΩ, CL = 15 pF using a 5
V square wave input signal.
2. Measured at a point 1.6 mm below seating plane.
3. Current into/out of any single lead.
4. Surge input current duration is 3 ms at 120 Hz pulse repetition rate.
Transient input current duration is 10 µs at 120 Hz pulse repetition
rate. Note that maximum input power, PIN, must be observed.
5. Derate linearly above 100° C free-air temperature at a rate of 4.26
mW/°C. Maximum input power dissipation of 195 mW allows an
input IC junction temperature of 150°C at an ambient temperature
of TA = 125° C with a typical thermal resistance from junction to
ambient of θJAi = 235°C/W. The typical thermal resistance from
junction to case is equal to 170°C/W. Excessive PIN and TJ may result
in device degradation.
6. The 1.8 kΩ load represents 1 TTL unit load of 1.6 mA and the 4.7 kΩ
pull-up resistor.
7. Logic low output level at Pin 6 occurs under the conditions of VIN
≥ VTH+ as well as the range of VIN > VTH – once VIN has exceeded VTH+.
Logic high output level at Pin 6 occurs under the conditions of VIN
≤ VTH- as well as the range of VIN < VTH+ once VIN has decreased
below VTH-.
8. The AC voltage is instantaneous voltage.
9. Device considered a two terminal device: Pins 1, 2, 3, 4 connected
together, Pins 5, 6, 7 8 connected together.
10. This is a momentary withstand test, not an operating condition.
11. The tPHL propagation delay is measured from the 2.5 V level of the
leading edge of a 5.0 V input pulse (1 µs rise time) to the 1.5 V level
on the leading edge of the output pulse (see Figure 7).
12. The tPLH propagation delay is measured from the 2.5 V level of the
trailing edge of a 5.0 V input pulse (1 µs fall time) to the 1.5 V level on
the trailing edge of the output pulse (see Figure 7).
13. Common mode transient immunity in Logic High level is the
maximum tolerable dVCM/dt of the common mode voltage, VCM,
to ensure that the output will remain in a Logic High state (i.e., VO
> 2.0 V). Common mode transient immunity in Logic Low level is
the maximum tolerable dVCM/dt of the common mode voltage, VCM,
to ensure that the output will remain in a Logic Low state (i.e., VO
< 0.8 V). See Figure 8.
14. In applications where dVCM/dt may exceed 50,000 V/µs (such
as static discharge), a series resistor, RCC, should be included to
protect the detector IC from destructively high surge currents. The
recommended value for RCC is 240 Ω per volt of allowable drop in
VCC (between Pin 8 and VCC) with a minimum value of 240 Ω.
15. D1 and D2 are Schottky diodes; D3 and D4 are zener diodes.
16. Standard parts receive 100% testing at 25° C (Subgroups 1 and 9). SMD,
Class H and Class K parts receive 100% testing at 25, 125, and -55° C
(Subgroups 1 and 9, 2 and 10, 3 and 11, respectively.)
17. Parameters shall be tested as part of device initial characterization
and after process changes. Parameters shall be guaranteed to the
limits specied for all lots not specically tested.
Typical Characteristics All typical values are at TA = 25° C, VCC = 5 V, unless otherwise specied.
Parameter Symbol Typ. Units Test Conditions Fig. Note
Hysteresis IHYS 1.2 mA IHYS = ITH+ – ITH- 1
VHYS 1.1 V VHYS = VTH+ – VTH-
Input Clamp Voltage VILC -0.76 V VILC = V2 - V3; V3 = GND;
IIN = -10 mA
Bridge Diode Forward Voltage VD1,2 0.62 IIN = 3 mA (see schematic)
VD3,4 0.73
Input-Output Resistance RI-O 1012 ΩVI-O = 500 Vdc 9
Input-Output Capacitance CI-O 2.0 pF f = 1 MHz, VI-O = 0 Vdc
Input Capacitance CIN 50 pF f = 1 MHz; VIN = 0 V,
Pins 2 & 3, Pins 1 & 4 Open
Output Rise Time (10-90%) tr10 µs 7
Output Fall Time (90-10%) tf0.5 µs 7
8
Figure 7. Switching test circuit. Figure 8. Test circuit for common mode transient immunity and typical
waveforms.
Figure 3. Typical input characteristics, IIN vs. VIN.
(AC Voltage is Instantaneous Value.)
Figure 4. Typical input current, IIN, and low level output voltage, VOL,
vs. temperature.
Figure 5. Typical high level supply current, ICCH vs. temperature. Figure 6. Typical propagation delay vs. temperature.
9
Figure 10. Typical external threshold characteristic, V± vs. Rx.
Figure 9. Operating circuit for burn-in and steady state life tests.
Electrical Considerations
The HCPL-5760, HCPL-5761, HCPL-576K or 5962-89477
optocoupler has internal temperature compen sated,
predictable voltage and current threshold points which
allow selection of an external resistor, Rx, to determine
larger external threshold voltage levels. For a desired
external threshold voltage, V±, a corresponding typical
value of Rx can be obtained from Figure 10. Specic
calculation of Rx can be obtained from Equation (1)
of Figure 11. Specication of both V+ and V- voltage
threshold levels simulta neously can be obtained by the
use of Rx and Rp as shown in Figure 11 and determined by
Equations (2) and (3).
Rx can provide over-current transient protection by
limiting input current during a transient condition. For
monitoring contacts with a relay or switch, the HCPL-
5760/1/K, or 5962-89477 combin-ation with Rx and Rp
can be used to allow a specic current to be con-ducted
through the contacts for cleaning purposes (wetting
current).
The choice of which input voltage clamp level to choose
depends upon the application of this device (see Figure 3).
It is recommended that the low clamp condition be used
when possible to lower the input power dissipation as
well as the LED current, which minimizes LED degradation
over time.
In applications where dVCM/dt may be extremely large
(such as static discharge), a series resistor, RCC, should
be connected in series with VCC and Pin 8 to protect the
detector IC from destructively high surge currents. See
note 14 for determination of RCC. In addition, it is recom-
mended that a ceramic disc bypass capacitor of 0.01 µF to
0.1 µF be placed between Pins 8 and 5 to reduce the eect
of power supply noise.
For interfacing ac signals to TTL systems, output low pass
ltering can be performed with a pullup resistor of 1.5 kΩ
and 20 µF capacitor. This application requires a Schmitt
trigger gate to avoid slow rise time chatter problems.
For ac input applica tions, a lter capacitor can be placed
across the dc input terminals for either signal or transient
ltering.
Either AC (Pins 1, 4) or DC (Pins 2, 3) input can be used to
determine external threshold levels.
For one specically selected external threshold voltage
level V+ or V-, Rx can be determined without use of Rp via
V+ – VTH+
V- – VTH-
≥
V+
V-and
VTH+
VTH- <ITH+
ITH-
Rp = VTH+ (V+) – VTH+ (V-)
ITH+ (V- – VTH-) – ITH- (VTH+ – V+)(3)
Rx = VTH+ (V+) – VTH+ (V-)
ITH+ (VTH-) – ITH- (VTH+)(2)
Rx = V+(-) – VTH+(-)
ITH+(-) (1)
For two specically selected external threshold voltage
levels, V+ and V-, the use of Rx and Rp will permit this
selection via equations (2), (3) provided the following con-
ditions are met:
V+ – VTH+
V- – VTH-
≥
V+
V-and
VTH+
VTH- <ITH+
ITH-
Rp = VTH+ (V+) – VTH+ (V-)
ITH+ (V- – VTH-) – ITH- (VTH+ – V+)(3)
Rx = VTH+ (V+) – VTH+ (V-)
ITH+ (VTH-) – ITH- (VTH+)(2)
Rx = V+(-) – VTH+(-)
ITH+(-) (1)
See Application Note 1004 for more information.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. Obsoletes 5968-9404E, 5988-3098EN
AV02-3616EN - June 14, 2012
MIL-PRF-38534 Class H, Class K, and DSCC SMD Test Program
Avago Technologies’ Hi-Rel Optocouplers are in compliance with MIL-PRF-38534 Class H and K. Class H and Class K
devices are also in compliance with DSCC drawing 5962-89477.
Testing consists of 100% screen ing and quality con for-mance inspection to MIL-PRF-38534.
Figure 11. External threshold voltage level selection.