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74F132
Quad 2-input NAND Schmitt trigger
Product specification
IC15 Data Handbook
1991 Jun 26
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
2
1991 Jun 26 853–0342 03094
DESCRIPTION
The 74F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL output levels.
They are capable of transforming slowly changing input signals into
sharply defined, jitter-free output signals. In addition, they have
greater noise margin than conventional NAND gates. Each circuit
contains a 2-input Schmitt trigger followed by a Darlington level
shifter and a phase splitter driving a TTL totem-pole output. The
Scmitt trigger uses positive feedback to effectively speed-up slow
input transitions and provide different input threshold voltages for
positive and negative-going transitions. This hysteresis between the
positive-going and negative-going input threshold (typically 800mV)
is determined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations. As long as three inputs
remain at a more positive voltage than VT+MAX, the gate will
respond in the transition of the other input as shown in W aveform 1.
PIN CONFIGURATION
14
13
12
11
10
7
6
5
4
3
2
1
Q1
VCC
D2b
D2a
Q2
Q3
D3b
D3a
D0a
D1b
D0b
Q0
D1a
9
GND
SF00710
8
TYPE TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F132 6.3ns 13mA
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°CPKG DWG #
14-pin plastic DIP N74F132N SOT27-1
14-pin plastic SO N74F132D SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
Dna, Dnb Data inputs 1.0/1.0 20µA/0.6mA
Qn Data output 50/33 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
D0a D0b D1a D2a D2b D3a D3bD1b
Q0 Q1 Q2 Q3
36811
12459101213
VCC = Pin 14
GND = Pin 7
SF00711
IEC/IEEE SYMBOL
1
2
4
5
9
10
12
13
&3
6
8
11
SF00712
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
1991 Jun 26 3
LOGIC DIAGRAM
D0a
D0b
D1a
D1b
D2a
Q0
D2b
D3a
D3b
Q1
Q2
Q3
VCC = Pin 14
GND = Pin 7
3
6
8
11
1
2
4
5
9
10
12
13
SF00002
FUNCTION TABLE
INPUTS OUTPUT
Dna Dnb Qn
L L H
L H H
H L H
H H L
NOTES:
H = High voltage level
L = Low voltage level
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL PARAMETER RATING UNIT
VCC Supply voltage –0.5 to +7.0 V
VIN Input voltage –0.5 to +7.0 V
IIN Input current –30 to +5 mA
VOUT Voltage applied to output in High output state –0.5 to VCC V
IOUT Current applied to output in Low output state 40 mA
Tamb Operating free-air temperature range 0 to +70 °C
Tstg Storage temperature –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5.0 5.5 V
IIK Input clamp current –18 mA
IOH High-level output current –1 mA
IOL Low-level output current 20 mA
Tamb Operating free-air temperature range 0 +70 °C
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
1991 Jun 26 4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST
CONDITIONS1
MIN TYP2MAX
UNIT
VT+ Positive-going threshold VCC = 5.0V 1.5 1.7 2.0 V
VT– Negative-going threshold– VCC = 5.0V 0.7 0.9 1.1 V
VTHysteresis (VT+ VT–) VCC = 5.0V 0.4 0.8 V
VO
High level out
p
ut voltage
VCC = MIN, ±10%VCC 2.5
V
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
VI=VT–MAX, IOH = MAX ±5%VCC 2.7 3.4
V
VO
Low level out
p
ut voltage
VCC = MIN, ±10%VCC 0.30 0.50
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
VI=VT+MAX, IOL = MAX ±5%VCC 0.30 0.50
V
VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V
IT+ Input current at positive-going threshold VCC = 5.0V, VI=VT+ 0µA
IT– Input current at negative-going threshold VCC = 5.0V, VI=VT– –350 µA
IIInput current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
IIH High-level input current VCC = MAX, VI = 2.7V 20 µA
IIL Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
IOS Short-circuit output current3VCC = MAX –60 –150 mA
ICC
Su
pp
ly current (total)
ICCH
VCC = MAX
VI N= GND 8.5 12.0
mA
I
CC
S
u
ppl
y
c
u
rrent
(total)
ICCL
V
CC =
MAX
VIN = 4.5V 13.0 19.5
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
1991 Jun 26 5
AC ELECTRICAL CHARACTERISTICS
LIMITS
VCC = +5.0V VCC = +5.0V ± 10%
SYMBOL PARAMETER
Tamb = +25°C Tamb = 0°C to +70°C UNIT
CL = 50pF, RL = 500CL = 50pF, RL = 500
MIN TYP MAX MIN MAX
tPLH
tPHL Propagation delay
Dna, Dnb to QnW aveform 1 3.5
4.5 5.5
6.0 7.0
8.5 3.0
4.5 8.5
9.0 ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
VM
VM
VM
VM
Qn
Dna, Dnb
tPHL tPLH
SF00005
W aveform 1. For Inverting Outputs
TEST CIRCUIT AND WAVEFORMS
tw90%
VM
10%
90%
VM10%
90%
VM10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
0V
tTHL (tf )
INPUT PULSE REQUIREMENTS
rep. rate twtTLH tTHL
1MHz 500ns 2.5ns 2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN VOUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
RL= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT= Termination resistance should be equal to ZOUT of
pulse generators.
tTHL (tf )
tTLH (tr )
tTLH (tr )AMP (V)
amplitude
3.0V 1.5V
VM
SF00006
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
1991 Jun 26 6
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
1991 Jun 26 7
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Philips Semiconductors Product specification
74F132Quad 2-input NAND Schmitt trigger
yyyy mmm dd 8
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05074
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Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.