SN54ALS1245A, SN74ALS1245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS245A – DECEMBER 1982 – REVISED JANUARY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
•Bidirectional Bus Transceivers in
High-Density 20-Pin Packages
•Low-Power Versions of ′ALS245 Series
•′ALS1245 Series Is Identical to ′ALS1645
Series
•Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. These devices transmit data from the
A bus to the B bus or from the B bus to the A bus,
depending on the logic level at the direction-
control (DIR) input. The output-enable (OE) input
can be used to disable the device so the buses are
effectively isolated.
The SN54ALS1245A is characterized for
operation over the full military temperature range
of –55°C to 125°C. The SN74ALS1245A is
characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OPERATION
OE DIR
OPERATION
L L B data to A bus
L H A data to B bus
H X Isolation
3212019
910111213
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A2
A1
DIR
B7
B6 OE
A8
GND
B8 VCC
SN54ALS1245A . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN54ALS1245A ...J PACKAGE
SN74ALS1245A . . . DW OR N PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54ALS1245A, SN74ALS1245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS245A – DECEMBER 1982 – REVISED JANUARY 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†logic diagram (positive logic)
B2
17
B3
16
B4
15
A5 6
A6 7
A7 8
A8 9
A2 3
A3 4
A4 5
OE
A1 2
G3
19
3EN2 [AB]
B5
14
B6
13
B7
12
B8
11
B1
18
3EN1 [BA]
1
DIR
DIR
A1 B1
19
218
To Seven Other T ransceivers
1
2
1
OE
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: All inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: SN54ALS1245A –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS1245A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
recommended operating conditions
SN54ALS1245A SN74ALS1245A
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
IOH High-level output current –12 –15 mA
IOL Low-level output current 8 16 mA
TAOperating free-air temperature –55 125 0 70 °C
SN54ALS1245A, SN74ALS1245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS245A – DECEMBER 1982 – REVISED JANUARY 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS1245A SN74ALS1245A
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.5 –1.5 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 VCC –2
VOH
IOH = –3 mA 2.4 3.2 2.4 3.2
V
V
OH VCC = 4.5 V IOH = –12 mA 2
V
IOH = –15 mA 2
VOL
VCC =45V
IOL= 8 mA 0.25 0.4 0.25 0.4
V
V
OL
V
CC =
4
.
5
V
IOL = 16 mA 0.35 0.5
V
II
Control inputs
VCC =55V
VI = 7 V 0.1 0.1
mA
I
IA or B ports
V
CC =
5
.
5
V
VI = 5.5 V 0.1 0.1
mA
IIH
Control inputs
VCC =55V
VI=27V
20 20
µA
I
IH A or B ports‡
V
CC =
5
.
5
V
,
V
I =
2
.
7
V
20 20 µ
A
IIL
Control inputs
VCC =55V
VI=04V
–0.1 –0.1
mA
I
IL A or B ports‡
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–0.1 –0.1
mA
IO§VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 21 33 21 30
ICC VCC = 5.5 V Outputs low 23 36 23 33 mA
Outputs disabled 25 40 25 36
†All typical values are VCC = 5 V, TA = 25°C.
‡For I/O ports, the parameters IIH and IIL include the off-state output current.
§The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER FROM
(INPUT) TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAXUNIT
SN54ALS1245A SN74ALS1245A
MIN MAX MIN MAX
tPLH
AorB
BorA
219 2 13
ns
tPHL
A
or
B
B
or
A
2 15 2 13
ns
tPZH
OE
AorB
830 8 25
ns
tPZL
OE
A
or
B
829 8 25
ns
tPHZ
OE
AorB
2 14 2 12
ns
tPLZ
OE
A
or
B
330 3 18
ns
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN54ALS1245A, SN74ALS1245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SDAS245A – DECEMBER 1982 – REVISED JANUARY 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
tPHZ
tPLZ
tPHL tPLH
0.3 V
tPZL
tPZH
tPLH tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test Test
Point
R1
S1
CL
(see Note A)
7 V
1.3 V
1.3 V1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V 1.3 V 3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
1.3 V 1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
VOL
VOH
VOH
VOL
Output
Control
(low-level
enabling)
W aveform 1
S1 Closed
(see Note B)
W aveform 2
S1 Open
(see Note B)
[
0 V
VOH
VOL
[
3.5 V
In-Phase
Output
0.3 V
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
R2
VCC
RL
Test
Point
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
From Output
Under Test Test
Point
CL
(see Note A) RL
RL = R1 = R2
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
5962-88737012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-8873701RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SN74ALS1245ADW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS1245ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS1245ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS1245AN ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN74ALS1245ANE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN74ALS1245ANSR ACTIVE SO NS 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS1245ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS1245ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SNJ54ALS1245AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54ALS1245AJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
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PACKAGE OPTION ADDENDUM
www.ti.com 11-Nov-2009
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 11-Nov-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ALS1245ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ALS1245ANSR SO NS 20 2000 346.0 346.0 41.0
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 2
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