1. General description
The new Pegoda is NXP’s latest generation of reference designs for secure MIFARE
applications. Built around proven, well-established MIFARE solutions and powerful ARM
Cortex-M3 processors, these design in kits are available in two evaluation kits: the
MFEV710 and the MFEV852.
The MFEV710 design in kit includes the MFRD710 contactless smartcard reader, a
design based on the MFRC523 cont actless reader IC. The kit support s the entire MIFARE
portfolio: MIFARE Classic, MIFARE DESFire, MIFARE Plus, and MIFARE Ultralight C,
including SAM AV2 (in x- and non-x modes). The kits also offer full support of MIFARE
discover, with a reader library for all the MIFARE card products.
It uses an open software concept and PC-based tools. The software code and hardware
architecture are reusable, and each kit includes a sample SAM-based, secure reader
architecture that implements multiple protocols. For added flexibility in development, the
flash-based microcontroller supports custom application development based on Pegoda
hardware. The microcontroller is open for customer code implementations, and the
design’s hardware interfaces are open for customer extensions.
The kit include native support for USB. An optional hardware extension board, available
on request, provides additional support for RS232, RS485, and Ethernet. The extension
board also has a JTAG interface, for debugging functionality directly on the
microcontroller, and is accompanied by a free embedded toolchain for firmware
customization.
The GUI supplied with each kit uses the familiar Windows look and feel and offers a range
of features, including history, log, timing profile management, key management, show
cards, and installer.
Minimum system requirements The minimum system requirements for running either
evaluation kit are as follows: Intel Pentium 166 MHz or equivalent, 32 Mbytes RAM,
20 Mbytes free har d disk space, CD-RO M drive, USB support, and Windows 7,
Windows XP, Windows Vista, or Windows Server in 32- or 64-bit version.
2. Features and benefits
2.1 Features
Multiprotocol ISO/IEC 14443 and MIFARE operation
PC/SC-based architecture on widely deployed hardware solutions
Full support for entire MIFARE card portfolio and MIFAREdiscover
SAM support in standard or x-mode
MFEV710
Pegoda EV710
Rev. 3 — 14 February 2011
202630 Product short data sheet
PUBLIC
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 2 of 12
NXP Semiconductors MFEV710
Pegoda EV710
ARM Cortex-M3 microcontroller with integrated flash memory
Firmware in source code and binaries
USB host interface to PC and Windows-based user interface
Optional support for RS232, RS485, JTAG, Ethernet
2.2 Benefits
Fast, flexible development of SAM-based, secure reader systems
Quick embedded development with portable code
Easy customization with flash-based microcontroller
Custom firmware and JTAG debugging with optional hardware extension board
3. Applications
Public transportation
Access management
PC peripheral term ina l
4. Quick reference data
5. Ordering information
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDD supply voltage - 4.75 5.0 5.25 V
Tamb ambient temperature - 10 +25 70 V
Table 2. Ordering i nformation
Type number Package
Name Description Version
MFEV710 - Package containing:
MFRD710, Pegoda contactless
smartcard reader, based on MFRC523
contactless reader IC
USB cable
MIFARE sample cards
CD with documentation and software
-
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 3 of 12
NXP Semiconductors MFEV710
Pegoda EV710
6. Block diagram
Fig 1. Block diagram RD710
brb57
5
USB
(type B)
JTAG
(JTAG)
ETHERNET
(MEC6)
2 × RS232
(10-pin header)
RS485(RS422)
(5-pin header)
OSCILLATOR
12 MHz
ACT. ANTENNA
(5-pin header)
ANTENNA AN710
(10-pin header)
DESFIRE
SAM
SIM connector
I2C
SPI
UART
I2C
I2C
SPI
UART
RESET
T = 1
LPC1768 RC523
RM710
RD710
CONNECTORS
JTAG/
SWD
ETHERNET
EXT
RS485
RS232
USB
ANTENNA AN710
DIPSW
OSCILLATOR
13.56 MHz
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 4 of 12
NXP Semiconductors MFEV710
Pegoda EV710
7. Functional description
7.1 Content
The kit includes the following items:
MFRD710, Pegoda contactless smartcard reader, based on MFRC523 contactless
reader.
1 USB cable
3 MIFARE sample cards
CD with documentation and software.
The following p aragr aphs de scribe the Hard ware and Software Architecture rela ted to th e
MFRD710.
7.2 Hardware architecture CLRD710
The reader CLRD710 is a contactless Reader/Writer compliant to the ISO/IEC 14443
standard and is able to handle contactless data r ates of 106 kBit, 212 kBit, 424 kBit and
848 kBit.
It is based on NXP reader-IC M FRC523, see Ref. 1; which is a highly integra ted reader IC
solution for contactless communication purposes at 13.56 MHz. The MFRC523 is
connected to a LPC1768 μController that executes the firmware. The LPC1768
implement s flash memory and allows to downloa d a nd de bug the firmware by means of a
JTAG interface.
The CLRD710 implements an external amplifier driven by the MFRC523 which is
connected to the antenna to achieve an optimum reader/writer performance for
contactles s applications.
The MIFARE SAM AV2 module, see Ref. 2; can be used for key storage and enhanced
crypto operation to increase the security level.
The reader provides several communication interfaces on board such as: USB, RS232,
RS485 (RS422), Ethernet (via LPC_ extension board) and JTAG (a JTAG IEEE 1149.1
compliant interface for debugging).
The Hardware Design is described in more detail in Ref. 4.
7.3 Software architecture
The software of the CLRD710 consist of 3 components.
CLRD710 firmware based on a ARM CortexM3 implementation as well as the driver
Reader library
Graphical User Interface MIFAREdiscover
7.3.1 Firmware and driver
The reader firmware can perform contact and contactless communication.
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 5 of 12
NXP Semiconductors MFEV710
Pegoda EV710
The contact part of the reader firmware is used to communicate with a SAM, ideally the
MIFARE SAM AV2, see Ref. 2. The contactless part performs the polling and activation
sequence according to PC/SC part 2, ISO/IEC 14443-3 and 14443-4 standards.
The polling and activation sequence can be turned off and on with the use of escape
(PC/SC part 3) comma nds. The polli ng a nd activation se que nce is au tomatically disab led
if escape commands are executed that would interfere with the normal operations. The
firmware also interprets the ADPUs for MIFARE which are defined in PC/SC part 3.
The main modes of ope ra tio n ar e be in g set by DIP switches which are located on the
reader. Some configuration parameters can be set with the escape commands. The
reader will store them in non-violate memory. The user will be able to reset the
configuration back to default state.
The firmware will construct the product name – which is returned by USB descriptor – to
easily identify the reader/SAM configur ation. Depending on the DIP switches, there are
three possible config ur ations:
No SAM (Pegoda N)
SAM in X-Mode (Pegoda X)
SAM in S-Mode (Pegoda S)
The user will be able to flash the board with customized or original firmware with three
methods:
Over USB (IAP)
Over serial port (ISP)
Over JTAG with the use of an external program
For more information, ple ase refer to Ref. 6. The imple mentation of the driver i s described
in Ref. 9.
7.3.2 NXP Reader Library
The Reader Library is a special build of the functiona lity pr ovid e d by the Bas i c Function
library. The desired functionality can be selected by the user and compiled dependent on
application requirements. On the CLRD710 the Reader library is implemented to be
executed on the Host PC. The library is designed to be portable, it can be ported to any
embedded environment if desired. As such it can be also ported to the controller of the
CLRD710.
The NXP reader library is encapsulated into Layers and Components written in ANSI C.
The library structure provides a modular way of programming and setting up the read er
interface.
For easy portability, the reader library consists of 4 layers:
BAL (Bus Abstraction Layer)
HAL (Hardware Abstraction Layer)
PAL (Protocol Abstraction Layer)
AL (Application Layer)
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 6 of 12
NXP Semiconductors MFEV710
Pegoda EV710
The reader library requires a dedicated build for a usage of the CLRD710 functionality in
No -SAM, SAM “X-mode” or SAM “Direct-mode”.
Building the software stack for a specific reader mode requires therefore different software
models to be gener ated. The three types of operating modes within the PC/SC mode are:
No SAM mode
The most important aspect of this mode is performing activation and polling sequence
for ISO 14443 A type car ds as defined in PC/SC part 3. Selected cards are put in slo t
manager and notification is sent to PC/SC dri ver. There can be only one ISO 14443-3
card or multiple (maximum 14) ISO 14443-4 cards in the field.
SAM in non X-mode
The most important aspect of this mode is performing activation and polling sequence
for ISO 14443 A type car ds as defined in PC/SC part 3. Selected cards are put in slo t
manager and notification is sent to PC/SC dri ver. There can be only one ISO 14443-3
card or multiple (maximum 14) ISO 14443-4 cards in the field.
SAM in X-mode
In this mode communication is only through SAM (slot 0). Only limited number of
proprietary commands can be executed
The NXP reader library is available over the NX P BU-ID docu control service, please refer
to Ref. 12. An application note, see Ref. 3, gives an overview how to create your on
application as a project within the NXP reader library.
7.3.3 MIFAREdiscover
MIFAREdiscover is the Graphical User Interf ac e of th e CL RD7 10 software package. It
supports easy and fast application development for ISO/IEC 14443 type Smartcards by
providing multiple views to the content and protoco ls of the cards. It is supplied over our
NXP BU-ID docu control service, please refer to Ref. 11. A very first guideline to install all
necessary parts and do the first steps with this Graphical User Interface is given in Ref. 5.
7.4 Certification
The CLRD710 went successfully through the following certification processes:
EMC, certification to comply with EN 301 489-1 V1.6.1 (2005-09); EN 301 489-3
V1.4.1(2002-08); IEC 60950-1:2005; EN 60950-1:2006
FCC, certification to comply with FCC Part 15, Subpart C
MIFARE certification institute to comply with Test plan for MIFARE Air-Interface
Compatibility Certification of Terminals Qualification of Readers Single and Double
UID Version 2.4 Date of Issue: 29.03.2010
CE
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 7 of 12
NXP Semiconductors MFEV710
Pegoda EV710
8. Limiting values
[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
9. Abbreviations
Table 3. Limiting values [1]
In accordance with the Absolute Maximum Rating Syste m (IEC 60134). Voltages are referenced to
VSS (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
VDD supply voltage active reader 4.75 5.00 5.25 V
Tamb ambient temperature - 25 +25 +85 °C
IDD supply current active, RF on - 170 - mA
Table 4. Abbreviations
Acronym Description
AL Application Layer
APDU Application Protocol Data Unit
BAL Bus Abstraction Layer
EEPROM Electrically Erasable Programmable Read Only Memory
HAL Hardware Abstraction Layer
IAP In-Application Programming
ISP Internet service provider
JTAG Joint Test Action Group
PAL Protocol Abs tra ct ion Lay er
PCD Proximity Coupling Device
PICC Proximity Integrated Circuit Card
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 8 of 12
NXP Semiconductors MFEV710
Pegoda EV710
10. References
[1] Data sheet MFRC523 Contactless reader IC, available on NXP web
[2] Short data sheet — P5DF081 MIFARE SAM AV2, available on NXP web
[3] Application Note — Example Project Pegoda, available on NXP web
[4] Application Note — Hardware Design Guide Pegoda, available on NXP web
[5] Application Note — Quick Start Up Guide Pegoda, availa ble on NXP web
[6] Application Note — Software Design Guide Pegoda, available on NXP web
[7] Application Note — Pegoda Toolchain Information, available on NXP web
[8] Application Note — Pegoda Amplifier, available on NXP web
[9] Application Note — Pegoda RD710/RD852 Implementation of the USB drive,
available on NXP web
[10] Application Note — MIFARE SAM AV2 Documentation and Sampling, available
on NXP web
[11] Software — MIFAREdiscover available over BU-ID docu control, BU-ID Doc. no.:
1866**1
[12] Software — NXP Reader library including Sample Pro jec ts, available ove r BU-I D
docu control, BU ID Doc.no.: 2003**
1. ** ... document version number
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 9 of 12
NXP Semiconductors MFEV710
Pegoda EV710
11. Revision history
Table 5. Revision history
Document ID Release date Data sheet status Change notice Supersedes
MFEV710_SDS v3.0 20110214 Product short data sheet - -
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 10 of 12
NXP Semiconductors MFEV710
Pegoda EV710
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat io nThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suit able for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo m er(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter m s and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
MFEV710_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product short data sheet
PUBLIC Rev. 3 — 14 February 2011
202630 11 of 12
NXP Semiconductors MFEV710
Pegoda EV710
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product i s automotive qualified,
the product is not suitable for automo tive use. It i s neit her qua lif ied nor test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such au tomotive applicat ions, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive appl ications beyond NXP Semiconductors’
standard warrant y and NXP Semiconductors’ product specifications.
12.4 Licenses
12.5 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
MIFARE — is a trademark of NXP B.V.
DESFire — is a trademark of NXP B.V.
MIFARE Plus — is a trademark of NXP B.V.
MIFARE Ultralight — is a trademark of NXP B.V.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Purchase of NXP ICs with ISO/IEC 14443 type B functionality
This NXP Semiconductors IC is I SO/IEC 14443 T ype B
software enabled and is licensed under Innovatron’s
Contactless Card p atents license for ISO/IEC 144 43 B.
The license includes the right to use the IC in systems
and/or end-user equipment.
RATP/Innovatron
Technology
NXP Semiconductors MFEV710
Pegoda EV710
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 14 February 2011
202630
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
2.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2 Benefits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
5 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 4
7.1 Content. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.2 Hardware architecture CLRD710 . . . . . . . . . . . 4
7.3 Software architecture . . . . . . . . . . . . . . . . . . . . 4
7.3.1 Firmware and driver . . . . . . . . . . . . . . . . . . . . . 4
7.3.2 NXP Reader Library . . . . . . . . . . . . . . . . . . . . . 5
7.3.3 MIFAREdiscover. . . . . . . . . . . . . . . . . . . . . . . . 6
7.4 Certification. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 7
10 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12.4 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.5 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
13 Contact information. . . . . . . . . . . . . . . . . . . . . 11
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12