LTM4615
1
4615fb
For more information www.linear.com/LTM4615
Typical applicaTion
FeaTures
applicaTions
DescripTion
Triple Output, Low Voltage
DC/DC µModule Regulator
The LT M
®
4615 is a complete 4A dual output switching
mode DC/DC power supply plus an additional 1.5A VLDO
(very low dropout) linear regulator. Included in the pack-
age are the switching controllers, power FETs, inductors,
a 1.5A regulator and all support components. The dual 4A
DC/DC converters operate over an input voltage range of
2.375V to 5.5V, and the VLDO operates from a 1.14V to
3.5V input. The LTM4615 supports output voltages rang-
ing from 0.8V to 5V for the DC/DC converters, and 0.4V
to 2.6V for the VLDO. The three regulator output voltages
are set by a single resistor for each output. Only bulk input
and output capacitors are needed to complete the design.
The low profile package (2.82mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation. High switching frequency and a
current mode architecture enables a very fast transient
response to line and load changes without sacrificing
stability. The device supports output voltage tracking for
supply rail sequencing.
Additional features include overvoltage protection, over-
current protection, thermal shutdown and programmable
soft-start. The power module is offered in a space saving
and thermally enhanced 15mm × 15mm × 2.82mm LGA
package. The LTM4615 is RoHS compliant with Pb-free
finish.
n Telecom and Networking Equipment
n Industrial Power Systems
n Low Noise Applications
n FPGA, SERDES Power
n Dual 4A Output Power Supply with 1.5A VLDO™
n Short-Circuit and Overtemperature Protection
n Power Good Indicators
Switching Regulators Section—Current Mode Control
n Input Voltage Range: 2.375V to 5.5V
n 4A DC Typical, 5A Peak Output Current Each
n 0.8V Up to 5V Output Each, Parallelable
n ±2% Total DC Output Error
n Output Voltage Tracking
n Up to 95% Efficiency
n Programmable Soft-Start
VLDO Section
n VLDO, 1.14V to 3.5V Input Range
n VLDO, 0.4V to 2.6V, 1.5A Output
n VLDO, 40dB Supply Rejection at fSW
n ±1% Total DC Output Error
n Small and Very Low Profile Package:
15mm × 15mm × 2.82mm
1.2V at 4A, 1.5V at 4A and 1V at 1A DC/DC µModule
®
Regulator
Efficiency vs Output Current
L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and PolyPhase are registered
trademarks and VLDO and LTpowerCAD are trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6724174.
PGOOD1
PGOOD1
FB1
TRACK1
RUN/SS1
LDO_IN
EN3
GND1 GND2
LTM4615
GND3
VIN1 VIN2
VOUT1
VIN
1.2V
VIN 3V TO 5.5V
10k
10k
100µF
6.3V
100µF
6.3V
22µF
6.3V
10µF
6.3V
22µF
6.3V
10µF
10µF
6.3V
10µF
6.3V
VOUT1
1.2V
4A
VOUT2
1.5V
4A
PGOOD2
PGOOD2
FB2
TRACK2 VIN
RUN/SS2
LDO_OUT
FB3
PGOOD3 PGOOD3
VOUT2
5.76k
10k
4615 TA01a
VOUT3
VOUT3
1V AT 1A
3.32k
10k
OUTPUT CURRENT (A)
0
EFFICIENCY (%)
83
85
87
4
4615 TA01b
81
79
75 123
77
91
89
VIN = 3.3V
VOUT2
1.5V
VOUT3
1V
(VIN = 1.2V)
VOUT1
1.2V
LTM4615
2
4615fb
For more information www.linear.com/LTM4615
pin conFiguraTionabsoluTe MaxiMuM raTings
Switching Regulators
VIN1, VIN2, PGOOD1, PGOOD2 ...................... –0.3V to 6V
COMP1, COMP2, RUN/SS1, RUN/SS2
VFB1, VFB2,TRACK1, TRACK2 ...................... –0.3V to VIN
SW, VOUT ...................................... –0.3V to (VIN + 0.3V)
Very Low Dropout Regulator
LDO_IN, PGOOD3, EN3 ................................ –0.3V to 6V
LDO_OUT ........................................................–0.3 to 4V
FB3 ........................................ –0.3V to (LDO_IN + 0.3V)
LDO_OUT Short-Circuit.................................... Indefinite
Internal Operating Temperature Range
(Notes 2, 5) ............................................ –40°C to 125°C
Junction Temperature ........................................... 125°C
Storage Temperature Range .................. –55°C to 125°C
(Note 1)
LGA PACKAGE
144-LEAD (15mm × 15mm × 2.82mm)
TOP VIEW
1 2 3 4 5 6 7 8 109 11 12
L
K
J
H
G
F
E
D
C
B
M
A
VOUT1
GND1
VOUT2
GND2
LDO_OUT
GND3
RUN/SS1
GND1
FB2 BOOST3
GND3 EN3
FB3
LDO_IN
SW1
TRACK1
PGOOD1 FB1
COMP1
VIN1
VIN2
PGOOD3
GND2
RUN/SS2
SW2TRACK2
PGOOD2
COMP2
TJMAX = 125°C, θJCbottom = 2-3°C/W, θJA = 15°C/W, θJCtop = 25°C/W,
θ VALUES DETERMINED FROM 4 LAYER 76mm × 95mm PCB
WEIGHT = 1.6g
LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE †
LTM4615EV#PBF LTM4615EV#PBF LTM4615V 144-Lead (15mm × 15mm × 2.82mm) LGA –40°C to 125°C
LTM4615IV#PBF LTM4615IV#PBF LTM4615V 144-Lead (15mm × 15mm × 2.82mm) LGA –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
† See Note 2.
orDer inForMaTion
LTM4615
3
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For more information www.linear.com/LTM4615
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Switching Regulator Section: per Channel
VIN(DC) Input DC Voltage Range l2.375 5.5 V
VOUT(DC) Output DC Voltage Range l0.8 5.0 V
VOUT(DC) Output Voltage CIN = 22µF, COUT = 100µF, RFB = 5.76k,
VIN = 2.375V to 5.5V, IOUT = 0A to 4A (Note 6)
0°C ≤ TJ ≤ 125°C
l
1.460
1.45
1.49
1.49
1.512
1.512
V
V
VIN(UVLO) Undervoltage Lockout Threshold IOUT = 0A 1.6 2 2.3 V
IINRUSH(VIN) Input Inrush Current at Start-Up IOUT = 0A, CIN = 22µF, COUT = 100µF, VOUT = 1.5V,
VIN = 5.5V
0.35
A
IQ(VIN) Input Supply Bias Current VIN = 2.375V, VOUT = 1.5V, Switching Continuous
VIN = 5.5V, VOUT = 1.5V, Switching Continuous
Shutdown, RUN = 0, VIN = 5V
28
45
7
12
mA
mA
µA
IS(VIN) Input Supply Current VIN = 2.375V, VOUT = 1.5V, IOUT = 4A
VIN = 5.5V, VOUT = 1.5V, IOUT = 4A
3.2
1.48
A
A
IOUT(DC) Output Continuous Current Range VIN = 5.5V, VOUT = 1.5V (Note 6) 0 4 A
∆VOUT(LOAD + LINE)
VOUT
Load and Line Regulation Accuracy VOUT = 1.5V, 0A to 4A (Note 6)
VIN = 2.375V to 5.5V
l
±1.0
±1.3
±1.30
±1.6
%
%
VOUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 100µF
VIN = 5V, VOUT = 1.5V
12
mVP-P
fsOutput Ripple Voltage Frequency IOUT = 4A, VIN = 5V, VOUT = 1.5V 1.25 MHz
∆VOUT(START) Turn-On Overshoot COUT = 100µF, VOUT = 1.5V, RUN/SS = 10nF,
IOUT = 0A
VIN = 3.3V
VIN = 5V
20
20
mV
mV
tSTART Turn-On Time COUT = 100µF, VOUT = 1.5V, IOUT = 1A Resistive
Load, TRACK = VIN and RUN/SS = Float
VIN = 5V
0.5
ms
∆VOUT(LS) Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load,
COUT = 100µF, VIN = 5V, VOUT = 1.5V
25 mV
tSETTLE Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load,
VIN = 5V, VOUT = 1.5V
10 µs
IOUT(PK) Output Current Limit COUT = 100µF, VIN = 5V, VOUT = 1.5V 8 A
VFB Voltage at FB Pin IOUT = 0A, VOUT = 1.5V
l
0.790
0.786
0.8
0.8
0.807
0.809
V
V
IFB 0.2 µA
VRUN RUN Pin On/Off Threshold 0.6 0.75 0.9 V
ITRACK TRACK Pin Current 0.2 µA
VTRACK(OFFSET) Offset Voltage TRACK = 0.4V 30 mV
VTRACK(RANGE) Tracking Input Range 0 0.8 V
RFBHI Resistor Between VOUT and FB Pins 4.96 4.99 5.02 kΩ
∆VPGOOD PGOOD Range ±7.5 %
RPGOOD PGOOD Resistance Open-Drain Pull-Down 90 150 Ω
elecTrical characTerisTics
The l denotes the specifications which apply over the full internal
operating temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 5V, LDO_IN = 1.2V unless otherwise noted.
Per Typical Application Figure 12.
LTM4615
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For more information www.linear.com/LTM4615
elecTrical characTerisTics
The l denotes the specifications which apply over the full internal
operating temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 5V, LDO_IN = 1.2V unless otherwise noted.
Per Typical Application Figure 12.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VLDO Section
VLDO_IN Operating Voltage (Note 3) l1.14 3.5 V
IIN(LDO_IN) Operating Current IOUT = 0mA, VOUT = 1V, EN3 = 1.2V 1 mA
IIN(SHDN) Shutdown Current EN3 = 0V, LDO_IN = 1.5V 0.6 20 µA
VBOOST3 BOOST3 Output Voltage EN3 = 1.2V 4.8 5 5.2 V
VBOOST3(UVLO) Undervoltage Lockout 4.3 V
VFB3 FB3 Internal Reference Voltage 1mA ≤ IOUT ≤ 1.5A, 1.14V ≤ VLDO_IN ≤ 3.5V,
BOOST3 = 5V, 1V ≤ VOUT ≤ 2.59V
l
0.397
0.395
0.4
0.4
0.404
0.405
V
V
VLDO_OUT Output Voltage Range 0.4 2.6 V
VDO Dropout Voltage VLDO_IN = 1.5V, VFB3 = 0.38V, IOUT = 1.5A (Note 4) 100 250 mV
LDO_RHI LDO Top Feedback Resistor 4.96 4.99 5.02 kΩ
IOUT Output Current VEN3 = 1.2V l1.5 A
ILIM Output Current Limit (Note 5) 2.5 A
enOutput Voltage Noise Frequency = 10Hz to 1MHz, ILOAD = 1A 300 µRMS
VIH_EN3 EN3 Input High Voltage 1.14V ≤ VLDO_IN ≤ 3.5V l1 V
VIL_EN3 EN3 Input Low Voltage 1.14V ≤ VLDO_IN ≤ 3.5V 0.4 V
IIN_EN3 EN3 Input Current –1 1 µA
VOL_PGOOD3 PGOOD Low Voltage IPGOOD3 = 2mA 0.1 0.4 V
PGOOD Threshold Output Threshold
Relative to VFB3
PGOOD3 High to Low
PGOOD3 Low to High
–14
–4
–12
–3
–10
–2
%
%
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4615 is tested under pulsed load conditions such that
TJ ≈ TA. The LTM4615E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4615I is guaranteed to meet specifications over the full
internal operating temperature range. Note that the maximum ambient
temperature is determined by specific operating conditions in conjunction
with board layout, the rated package thermal resistance and other
environmental factors.
Note 3: Minimum operating voltage required for regulation is:
VIN ≥ VOUT(MIN) + VDROPOUT
Note 4: Dropout voltage is the minimum input to output differential needed
to maintain regulation at a specified output current. In dropout the output
voltage will be equal to VIN – VDROPOUT
.
Note 5: The LTM4615 has overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 125°C when overtemperature is activated.
Continuous overtemperature activation can impair long-term reliability.
Note 6: See output current derating curves for different VIN, VOUT and TA.
LTM4615
5
4615fb
For more information www.linear.com/LTM4615
Typical perForMance characTerisTics
Efficiency vs Output Current
VIN = 2.5V
Efficiency vs Output Current
VIN = 3.3V
Efficiency vs Output Current
VIN = 5V
Minimum Input Voltage
at 4A Load Load Transient Response
OUTPUT CURRENT (A)
0
85
90
100
3
4615 G01
80
75
1 2 4
70
65
95
EFFICIENCY (%)
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 0.8V
OUTPUT CURRENT (A)
0
85
90
100
3
4615 G02
80
75
1 2 4
70
65
95
EFFICIENCY (%)
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 0.8V
ILOAD
2A/DIV
VOUT
20mV/DIV
VIN = 5V
VOUT = 1.2V
COUT = 100µF, 6.3V CERAMICS
20µs/DIV 4615 G05
Load Transient Response
ILOAD
2A/DIV
VOUT
20mV/DIV
VIN = 5V
VOUT = 1.5V
COUT = 100µF, 6.3V CERAMICS
20µs/DIV 4615 G06
Load Transient Response Load Transient ResponseLoad Transient Response
ILOAD
2A/DIV
VOUT
20mV/DIV
VIN = 5V
VOUT = 1.8V
COUT = 100µF, 6.3V CERAMICS
20µs/DIV 4615 G07
ILOAD
2A/DIV
VOUT
20mV/DIV
VIN = 5V
VOUT = 2.5V
COUT = 100µF, 6.3V CERAMICS
20µs/DIV 4615 G08
ILOAD
2A/DIV
VOUT
20mV/DIV
VIN = 5V
VOUT = 3.3V
COUT = 100µF, 6.3V CERAMICS
20µs/DIV 4615 G09
Switching Regulators
VIN (V)
0
0
VOUT (V)
0.5
1.5
2.0
2.5
3.5
0.5 2.5 3.5
4615 G04
1.0
3.0
24.5 5.55
11.5 3 4
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 0.8V
OUTPUT CURRENT (A)
0
65
EFFICIENCY (%)
70
75
80
85
90
95
1 2 3 4
4615 G03
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.8V
VOUT = 1.5V
VOUT = 1.2V
VOUT = 0.8V
LTM4615
6
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For more information www.linear.com/LTM4615
Typical perForMance characTerisTics
Start-Up Start-Up VFB vs Temperature
Current Limit
Short-Circuit Protection
1.5V Short, No Load
VFB3 vs Temperature Dropout Voltage vs Input Voltage Ripple Rejection
VOUT
1V/DIV
IIN
1A/DIV
VIN = 5V
VOUT = 2.5V
COUT = 100µF
NO LOAD
(0.01µF SOFT-START CAPACITOR)
200µs/DIV 4615 G10
VOUT
1V/DIV
IIN
1A/DIV
VIN = 5V
VOUT = 2.5V
COUT = 100µF
4A LOAD
(0.01µF SOFT-START CAPACITOR)
200µs/DIV 4615 G11
TEMPERATURE (°C)
–50
794
VFB (mV)
796
798
800
802
804
806
–25 500 25 12510075
4615 G12
OUTPUT CURRENT (A)
3
VOUT (V)
0.6
0.8
1.0
68
4615 G13
0.4
0.2
04 5 7
1.2
1.4
1.6
VIN = 5V
VIN = 3.3V
VIN = 2.5V
VOUT = 1.5V
Short-Circuit Protection
1.5V Short, 4A Load
VOUT
0.5V/DIV
IIN
1A/DIV
100µs/DIV 4615 G15
4615 G16
TEMPERATURE (°C)
–50 –25
404
403
402
401
400
399
398
397
396
75 1000 5025 125
FB3 VOLTAGE (mV)
1mA
1.5A
VBOOST3 = 5V
VLDO_IN = 1.5V
VLDO_OUT =1.2V
4615 G17
VLDO_IN (V)
1.2
200
180
160
140
120
100
80
60
40
20
02.2
1.4 1.6 1.8 2.42.0 2.6
DROPOUT (mV)
–40°C
25°C
85°C
125°C
VFB3 = 0.38V
ILDO_OUT =1.5A
4615 G18
VLDO_IN (V)
1.2
RIPPLE REJECTION (dB)
60
50
40
30
20
10
01.8 2.2
1.4 1.6 2.0 2.4 2.6
1MHz
100kHz
10kHz
VBOOST3 = 5V
VLDO_OUT =1.2V
IOUT = 800mA
COUT = 10µF
VLDO
VOUT
0.5V/DIV
IIN
1A/DIV
20µs/DIV 4615 G14
LTM4615
7
4615fb
For more information www.linear.com/LTM4615
Typical perForMance characTerisTics
Ripple Rejection Output Current Limit Delay from Enable to Power Good
4615 G19
FREQUENCY (Hz)
100
70
60
50
40
30
20
10
0
100000
1000 10000 1000000 1E+07
RIPPLE REJECTION (dB)
VBOOST3 = 5V
VLDO_IN = 1.5V
VLDO_OUT =1.2V
IOUT = 800mA
COUT = 10µF
4615 G20
VLDO_IN (V)
1.0
I
LDO_OUT
(A)
2.5 3.5
1.5 2.0 3.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
CURRENT LIMIT
THERMAL LIMIT
VLDO_OUT = 0V
TA = 25°C
4615 G21
VLDO_IN (V)
1.0
DELAY (ms)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
03.0
1.5 2.0 2.5 3.5
–40°C
25°C
85°C
VLDO_OUT = 0.8V
RLDO_OUT = 8Ω
Output Load Transient Response IN Supply Transient Response
4615 G22
ILDO_OUT
1.5A
2mA
VLDO_OUT
AC
20mV/DIV
50µs/DIV
VLDO_OUT = 1.5V
COUT = 10µF
VLDO_IN = 1.7V
VBOOST3 = 5V
4615 G23
VLDO_IN
2V
1.5V
VLDO_OUT
AC
10mV/DIV
10µs/DIV
VLDO_OUT = 1.2V
ILDO_OUT = 800mA
COUT = 10µF
VBOOST3 = 5V
TA = 25°C
BOOST3/OUT Start-Up
BOOST3 Ripple and Feedthrough to
VLDO_OUT
4615 G24
EN3
BOOST3
VLDO_OUT
HI
LO
200µs/DIV
TA = 25°C
RLDO_OUT = 1Ω
VLDO_IN = 1.7V
5V
1.5V
1V
0V 4615 G25
BOOST3
AC 20mV/DIV
VLDO_OUT
AC 5mV/DIV
20µs/DIV
VLDO_OUT = 1.2V
VLDO_IN = 1.5V
ILDO_OUT = 1A
COUT = 10µF
TA = 25°C
LTM4615
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pin FuncTions
VIN1, VIN2 (J1-J5, K1-K5); (C1-C6, D1-D5): Power Input
Pins. Apply input voltage between these pins and GND
pins. Recommend placing input decoupling capacitance
directly between VIN pins and GND pins.
VOUT1, VOUT2 (K9-K12, L9-L12, M9-M12); (C9-C12,
D9-D12, E11-E12): Power Output Pins. Apply output load
between these pins and GND pins. Recommend placing
output decoupling capacitance directly between these pins
and GND pins. Review Table 4.
GND1, GND2, (H1, H7-H12, J6-J12, K6-K8 L1, L7-L8,
M1-M8); (A1-A12, B1, B7-B12, C7-C8, D6-D8, E1,
E8-E10): Power Ground Pins for Both Input and Output
Returns.
TRACK1, TRACK2 (L3, E3): Output Voltage Tracking Pins.
When the module is configured as a master output, then a
soft-start capacitor is placed on the RUN/SS pin to ground
to control the master ramp rate, or an external ramp can
be applied to the master regulator’s track pin to control it.
Slave operation is performed by putting a resistor divider
from the master output to ground, and connecting the
center point of the divider to this pin on the slave regulator.
If tracking is not desired, then connect the TRACK pin to
VIN. Load current must be present for tracking. See the
Applications Information section.
FB1, FB2 (L6, E6): The Negative Input of the Switching
Regulators’ Error Amplifier. Internally, these pins are con-
nected to VOUT with a 4.99k precision resistor. Different
output voltages can be programmed with an additional
resistor between the FB and GND pins. Two power modules
can current share when this pin is connected in parallel
with the adjacent module’s FB pin. See the Applications
Information section.
FB3 (F6): The Negative Input of the LDO Error Amplifier.
Internally the pin is connected to LDO_OUT with a 4.99k
resistor. Different output voltages can be programmed with
an additional resistor between the FB3 and GND pins. See
the Applications Information section.
COMP1, COMP2 (L5, E5): Current Control Threshold
and Error Amplifier Compensation Point. The current
comparator threshold increases with this control voltage.
Two power modules can current share when this pin is
connected in parallel with the adjacent module’s COMP
pin. Each channel has been internally compensated. See
the Applications Information section.
PGOOD1, PGOOD2 (L4, E4): Output Voltage Power
Good Indicator. Open-drain logic output that is pulled to
ground when the output voltage is not within ±7.5% of
the regulation point.
RUN/SS1, RUN/SS2 (L2, E2): Run Control and Soft-Start
Pin. A voltage above 0.8V will turn on the module, and
below 0.5V will turn off the module. This pin has a 1M
resistor to VIN and a 1000pF capacitor to GND. See the
Applications Information section for soft-start information.
SW1, SW2 (H2-H6, B2-B6): The switching node of the
circuit is used for testing purposes. This can be connected
to copper on the board for improved thermal performance.
SW1 and SW2 must be floating on separate copper planes.
LDO_IN (G1-G4): VLDO Input Power Pins. Place input
capacitor close to these pins.
LDO_OUT (G9-G12): VLDO Output Power Pins. Place
output capacitor close to these pins. Minimum 1mA load
is necessary for proper output voltage accuracy.
BOOST3 (E7): Boost Supply for Driving the Internal VLDO
NMOS Into Full Enhancement. The pin is use for testing
the internal boost converter. The output is typically 5V.
GND3 (F1-F5, F7, F9-F12, G6-G8): The power ground pins
for both input and output returns for the internal VLDO.
PGOOD3 (G5): VLDO Power Good Pin.
EN3 (F8): VLDO Enable Pin.
LTM4615
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For more information www.linear.com/LTM4615
siMpliFieD block DiagraM
+
–
GND3 LDO_RHI
4.99k
GND3
GND3
GND
PGOOD3
4615 F01b
FB3
LDO_OUT
BOOST3
EN3
LDO_IN
0.4V
4.7µF
6.3V
VIN
1.14V TO 3.5V
GND3
1V
4.7µF
6.3V
GND3
4.7µF
CONTROL
ENABLE
10k
RFBLDO
3.32k
VOUT
1V
1.5A10µF
5V BOOST
POWER GOOD
10µF
Figure 1. Simplified LTM4615 Block Diagram of Each Switching Regulator Channel and the VLDO
Decoupling requireMenTs
TA = 25°C. Use Figure 1 configuration for each channel.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CIN External Input Capacitor Requirement
(VIN = 2.375V to 5.5V, VOUT = 1.5V)
IOUT = 4A 22 µF
COUT External Output Capacitor Requirement
(VIN = 2.375V to 5.5V, VOUT = 1.5V)
IOUT = 4A 66 100 µF
LDO_IN LDO Input Capacitance IOUT = 1A 4.7 10 µF
LDO_OUT LDO Output Capacitance IOUT = 1A 10 µF
VLDO Block Diagram
Switching Regulator Block Diagram
VIN
2.375V TO 5.5V
CSS
1000pF
CSSEXT
5.76k
RFB
5.76k
TRACK
SUPPLY
4.99k
470pF 4.7µF
6.3V
4.7µF
6.3V
22µF
6.3V
×3
VOUT
1.5V
4A
M1 0.47µH
M2
RSS
1M
PGOOD
RUN/SS
TRACK
COMP
FB SW
VOUT
VIN
GND
4615 F01a
RFBHI
4.99k
CONTROL, DRIVE
POWER FETS
INTERNAL
COMP
22µF
6.3V
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LTM4615 POWER MODULE DESCRIPTION
Dual Switching Regulator Section
The LTM4615 is a standalone dual nonisolated switching
mode DC/DC power supply with an additional onboard
1.5A VLDO. It can deliver up to 4A of DC output current
for each channel with few external input and output ca-
pacitors. This module provides two precisely regulated
output voltages programmable via one external resistor
for each channel from 0.8V DC to 5V DC over a 2.375V
to 5.5V input voltage range. The VLDO is an independent
1.5A linear regulator that can be powered from either
switching converter. The typical application schematic is
shown in Figure 12.
The LTM4615 has two integrated constant frequency cur-
rent mode regulators, with built-in power MOSFETs with
fast switching speed. The typical switching frequency is
1.25MHz. With current mode control and internal feedback
loop compensation, these switching regulators have suf-
ficient stability margins and good transient performance
under a wide range of operating conditions, and with a
wide range of output capacitors, even all ceramic output
capacitors.
Current mode control provides cycle-by-cycle fast current
limit. Besides, current limiting is provided in an overcur-
rent condition with thermal shutdown. In addition, internal
overvoltage and undervoltage comparators pull the open-
drain PGOOD outputs low if the particular output feedback
voltage exits a ±7.5% window around the regulation point.
Furthermore, in an overvoltage condition, internal top FET,
M1, is turned off and bottom FET, M2, is turned on and
held on until the overvoltage condition clears, or current
limit is exceeded.
Pulling each specific RUN/SS pin below 0.8V forces the
specific regulator controller into its shutdown state, turn-
ing off both M1 and M2 for each power stage. At low load
current, each regulator works in continuous current mode
by default to achieve minimum output voltage ripple.
The TRACK pins are used for power supply tracking for
each specific regulator. See the Applications Information
section.
The L
TM4615 is internally compensated to be stable over
the operating conditions. Table 4 provides a guideline
for input and output capacitance for several operating
conditions. The LTpowerCAD™ Design Tool is provided
for transient and stability analysis.
The FB pins are used to program the specific output volt-
age with a single resistor to ground.
VLDO Section
The VLDO (very low dropout) linear regulator operates
from a 1.14V to 3.5V input. The VLDO uses an internal
NMOS transistor as the pass device in a source-follower
configuration. The BOOST3 pin is the output of an inter-
nal boost converter that supplies the higher supply drive
to the pass device for low dropout enhancement. The
internal boost converter operates on very low current,
thus optimizing high efficiency for the VLDO in close to
dropout operation.
An undervoltage lockout comparator on the LDO ensures
that the boost voltage is greater than 4.2V before enabling
the LDO, otherwise the LDO is disabled.
The LDO provides a high accuracy output capable of supply
1.5A of output current with a typical drop out of 100mV.
A single ceramic 10µF capacitor is all that is required
for output capacitor bypassing. A low reference voltage
allows the VLDO to have lower output voltages than the
commonly available LDO.
The device also includes current limit and thermal over-
load protection. The NMOS follower architecture has fast
transient response without the traditional high drive cur-
rents in dropout. The VLDO includes a soft-start feature
to prevent excessive current on the input during start-up.
When the VLDO is enabled, the soft-start circuitry gradu-
ally increases the reference voltage from 0V to 0.4V over
a period of approximately 200µs.
LTM4615
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Dual Switching Regulator
The typical LTM4615 application circuit is shown in Fig-
ure 12. External component selection is primarily deter-
mined by the maximum load current and output voltage.
Refer to Table 4 for specific external capacitor requirements
for a particular application.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN to VOUT step-
down ratio that can be achieved for a given input voltage
on the two switching regulators. The LTM4615 is 100%
duty cycle, but the VIN to VOUT minimum dropout will be
a function the load current. A typical 0.5V minimum is
sufficient.
Output Voltage Programming
Each regulator channel has an internal 0.8V reference
voltage. As shown in the block diagram, a 4.99k internal
feedback resistor connects the VOUT and FB pins together.
The output voltage will default to 0.8V with no feedback
resistor. Adding a resistor RFB from the FB pin to GND
programs the output voltage:
VOUT =0.8V •
4.99k
+
R
FB
R
FB
or equivalently,
RFB =
VOUT
−1
Table 1. FB Resistor Table vs Various Output Voltages
VOUT 0.8V 1.2V 1.5V 1.8V 2.5V 3.3V
FB Open 10k 5.76k 3.92k 2.37k 1.62k
Input Capacitors
The LTM4615 module should be connected to a low AC
impedance DC source. One 4.7µF ceramic capacitor is
included inside the module for each regulator channel.
Additional input capacitors are needed if a large load step
is required, up to the full 4A level, and for RMS ripple
current requirements. A 47µF bulk capacitor can be used
for more input capacitance. This 47µF capacitor is only
needed if the input source impedance is compromised by
long inductive leads or traces. The bulk capacitor can be
a switcher-rated aluminum electrolytic OS-CON capacitor.
For a buck converter, the switching duty cycle can be
estimated as:
D=
V
OUT
V
IN
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
ICIN(RMS) =
I
OUT(MAX)
η%•D•1– D
( )
In the above equation, η% is the estimated efficiency of
the power module. If a low inductance plane is used to
power the device, then no input capacitance is required. The
internal 4.7µF ceramics on each channel input are typically
rated for 1A of RMS ripple current up to 85°C operation.
The worse-case ripple current for the 4A maximum current
is 2A or less. An additional 10µF or 22µF ceramic capacitor
can be used to supplement the internal capacitor with an
additional 1A to 2A ripple current rating.
Output Capacitors
The LTM4615 switchers are designed for low output volt-
age ripple on each channel. The bulk output capacitors
are chosen with low enough effective series resistance
(ESR) to meet the output voltage ripple and transient
requirements. The output capacitors can be a low ESR
tantalum capacitor, low ESR polymer capacitor or ceramic
capacitor. The typical output capacitance range is 66µF
to 100µF. Additional output filtering may be required by
the system designer if further reduction of output ripple
or dynamic transient spikes is required. Table 4 shows a
matrix of different output voltages and output capacitors
to minimize the voltage droop and overshoot during a 2A/
µs transient. The table optimizes total equivalent ESR and
total bulk capacitance to maximize transient performance.
LTM4615
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Fault Conditions: Current Limit and Overtemperature
Protection
The LTM4615 has current mode control, which inher-
ently limits the cycle-by-cycle inductor current not only
in steady-state operation, but also in transient.
Along with current limiting in the event of an overload
condition, the LTM4615 has overtemperature shutdown
protection that inhibits switching operation around 150°C
for each channel.
Run Enable and Soft-Start
The RUN/SS pins provide a dual function of enable and
soft-start control for each channel. The RUN/SS pins are
used to control turn on of the LTM4615. While each enable
pin is below 0.5V, the LTM4615 will be in a low quiescent
current state. At least a 0.8V level applied to the enable
pins will turn on the LTM4615 regulators. This pin can be
used to sequence the regulator channels. The soft-start
control is provided by a 1M pull-up resistor (RSS) and a
1000pF capacitor (CSS) as drawn in the block diagram
for each channel. An external capacitor can be applied to
the RUN/SS pin to increase the soft-start time. A typical
value is 0.01µF. The approximate equation for soft-start:
tSOFTSTART =In VIN
V
IN
– 1.8V
⎛
⎝
⎜⎞
⎠
⎟•RSS •CSS
where RSS and CSS are shown in the block diagram of
Figure 1, and the 1.8V is soft-start upper range. The soft-
start function can also be used to control the output ramp-up
time, so that another regulator can be easily tracked to it.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK pins. Either output can be tracked up
or down with another regulator. The master regulator’s
output is divided down with an external resistor divider
that is the same as the slave regulator’s feedback divider
to implement coincident tracking. The LTM4615 uses a
very accurate 4.99k resistor for the internal top feedback
resistor. Figure 2 shows an example of coincident tracking.
Equations:
TRACK1=RFB1
4.99k +RFB1
⎛
⎝
⎜⎞
⎠
⎟•Master
Slave =1+4.99k
R
FB1
⎛
⎝
⎜⎞
⎠
⎟•TRACK1
PGOOD1
PGOOD1
FB1
COMP1
TRACK1
RUN/SS1
LDO_IN
EN3
BOOST3
GND1 GND2
LTM4615
GND3
VIN1 VIN2
VOUT1
1.5V
1.2V
VIN 3V TO 5.5V
RFB1
10k
R3
10k
C4
22µF
6.3V
C5
22µF
6.3V
C7
22µF
6.3V
C6
22µF
6.3V
C8
22µF
6.3V
C11
10µF
6.3V C13
CSSEXT
C9
22µF
6.3V
C3
22µF
6.3V
C12
10µF
C1
10µF
6.3V
C2
10µF
6.3V
C10
22µF
6.3V L1 0.2µH*
SLAVE
1.2V
4A
MASTER
1.5V
4A
PGOOD2
PGOOD2
FB2
COMP2
TRACK2 VIN OR A CONTROL RAMP
RUN/SS2
LDO_OUT
FB3
PGOOD3 PGOOD3
VOUT2
RTA
10k
*FAIR-RITE 0805 2508056007Y6
OPTIONAL FILTER
RTB
4.99k RFB2
5.76k
R6
10k
4615 F02
1V
LOW NOISE
1V LOW NOISE AT 1A
R5
3.32k
R4
10k
Figure 2. Dual Outputs (1.5V and 1.2V) with Tracking
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TRACK1 is the track ramp applied to the slave’s track pin.
TRACK1 applies the track reference for the slave output up
to the point of the programmed value at which TRACK1
proceeds beyond the 0.8V reference value. The TRACK1
pin must go beyond the 0.8V to ensure the slave output
has reached its final value.
Ratiometric tracking can be achieved by a few simple
calculations and the slew rate value applied to the master’s
TRACK pin. As mentioned above, the TRACK pin has a
control range from 0V to 0.8V. The control ramp slew rate
applied to the master’s TRACK pin is directly equal to the
master’s output slew rate in Volts/Time.
The equation:
MR
SR
•4.99k =RTB
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus RTB
is equal to 4.99k. RTA is derived from equation:
RTA =
0.8V
VFB
4.99k +VFB
R
FB
–VTRACK
R
TB
where VFB is the feedback voltage reference of the regula-
tor, and VTRACK is 0.8V. Since RTB is equal to the 4.99k top
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then RTA is equal to RFB with VFB =
VTRACK. Therefore RTB = 4.99k and RTA = 10k in Figure 2.
Figure 3. Output Voltage Coincident Tracking
Figure 3 shows the output voltage tracking waveform for
coincident tracking.
In ratiometric tracking, a different slew rate maybe desired
for the slave regulator. RTB can be solved for when SR is
slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
For example, MR = 2.5V/ms and SR = 1.8V/1ms. Then
RTB = 6.98k. Solve for RTA to equal to 3.24k. The master
output must be greater than the slave output for the
tracking to work. Output load current must be present
for tracking to operate properly during power-down.
Power Good
PGOOD1 and PGOOD2 are open-drain pins that can be
used to monitor valid output voltage regulation. These
pins monitor a ±7.5% window around the regulation point.
If the output is disabled, the respective pin will go low.
COMP Pin
This pin is the external compensation pin. The module
has already been internally compensated for all output
voltages. Table 4 is provided for most application require-
ments. The LTpowerCAD Design Tool is provided for other
control loop optimization. The COMP pins must be tied
together in parallel operation.
Parallel Switching Regulator Operation
The LTM4615 switching regulators are inherently current
mode control. Paralleling will have very good current shar-
ing. This will balance the thermals on the design. Figure
13 shows a schematic of a parallel design. The voltage
feedback equation changes with the variable N as chan-
nels are paralleled.
The equation:
VOUT =0.8V •
4.99k
N+RFB
R
FB
N is the number of paralleled channels.
OUTPUT VOLTAGE (V)
TIME
MASTER OUTPUT
SLAVE OUTPUT
4615 F03
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VLDO SECTION
Adjustable Output Voltage
The output voltage is set by the ratio of two resistors. A
4.99k resistor is built onboard the module from LDO_OUT
to FB3. An additional resistor (RFBLDO)is required from FB3
to GND3 to set the output voltage over a range of 0.4V to
2.6V. Minimum output current of 1mA is required for full
output voltage range.
The equation:
VLDO_OUT =0.4V •
4.99k
+
R
FBLDO
RFBLDO
or equivalently,
RFBLDO =4.99k
VLDO_OUT
0.4V
−1
Power Good Operation
The VLDO includes an open-drain power good (PGOOD3)
pin with hysteresis. If the VLDO is in shutdown or under
UVLO conditions (BOOST3 < 4.2V), then PGOOD3 is low
impedance to ground. PGOOD3 becomes high imped-
ance when the VLDO output voltage rises to 93% of its
regulated voltage. PGOOD3 stays high impedance until
the output voltage falls to 91% of its regulated voltage. A
pull-up resistor can be inserted between the PGOOD3 pin
and a positive logic supply such as the VLDO output or
VIN. LDO_IN should be at least 1.14V or greater for power
good to operate properly.
Output Capacitance and Transient Response
The VLDO is designed to be stable with a wide range of
ceramic output capacitors. The ESR of the output capaci-
tors affects stability, especially smaller value capacitors. An
output capacitor of 10µF or greater with an ESR of 0.05Ω
or less is recommended to ensure stability. Larger value
capacitors can be used to reduce the transient deviations
under load changes. Bypass capacitors that are used at
the load device can also increase the effective output
capacitance. High ESR tantalum or electrolytic bulk ca-
pacitance can be used, but a ceramic capacitor must be
used in parallel at the output.
Extra consideration should be given to the use of ceramic
capacitors related to dielectrics, temperature and DC bias
effects on the capacitor. The VLDO requires a minimum
10µF value. The X7R and X5R dielectrics are more stable
with DC bias and temperature, thus more preferred.
Short-Circuit/Thermal Protection
The VLDO has built-in short-circuit current limiting of
~3A as well as overtemperature protection. During short-
circuit conditions the device is in control to 3A, and as
the internal temperature rises to approximately 150°C,
then the internal boost and LDO are shut down until the
internal temperature drops back to 140°C. The device will
cycle in and out of this mode with no latchup or damage.
Long term over stress in this condition can degrade the
device over time.
Reverse Current Protection
The VLDO features reverse current protection to limit
current draw from any supplementary power source at
the output. Figure 4 shows the reverse input current limit
versus input voltage for a nominal VLDO_OUT setpoint of
1.5V. Note: Positive input current represents current flow-
ing into the LDO_IN pin. With LDO_OUT held at or below
the output regulation voltage and LDO_IN varied, input
current flow will follow the Figure 4 curve. Input reverse
current ramps up to 16µA as LDO_IN approaches LDO_OUT.
Figure 4. Reverse Current Limit for VLDO
LDO_IN VOLTAGE (V)
LDO_IN CURRENT (µA)
4615 F04
30
20
10
0
–10
–20
–30 00.6 0.9 1.2
0.3 1.5 1.8
IN CURRENT
LIMIT ABOVE 1.45V
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Reverse input current will spike up as LDO_IN gets to
within about 30mV of LDO_OUT as reverse current protec-
tion circuitry is disabled and normal operation resumes.
As LDO_IN transitions above LDO_OUT the reverse current
transitions into short circuit current as long as LDO_OUT
is held below the regulation voltage.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 5 and 6 can be used
in coordination with the load current derating curves in
Figures 7 to 10 for calculating an approximate θJA thermal
resistance for the LTM4615 with various heat sinking and
airflow conditions. Both of the LTM4615 outputs are at full
4A load current, and the power loss curves in Figures 5
and 6 are combined power losses plotted for both output
voltages up to 4A each. The VLDO regulator is set to have
a power dissipation of 0.5W since it is generally used with
dropout voltages of 0.5V or less. For example: 1.2V to 1V,
1.5V to 1V, 1.5V to 1.2V and 1.8V to 1.5V. Other dropout
voltages can be supported at VLDO maximum load, but
further thermal analysis will be required for the VLDO.
The 4A output voltages are 1.2V and 3.3V. These voltages
are chosen to include the lower and higher output voltage
ranges for correlating the thermal resistance. Thermal
models are derived from several temperature measure-
ments in a controlled temperature chamber along with
thermal modeling analysis. The junction temperatures are
monitored while ambient temperature is increased with and
without airflow. The junctions are maintained at ~120°C
Figure 5. 1.2V Power Loss Figure 6. 3.3V Power Loss
while lowering output current or power with increasing
ambient temperature. The 120°C value is chosen to allow
for a 5°C margin window relative to the maximum 125°C
limit. The decreased output current will decrease the inter-
nal module loss as ambient temperature is increased. The
power loss curves in Figures 5 and 6 show this amount of
power loss as a function of load current that is specified
for both channels. The monitored junction temperature of
120°C minus the ambient operating temperature specifies
how much module temperature rise can be allowed. As
an example, in Figure 7 the load current is derated to 3A
for each channel with 0LFM at ~90°C and the power loss
for both channels at 5V to 1.2V at 3A output is ~1.4W.
Add the VDLO power loss of 0.5W to equal 1.9W. If the
90°C ambient temperature is subtracted from the 120°C
maximum junction temperature, then the difference of 30°C
divided by 1.9W equals a 15.7°C/W thermal resistance.
Table 2 specifies a 15°C/W value which is very close. Table
2 and Table 3 provide equivalent thermal resistances for
1.2V and 3.3V outputs with and without air flow and heat
sinking. The combined power loss for the two 4A outputs
plus the VLDO power loss can be summed together and
multiplied by the thermal resistance values in Tables 2 and
3 for module temperature rise under the specified condi-
tions. The printed circuit board is a 1.6mm thick four layer
board with two ounce copper for the two outer layers and 1
ounce copper for the two inner layers. The PCB dimensions
are 95mm × 76mm. The BGA heat sinks are listed below
Table 3. The data sheet lists the θJC (Junction to Case)
thermal resistances under the Pin Configuration diagram.
LOAD CURRENT (A)
0
POWER LOSS (W)
1.0
1.5
4
4615 F05
0.5
0123
2.5
2.0
VIN = 5V
LOAD CURRENT (A)
0
0
POWER LOSS (W)
0.5
1.0
1.5
2.0
2.5
3.0
1 2 3 4
4615 F06
VIN = 5V
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Figure 7. 1.2V No Heat Sink Figure 8. 1.2V Heat Sink
Figure 9. 3.3V No Heat Sink Figure 10. 3.3V Heat Sink
AMBIENT TEMPERATURE (°C)
40
0
LOAD CURRENT (A)
0.5
1.5
2.0
2.5
4.5
4615 F07
1.0
70
50 100
80
60 110
90 120
3.0
3.5
4.0
0LFM NO HEATSINK
200LFM NO HEATSINK
400LFM NO HEATSINK
VIN = 5V
AMBIENT TEMPERATURE (°C)
40
0
LOAD CURRENT (A)
0.5
1.5
2.0
2.5
90
4.5
4615 F08
1.0
70
50 100
80
60 110 120
3.0
3.5
4.0
0LFM HEATSINK
200LFM HEATSINK
400LFM HEATSINK
VIN = 5V
AMBIENT TEMPERATURE (°C)
40
0
LOAD CURRENT (A)
0.5
1.5
2.0
2.5
90
4.5
4615 F09
1.0
70
50 100
80
60 110 120
3.0
3.5
4.0
0LFM NO HEATSINK
200LFM NO HEATSINK
400LFM NO HEATSINK
VIN = 5V
AMBIENT TEMPERATURE (°C)
40
0
LOAD CURRENT (A)
0.5
1.5
2.0
2.5
90
4.5
4615 F10
1.0
70
50 100
80
60 110 120
3.0
3.5
4.0
0LFM HEATSINK
200LFM HEATSINK
400LFM HEATSINK
VIN = 5V
LTM4615
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HEAT SINK MANUFACTURER PART NUMBER WEBSITE
Aavid 375424B00034G www.aavid.com
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Table 2. 1.2V Output
DERATING CURVE VIN (V) POWER LOSS CURVE AIRFLOW (LFM) HEAT SINK θJA (°C/W)
Figure 7 5 Figure 5 0 None 15
Figure 7 5 Figure 5 200 None 12
Figure 7 5 Figure 5 400 None 10
Figure 8 5 Figure 5 0 BGA Heat Sink 14
Figure 8 5 Figure 5 200 BGA Heat Sink 9
Figure 8 5 Figure 5 400 BGA Heat Sink 8
Table 3. 3.3V Output
DERATING CURVE VIN (V) POWER LOSS CURVE AIRFLOW (LFM) HEAT SINK θJA (°C/W)
Figure 9 5 Figure 6 0 None 15
Figure 9 5 Figure 6 200 None 12
Figure 9 5 Figure 6 400 None 10
Figure 10 5 Figure 6 0 BGA Heat Sink 14
Figure 10 5 Figure 6 200 BGA Heat Sink 9
Figure 10 5 Figure 6 400 BGA Heat Sink 8
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Safety Considerations
The LTM4615 modules do not provide galvanic isolation
from VIN to VOUT
. There is no internal fuse. If required,
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure.
Layout Checklist/Example
The high integration of LTM4615 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path,
including VIN, GND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Placehighfrequencyceramicinputandoutputcapaci-
tors next to the VIN, GND and VOUT pins to minimize
high frequency noise.
• Placeadedicatedpowergroundlayerunderneaththe
unit.
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between the top layer and other power layers.
• Donotputviadirectlyonpadsunlesstheviaiscapped.
Figure 11 gives a good example of the recommended layout.
M
CIN1
GND1 CONTROL
GND2 SW2
GND1
VIN1
GND1
SW1
CONTROL
LD0_IN
GND3
GND2
GND2 GND2
GND3
GND1
LDO_OUT
VOUT2
VOUT1
VIN2
GND2 4615 F11
VOUT1
L
K
J
H
G
F
E
D
C
B
A
1 2 3 4 5 6 7 8 9 10 11 12
CIN3
COUT4 COUT5
COUT1 COUT2
COUT3
CIN2
Figure 11. Recommended PCB Layout
LTM4615
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For more information www.linear.com/LTM4615
applicaTions inForMaTion
PGOOD1
PGOOD1
FB1
COMP1
TRACK1
RUN/SS1
LDO_IN
EN3
BOOST3
GND1 GND2
LTM4615
GND3
VIN1 VIN2
VOUT1
VIN
1.2V
VIN 3V TO 5.5V
RFB1
10k
R3
10k
22µF
6.3V
22µF
6.3V
COUT2
100µF
6.3V
C11
10µF
6.3V
COUT1
22µF
6.3V
22µF
6.3V
C12
10µF
CIN1
10µF
6.3V
CIN2
10µF
6.3V
100µF
6.3V
VOUT1
1.2V
4A
L1 0.2µH*
PGOOD2
PGOOD2
FB2
COMP2
TRACK2 VIN
RUN/SS2
LDO_OUT
FB3
PGOOD3 PGOOD3
VOUT2
*FAIR-RITE 0805 2508056007Y6
IF MORE FILTERING REQUIRED
RFB2
5.76k
R6
10k
4615 F12
VOUT3
VOUT3
1V LOW NOISE AT 1A
R5
3.32k
R4
10k
VOUT2
1.5V
4A
Figure 12. Typical 3V to 5.5VIN, 1.5V and 1.2V at 4A and 1V at 1A Design
Table 4. Output Voltage Response vs Component Matrix (Refer to Figure 12) 0A to 2.5A Load Step Typical Measured Values
COUT1 AND COUT2
CERAMIC VENDORS VALUE PART NUMBER
COUT1 AND COUT2
BULK VENDORS VALUE PART NUMBER
TDK 22µF 6.3V C3216X7SOJ226M Sanyo POSCAP 150µF 10V 10TPD150M
Murata 22µF 16V GRM31CR61C226KE15L Sanyo POSCAP 220µF 4V 4TPE220MF
TDK 100µF 6.3V C4532X5R0J107MZ CIN BULK VENDORS VALUE PART NUMBER
Murata 100µF 6.3V GRM32ER60J107M Sanyo POSCAP 100µF 10V 10CE100FH
VOUT
(V)
CIN
(CERAMIC)
CIN
(BULK)*
COUT1 AND COUT2
(CER) EACH
COUT1 AND COUT2
(POSCAP) EACH
ITH
VIN
(V)
DROOP
(mV)
PEAK-TO-PEAK
DEVIATION
RECOVERY
TIME (µs)
LOAD STEP
(A/µs)
RFB
(kΩ)
1.2 10µF ×2100µF 100µF, 22µF ×2None None 5 33 68 11 2.5 10
1.2 10µF ×2100µF 22µF ×1220µF None 5 25 50 9 2.5 10
1.2 10µF ×2100µF 100µF, 22µF ×2None None 3.3 33 68 8 2.5 10
1.2 10µF ×2100µF 22µF ×1220µF None 3.3 25 50 10 2.5 10
1.5 10µF ×2100µF 100µF, 22µF ×2None None 5 30 60 11 2.5 5.76
1.5 10µF ×2100µF 22µF ×1220µF None 5 28 60 11 2.5 5.76
1.5 10µF ×2100µF 100µF, 22µF ×2None None 3.3 30 60 10 2.5 5.76
1.5 10µF ×2100µF 22µF ×1220µF None 3.3 27 56 10 2.5 5.76
1.8 10µF ×2100µF 100µF, 22µF ×2None None 5 34 68 12 2.5 3.92
1.8 10µF ×2100µF 22µF ×1220µF None 5 30 60 12 2.5 3.92
1.8 10µF ×2100µF 22µF ×1220µF None 3.3 30 60 12 2.5 3.92
2.5 10µF ×2None 22µF ×1None None 5 50 90 10 2.5 2.37
2.5 10µF ×2100µF 22µF ×1150µF None 5 33 60 10 2.5 2.37
2.5 10µF ×2100µF 22µF ×1150µF None 3.3 50 95 12 2.5 2.37
3.3 10µF ×2100µF 22µF ×1150µF None 5 50 90 12 2.5 1.62
*Bulk capacitance is optional if VIN has very low input impedance.
LTM4615
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For more information www.linear.com/LTM4615
applicaTions inForMaTion
PGOOD1
PGOOD1
FB1
COMP1
TRACK1
RUN/SS1RUN/SS2
COMP2
LDO_IN
EN3
BOOST3
GND1 GND2
LTM4615
GND3
VIN1 VIN2
VOUT1
VIN
1.2V
VIN 3V TO 5.5V
R1
4.99k
R3
10k
C6
100µF
6.3V
C11
10µF
6.3V C13
0.01µF
C12
10µF
C1
10µF
6.3V
C2
10µF
6.3V
L1*
0.2µH
1.2V
FB2
VOUT2
1.2V
8A
PGOOD2 PGOOD1
FB2
COMP2
TRACK2 VIN
FB2
COMP2
RUN/SS2
LDO_OUT
FB3
PGOOD3 PGOOD3
VOUT2
*FAIR-RITE 0805 2508056007Y6
IF MORE FILTERING REQUIRED
R6
10k
4615 F13
1V
LOW NOISE
VOUT3 1V LOW NOISE AT 1A
R5
3.32k
C5
100µF
6.3V
Figure 13. LTM4615 Parallel 1.2V at 8A Design, 1V at 1A Design
Figure 14. 3.3V and 2.5V at 4A with Output Voltage Tracking Design, 1.8V at 1A
PGOOD1
PGOOD1
FB1
COMP1
TRACK1
RUN/SS1
LDO_IN
EN3
BOOST3
GND1 GND2
LTM4615
GND3
VIN1 VIN2
VOUT1
3.3V
2.5V
VIN 5V
RFB1
2.37k
C4
22µF
6.3V
C5
22µF
6.3V
C6
22µF
6.3V
C11
10µF
6.3V
C9
22µF
6.3V
C3
22µF
6.3V
C12
10µF
C1
10µF
6.3V
C1
10µF
6.3V
VOUT1
2.5V
4A
SLAVE VOUT2
3.3V
4A
R4
10k
MASTER
PGOOD2
FB2
COMP2
TRACK2 VIN OR A CONTROL RAMP
RUN/SS2
LDO_OUT
FB3
PGOOD3 PGOOD3
VOUT2
RTA
2.37k
RTB
4.99k
R3
10k
RFB2
1.62k
R6
10k
4615 F14
1.8V
VOUT3 1.8V AT 1A
R5
1.43k
PGOOD2
LTM4615
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For more information www.linear.com/LTM4615
package DescripTion
LGA Package
144-Lead (15mm × 15mm × 2.82mm)
(Reference LTC DWG # 05-08-1816 Rev C)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
BALL DESIGNATION PER JESD MS-028 AND JEP95
4
3
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
PACKAGE TOP VIEW
4
PIN “A1”
CORNER
X
Y
aaa Z
aaa Z
PACKAGE BOTTOM VIEW
3
SEE NOTES
SUGGESTED PCB LAYOUT
TOP VIEW
LGA 144 1112 REV C
LTMXXXXXX
µModule
TRAY PIN 1
BEVEL
PACKAGE IN TRAY LOADING ORIENTATION
COMPONENT
PIN “A1”
0.0000
0.0000
D
Eb
e
e
b
F
G
0.6350
0.6350
1.9050
1.9050
3.1750
3.1750
4.4450
4.4450
5.7150
5.7150
6.9850
6.9850
6.9850
5.7150
5.7150
4.4450
4.4450
3.1750
3.1750
1.9050
1.9050
0.6350
0.6350
6.9850
DETAIL B
PACKAGE SIDE VIEW
bbb Z
SYMBOL
A
b
D
E
e
F
G
H1
H2
aaa
bbb
eee
MIN
2.72
0.60
0.27
2.45
NOM
2.82
0.63
15.00
15.00
1.27
13.97
13.97
0.32
2.50
MAX
2.92
0.66
0.37
2.55
0.15
0.10
0.05
NOTES
DIMENSIONS
TOTAL NUMBER OF LGA PADS: 144
DETAIL B
SUBSTRATE
MOLD
CAP
Z
H2
H1
A
DIA 0.630
PAD 1
3x, C (0.22 x45°)
DETAIL A
0.630 ±0.025 SQ. 143x
SYXeee
DETAIL A
F
G
H
M
L
J
K
E
A
B
C
D
2 14 356712 891011
7
SEE NOTES
7 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
!
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 144
LTM4615
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For more information www.linear.com/LTM4615
package DescripTion
LTM4615 Component LGA Pinout
PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION
A1 GND2 B1 GND2 C1 VIN2 D1 VIN2 E1 GND2 F1 GND3
A2 GND2 B2 SW2 C2 VIN2 D2 VIN2 E2 RUN/SS2 F2 GND3
A3 GND2 B3 SW2 C3 VIN2 D3 VIN2 E3 TRACK2 F3 GND3
A4 GND2 B4 SW2 C4 VIN2 D4 VIN2 E4 PGOOD2 F4 GND3
A5 GND2 B5 SW2 C5 VIN2 D5 VIN2 E5 COMP2 F5 GND3
A6 GND2 B6 SW2 C6 VIN2 D6 GND2 E6 FB2 F6 FB3
A7 GND2 B7 GND2 C7 GND2 D7 GND2 E7 BOOST3 F7 GND3
A8 GND2 B8 GND2 C8 GND2 D8 GND2 E8 GND2 F8 EN3
A9 GND2 B9 GND2 C9 VOUT2 D9 VOUT2 E9 GND2 F9 GND3
A10 GND2 B10 GND2 C10 VOUT2 D10 VOUT2 E10 GND2 F10 GND3
A11 GND2 B11 GND2 C11 VOUT2 D11 VOUT2 E11 VOUT2 F11 GND3
A12 GND2 B12 GND2 C12 VOUT2 D12 VOUT2 E12 VOUT2 F12 GND3
PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION
G1 LDO_IN H1 GND1 J1 VIN1 K1 VIN1 L1 GND1 M1 GND1
G2 LDO_IN H2 SW1 J2 VIN1 K2 VIN1 L2 RUN/SS1 M2 GND1
G3 LDO_IN H3 SW1 J3 VIN1 K3 VIN1 L3 TRACK1 M3 GND1
G4 LDO_IN H4 SW1 J4 VIN1 K4 VIN1 L4 PGOOD1 M4 GND1
G5 PGOOD3 H5 SW1 J5 VIN1 K5 VIN1 L5 COMP1 M5 GND1
G6 GND3 H6 SW1 J6 GND1 K6 GND1 L6 FB1 M6 GND1
G7 GND3 H7 GND1 J7 GND1 K7 GND1 L7 GND1 M7 GND1
G8 GND3 H8 GND1 J8 GND1 K8 GND1 L8 GND1 M8 GND1
G9 LDO_OUT H9 GND1 J9 GND1 K9 VOUT1 L9 VOUT1 M9 VOUT1
G10 LDO_OUT H10 GND1 J10 GND1 K10 VOUT1 L10 VOUT1 M10 VOUT1
G11 LDO_OUT H11 GND1 J11 GND1 K11 VOUT1 L11 VOUT1 M11 VOUT1
G12 LDO_OUT H12 GND1 J12 GND1 K12 VOUT1 L12 VOUT1 M12 VOUT1
LTM4615
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For more information www.linear.com/LTM4615
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
A 01/12 Added pin functions to the Pin Configuration diagram. Updated EN3 in the Absolute Maximum Ratings section.
Corrected the VOUT accuracy limit.
Clarified the SW1 and SW2 electrical connections.
Added the internal power inductor value to the Block Diagram.
Clarified the PGOOD behavior.
Clarified the reverse current protection behavior.
Added the suggested heat sink.
2
8
9
13
14
17
B 07/13 Changed “Overcurrent Foldback” to “Overtemperature” 12
LTM4615
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For more information www.linear.com/LTM4615
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2009
LT 0713 REV B • PRINTED IN USA
relaTeD parTs
package phoTograph
PART NUMBER DESCRIPTION COMMENTS
LTM4628 26V, Dual 8A, DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 26.5V, 0.6V ≤ VOUT ≤ 5V, Remote Sense Amplifier, Internal
Temperature Sensing Output, 15mm × 15mm × 4.32mm LGA
LTM4627 20V, 15A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking,
Remote Sense Amplifier, 15mm × 15mm × 4.32mm LGA
LTM4611 1.5VIN(MIN), 15A DC/DC Step-Down μModule
Regulator
1.5V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Amplifier,
VOUT Tracking, 15mm × 15mm × 4.32mm LGA
LTM4618 6A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 26.5V, 0.8V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking,
9mm × 15mm × 4.32mm LGA
LTM4613 8A EN55022 Class B DC/DC Step-Down μModule
Regulator
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, PLL Input, VOUT Tracking and Margining,
15mm × 15mm × 4.32mm LGA
LTM4601AHV 28V, 12A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 28V, 0.6V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Amplifier,
VOUT Tracking and Margining, 15mm × 15mm × 2.8mm LGA or
15mm × 15mm × 3.42mm BGA
LTM4601A 20V
, 12A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Amplifier,
VOUT Tracking and Margining, 15mm × 15mm × 2.8mm LGA or
15mm × 15mm × 3.42mm BGA
LTM8027 60V
, 4A DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 60V, 2.5V ≤ VOUT ≤ 24V, CLK Input, 15mm × 15mm × 4.32mm LGA
LTM8033 36V, 3A EN55022 Class B DC/DC Step-Down
μModule Regulator
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, Synchronizable,
11.25mm × 15mm × 4.32mm LGA
LTM8061 32V
, 2A Step-Down μModule Battery Charger with
Programmable Input Current Limit
Compatible with Single Cell or Dual Cell Li-Ion or Li-Poly Battery Stacks
(4.1V, 4.2V, 8.2V, or 8.4V), 4.95V ≤ VIN ≤ 32V, C/10 or Adjustable Timer Charge
Termination, NTC Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA