S-35710M
www.ablicinc.com
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE
BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
© ABLIC Inc., 2017 Rev.1.1_01
1
The convenience timer is a CMOS timer IC which operates with low current consumption, and is suitable for the time
management of the relative time.
The S-35710M compares the timer value and the value written to the internal register, and outputs an interrupt signal when
the values match each other.
The timer is a 24-bit binary-up counter.
The internal register data can be set freely by users via a 2-wire serial interface. Consequently, the time before the occurrence
of an interrupt signal can be set freely.
Since the S-35710M has a built-in quartz crystal, a matching assessment of the IC and the quartz crystal is unnecessary.
Moreover, the number of external parts can also be reduced.
Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product in the
purpose, contact to ABLIC Inc. is indispensable.
Features
• Built-in 32.768 kHz quartz crystal
• Alarm interrupt function: Settable on the second time scale from 1 second to 194 days
(Approximately half a year)
• Low current consumption: 0.25 μA typ. (VDD = 3.0 V, Ta = +25°C)
• Wide range of operation voltage: 1.8 V to 5.5 V
• 2-wire (I2C-bus) CPU interface
• Operation temperature range: Ta = −40°C to +125°C
• Lead-free (Sn 100%), halogen-free
• AEC-Q100/Q200 qualified*1
*1. Contact our sales office for details.
Application
• Time management of various systems during the sleep period
Package
• HSOP-8Q
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FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
2
Block Diagram
RST
SD
A
SC
L
VDD
VSS
INT
Oscillation
circuit
32.768 kHz
Quartz crystal
D
ivider,
Timing generator
Pull-up
Power-on
detection
circuit
Constant
voltage
circuit
Chattering
elimination
circuit
Internal reset signal
INT pin
controller
Wake-up time
register
Comparator
Timer (24-bit)
Time register
Serial interface
Figure 1
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
3
AEC-Q100/Q200 Qualified
This IC supports AEC-Q100/Q200 for operation temperature grade 1.
Contact our sales office for details of AEC-Q100/Q200 reliability specification.
Product Name Structure
1. Product name
S-35710M 01 A - E8T3 U
Environmental code
U: Lead-free (Sn 100%), halogen-free
Product name
Operation temperature
A: Ta = −40°C to +125°C
Package abbreviation and IC packing specification*1
E8T3: HSOP-8Q, Ta
p
e
Option code
*1. Refer to the tape drawing.
2. Package
Table 1 Package Drawing Codes
Package Name Dimension Tape Reel Land
HSOP-8Q FU008-A-P-SD FU008-A-C-SD FU008-A-R-SD FU008-A-L-SD
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
4
Pin Configuration
1. HSOP-8Q
8
5
6
7
1
4
3
2
Bottom view
Top view
1
4
3
2
8
5
6
7
*1
Figure 2
Table 2 List of Pins
Pin No. Symbol Description I/O Configuration
1 SCL Input pin for
serial clock Input CMOS input
2 VDD Pin for positive
power supply − −
3 RST
_______
Input pin for
reset signal Input CMOS input
(With pull-up resistor)
4 NC*2 No connection − −
5 NC*2 No connection − −
6 VSS GND pin − −
7 INT Output pin for
interrupt signal Output CMOS output
8 SDA I/O pin for serial
data Bi-directional Nch open-drain output,
CMOS input
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential GND.
However, do not use it as the function of electrode.
*2. The NC pin is electrically open.
Therefore, leave it open or connect it to the VDD pin or the VSS pin.
Caution Do not place a wiring on the backside of the package.
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
5
Pin Functions
1. SDA (I/O for serial data) pin
This is a data input / output pin for I2C-bus interface. The SDA pin inputs / outputs data by synchronizing with a clock
pulse from the SCL pin. This pin has CMOS input and Nch open-drain output. Generally in use, the SDA pin is pulled
up to VDD potential via a resistor, and is used with wired-OR connection of other device of Nch open-drain output or
open collector output.
2. SCL (Input for serial clock) pin
This is a clock input pin for I2C-bus interface. The SDA pin inputs / outputs data by synchronizing with this clock pulse.
3. RST
_______
(Input for reset signal) pin
This pin inputs the reset signal. The timer is reset when inputting "L" to the RST
_______
pin. The INT pin is set to "H" when
inputting "H" to the RST
_______
pin, and the timer starts the operation. The RST
_______
pin has a built-in chattering elimination
circuit. Regarding the chatterging elimination circuit, refer to " RST
_______
Pin".
Also, the RST
_______
pin has a pull-up resistor.
4. INT (Output for interrupt signal) pin
This pin outputs an interrupt signal. The interrupt signal is output when the time written to the wake-up time register
comes. Regarding the operation of the interrupt signal output, refer to " INT Pin Interrupt Signal Output".
Also, the INT pin output form is CMOS output.
5. VDD (Positive power supply) pin
Connect this pin with a positive power supply. Regarding the values of voltage to be applied, refer to
" Recommended Operation Conditions".
6. VSS pin
Connect this pin to GND.
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S-35710M Rev.1.1_01
6
Equivalent Circuits of Pins
SCL
Figure 3 SCL Pin
SDA
Figure 4 SDA Pin
RST
_
_____
_
Figure 5 RST
_______
Pin
INT
Figure 6 INT Pin
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
7
Absolute Maximum Ratings
Table 3
Item Symbol Applied Pin Absolute Maximum Rating Unit
Power supply voltage VDD − V
SS − 0.3 to VSS + 6.5 V
Input voltage VIN SDA, SCL VSS − 0.3 to VSS + 6.5 V
RST
_
_____
_
VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.5 V
Output voltage VOUT SDA VSS − 0.3 to VSS + 6.5 V
INT VSS − 0.3 to VDD + 0.3 ≤ VSS + 6.5 V
Operation ambient temperature*1 To
pr
− −40 to +125 °C
Storage temperature Tst
g
− −55 to +125 °C
*1. Conditions with no condensation or frost. Condensation or frost causes short-circuiting between pins, resulting in a
malfunction.
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Recommended Operation Conditions
Table 4
(VSS = 0 V)
Item Symbol Condition Min. Typ. Max. Unit
Operation power supply voltage VDD Ta = −40°C to +125°C 1.8 − 5.5 V
Oscillation Characteristics
Table 5
(Ta = +25°C, VDD = 3.0 V, VSS = 0 V unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Oscillation start voltage VSTA Within 10 seconds 1.8 − 5.5 V
Oscillation start time tSTA − − − 1 s
Frequency deviation Δf/f Ta = −40°C to +125°C −1 − +1 %
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
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DC Electrical Characteristics
Table 6
(Ta = −40°C to +125°C, VSS = 0 V unless otherwise specified)
Item Symbol Applied Pin Condition Min. Typ. Max. Unit
Current
consumption 1 IDD1 −
VDD = 3.0 V,
Ta = −40°C to +85°C,
Out of communication,
RST
_______
pin = VDD,
INT pin = no load
− 0.25
0.5 μA
VDD = 3.0 V,
Ta = +125°C,
Out of communication,
RST
_______
pin = VDD,
INT pin = no load
− 0.75
1.2 μA
Current
consumption 2 IDD2 −
VDD = 3.0 V,
fSCL = 1 MHz,
During communication,
RST
_______
pin = VDD,
INT pin = no load
− 170 300 μA
High level input
leakage current IIZH SDA, SCL, RST
_______
V
IN = VDD −0.5 − 0.5 μA
Low level input
leakage current IIZL SDA, SCL VIN = VSS −0.5 − 0.5 μA
High level output
leakage current IOZH SDA VOUT = VDD −0.5 − 0.5 μA
Low level output
leakage current IOZL SDA VOUT = VSS −0.5 − 0.5 μA
High level input
voltage VIH SDA, SCL, RST
_______
− 0.7 × VDD − V
SS + 5.5 V
Low level input
voltage VIL SDA, SCL, RST
_______
− V
SS − 0.3 − 0.3 × VDD V
High level output
voltage VOH INT IOH = −0.4 mA 0.8 × VDD − − V
Low level output
voltage VOL SDA, INT IOL = 2.0 mA − − 0.4 V
Low level input
current IIL RST
_______
VDD = 3.0 V,
VIN = VSS −100 −30 −5 μA
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
9
AC Electrical Characteristics
Table 7 Measurement Conditions
0.8 × VDD
Input pulse voltage Output reference voltage
0.2 × VDD
0.7 × VDD
0.3 × VDD
Figure 7 Input / Output Waveform during AC Measurement
Input pulse voltage VIH = 0.8 × VDD,
VIL = 0.2 × VDD
Input pulse rise / fall time 20 ns
Output reference voltage VOH = 0.7 × VDD,
VOL = 0.3 × VDD
Output load 100 pF
Table 8 AC Electrical Characteristics
(Ta = −40°C to +125°C)
Item Symbol VDD = 1.8 V to 2.5 V VDD = 2.5 V to 5.5 V Unit
Min. Max. Min. Max.
SCL clock frequency fSCL 0 400 0 1000 kHz
SCL clock "L" time tLOW 1.3 − 0.4 − μs
SCL clock "H" time tHIGH 0.6 − 0.3 − μs
SDA output delay time*1 tAA − 0.9 − 0.5 μs
Start condition set-up time tSU.STA 0.6 − 0.25 − μs
Start condition hold time tHD.STA 0.6 − 0.25 − μs
Data input set-up time tSU.DAT 100 − 80 − ns
Data input hold time tHD.DAT 0 − 0 − ns
Stop condition set-up time tSU.STO 0.6 − 0.25 − μs
SCL, SDA rise time tR − 0.3 − 0.3 μs
SCL, SDA fall time tF − 0.3 − 0.3 μs
Bus release time tBUF 1.3 − 0.5 − μs
Noise suppression time tl− 50 − 50 ns
*1. Since the output form of the SDA pin is Nch open-drain output, the SDA output delay time is determined by the values of
the load resistance and load capacitance outside the IC. Figure 9 shows the relationship between the output load
values.
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
10
SCL
SDA
(S-35710M input)
SDA
(S-35710M output)
tBUF
tR
tSU.STO
tSU.DAT
tHD.DAT
tAA
tHIGH tLOW
tHD.STA
tSU.STA
tF
Figure 8 Bus Timing
1
3
5
7
9
11
13
15
Load capacitance [pF]
Maximum pull-up resistance [k]
10
fSCL = 1.0 MHz
fSCL = 400 kHz
100 1000
Figure 9 Output Load
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Rev.1.1_01 S-35710M
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INT Pin Interrupt Signal Output
After the RST
_______
pin changes from "L" to "H", the timer starts the operation. Then, the INT pin outputs "H" level when the
timer value matches the value written to the wake-up time register. When the INT pin outputs "H" level, the timer stops and
maintains the timer value.
The timer is reset by inputting "L" to the RST
_______
pin. After that, if "H" is input to the RST
_______
pin, the INT pin is set to "L" and the
timer restarts the count-up action.
1. Write mode
If write operation is performed to the wake-up time register during the count-up action, the action will be restarted after
resetting the timer. This operation is called "write mode". Before the timer value matches the value written to the
wake-up time register, if "L" is input to the RST
_______
pin, the timer is reset.
RST
INT
2 s 1 s
"0 h""0 h"
"1 h""2 h""1 h""2 h""0 h""1 h""0 h"
"000000 h""000001 h""000002 h"
"000000 h"
Timer
Wake-up time
register
Timer and wake-up time register
are reset
Timer and wake-up time register
are reset
Count-up action
starts
Count-up action
starts
Timer is reset
and count-up action
restarts
Timer is reset
and the count-up
actionrestarts
Count-up action
stops
Count-up action
stops
Figure 10 Output Timing of Handshake Time-out
2. Read mode
After the timer starts to operate, if write operation is not performed to the wake-up time register, the interrupt signal is
not output from the INT pin. The timer stops at "FFFFFF h". The timer value during timing can be confirmed by reading
the time register. This operation is called "read mode".
In order for the timer to operate again, set the RST
_______
pin from "L" to "H" or perform write operation to the wake-up time
register. Regarding the detail when write operation is not performed to the wake-up time register, refer to Figure 11.
Regarding the status transition for the S-35710M, refer to Figure 12.
RST
Timer
Wake-up time
register
INT
"0 h""0 h"
"1 h""2 h""FFFFFE h""FFFFFF h""1 h""2 h""0 h"
"1 h"
"FFFFFE h""FFFFFF h"
"000000 h"
Timer and wake-up time register
are reset
Timer reset Timer reset
Count-up action starts Count-up action starts Count-up action starts
Count-up action
stops
Count-up action
stops
No INT pin interrupt signal output when not writting to
wake-up time register
Figure 11 When Write Operation is not Performed to the Wake-up Time Register
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
12
Timing status
INT
p
in = "L"
Timing stop status
INT
p
in = "L"
Timing status
INT
p
in = "L"
Timing stop status
INT
p
in = "H"
Initial status
Wake-up time register = "0 h"
Timer = "0 h"
INT pin = "L"
Timer reset
Timer = "0 h"
INT pin = "L"
Read mode
Write
Write
Write
Read
Read
Read
Power-on
RST pin = "L"
RST pin = "H"
Count up every
second
RST pin = "L"
RST pin = "L"
RST pin = "L"
Write
Read
Timer = "FFFFFF h"
Timer
= Wake-up time register
A
utomatic
migration
Count up every
second
Timer reset
Wake-up time register = "0 h"
Timer = "0 h"
INT pin = "H"
Write mode
RST pin = "H"
Read
Write
RST pin = "L"
Remark Write: Wake-up time register write command
Read: Time register read command
Write
Figure 12 Status Transition Diagram for S-35710M
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Rev.1.1_01 S-35710M
13
Configuration of Registers
1. Time register
The time register is a 3-byte register that stores the timer value in the binary code.
The time register is read-only.
Perform the read operation of the time register in 3-byte unit from TM23 to TM0.
Example: 3 seconds (0000_0000_0000_0000_0000_0011)
45 minutes (0000_0000_0000_1010_1000_1100)
5 hours 30 minutes (0000_0000_0100_1101_0101_1000)
TM0
TM1
TM2
TM3
TM4
TM5TM6
TM7
B7 B0
TM8
TM9
TM10TM11
TM12
TM13TM14TM15
B7 B0
TM16
TM17
TM18TM19TM20TM21TM22
TM23
B7 B0
Figure 13
2. Wake-up time register
The wake-up time register is a 3-byte register that stores the wake-up time of the microcontroller in the binary code.
The wake-up time register is possible for write and read.
Perform the write and read operation of the wake-up time register in 3-byte unit from WU23 to WU0.
When performing the read operation of the wake-up time register, set the RST
_______
pin to "H". If the RST
_______
pin is set to "L",
the time register data is read.
WU0
WU1
WU2
WU3
WU4
WU5WU6
WU7
B7 B0
WU8
WU9
WU10WU11
WU12
WU13WU14WU15
B7 B0
WU16
WU17
WU18WU19WU20WU21WU22
WU23
B7 B0
Figure 14
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S-35710M Rev.1.1_01
14
Serial Interface
The S-35710M transmits and receives various commands via I2C-bus serial interface to read / write data.
1. Start condition
When SDA changes from "H" to "L" with SCL at "H", the S-35710M recognizes start condition and the access operation
is started.
2. Stop condition
When SDA changes from "L" to "H" with SCL at "H", the S-35710M recognizes stop condition and the access operation
is completed. The S-35710M enters standby mode, consequently.
t
SU.STA
t
HD.STA
t
SU.STO
Start condition Stop condition
SDA
SCL
Figure 15 Start / Stop Condition
3. Data transmission and acknowledge
The data transmission is performed at every 1 byte after the start condition detection. Pay attention to the specification
of tSU.DAT and tHD.DAT when changing SDA, and perform the operation when SCL is "L". If SDA changes when SCL is
"H", the start / stop condition is recognized even during the data transmission, and the access operation will be
interrupted.
Whenever a 1-byte data is received during data transimmion, the receiving device returns an acknowledge. For
example, as shown in Figure 16, assume that the S-35710M is a receiving device, and the master device is a
transmitting device. If the clock pulse at the 8th bit falls, the master device releases SDA. Consequently, the
S-35710M, as an acknowledge, sets SDA to "L" during the 9th bit pulse. The access operation is not performed
properly when the S-35710M does not output an acknowledge.
tHD.DAT
tSU.DAT
1 8 9
Acknowledge output
(Active "L")
tAA
Start condition
SCL
(S-35710M input)
SDA
(Master device output)
SDA
(S-35710M output)
High-Z
Release SDA
High-Z
Figure 16 Acknowledge Output Timing
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Rev.1.1_01 S-35710M
15
4. Data transmission format
After the start condition transmission, the 1st byte is a slave address and a command (read / write bit) that shows the
transmission direction of the data at the 2nd byte or subsequent bytes.
The slave address of the S-35710M is specified to "0110010". The data can be written to the wake-up time register
when read / write bit is "0", and the data of the wake-up time register or the time register can be read when read / write
bit is "1".
When the data can be written to the wake-up time register, input the data from the master device in order of B7 to B0.
The acknowledge ("L") is output from the S-35710M whenever a 1-byte data is input.
When the data of the wake-up time register or the time register can be read, the data from the S-35710M is output in
order of B7 to B0 in byte unit. Input the acknowledge ("L") from the master device whenever a 1-byte data is input.
However, do not input the acknowledge for the last data byte (NO_ACK). By this, the end of the data read is informed.
After the master device receives / transmits the acknowledge for the last data byte, input the stop condition to the
S-35710M to finish the access operation.
When the master device inputs start condition without inputting stop condition at this time, the S-35710M becomes
restart condition, and can transmit / receive the data continuously if the master device inputs the slave address
continuously.
A
: Master device input data
: S-35710M output data
Slave address
Slave address
Slave address
Data Data Data Data
A
A
A
A
0
B7 B1 B7 B0 B7 B0 B7 B0 B7 B0
SPST
A
Data Data Data
A
A
A
1
B7 B0 B7 B0 B7 B0
A
Data Data Data Data
A
A
A
A
0
B7 B0 B7 B0 B7 B0 B7 B0
A
Slave address Data Data Data
A
A
A
1
B7 B1 R/W B7 B0 B7 B0 B7 B0
SP ST
ST
ST
B7 B1
B7 B1
SP
A
:
Start condition
: Acknowledge
A A
: Stop condition
ST SP
R/W
R/W
R/W
1918 27 36 45
Data write
format
Data read
f
ormat
Restart format
SCL
SD
A
SD
A
SD
A
Figure 17 Data Transmission Format of Serial Interface
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
16
5. Read operation of time register
Transmit the start condition and slave address from the master device. The slave address of the S-35710M is
specified to "0110010". Next, the data of the time register can be read when the read / write bit is "1".
The 2nd byte to the 4th byte are used as the time register. Each byte from B7 is transmitted.
When the read operation of the time register is finished, transmit "1" (NO_ACK) to the acknowledge after B0 is output
from the master device, and then transmit the stop condition.
The time register is a 3-byte register. "1" is read if the read operation is performed continuously after reading 3 bytes of
the time register. Regarding the time register, refer to " Configuration of Registers".
ACK
TM23
TM22
TM21
TM20
TM19
TM18
TM17
TM16
TM15
TM13
TM12
TM11
TM10
TM9
TM8
TM7
TM14
TM6
TM5
TM4
TM3
TM2
TM1
TM0
1 189 27 36
0
Slave address
(0110010)
Take in the counter value at this timing and transmit it as a serial data.
Input NO_ACK after the 3rd byte data is transmitted.
Time register (3-byte)
: Master device input data
: S-35710M output data
START
11
B7
001 10
B1 R/W
A
C
K
A
C
K
NO_ACK
STOP
B7 B0 B7 B7B0 B0
SCL
SDA
Figure 18 Read Timing of Time Register
6. Write operation of wake-up time register
Transmit the start condition and slave address from the master device. The slave address of the S-35710M is
specified to "0110010". Next, transmit "0" to the read / write bit.
Transmit the 2nd byte data. Set B7 to "1" since it is an address pointer. Set B6 to B1 to "0" or "1" since they are dummy
data. Make sure to set B0 to "1" since it is a test bit.
The 3rd byte to the 5th byte are used as the wake-up time register.
Transmit the stop condition from the master device to finish the access operation.
Regarding the wake-up time register, refer to " Configuration of Registers".
Write operation of the wake-up time register is performed each byte, so transmit the data in 3-byte unit. Note that the
S-35710M may not operate as desired if the the data is not transmitted in 3-byte unit.
1 9 18 27 36 45
SCL
WU[7:0]
Write timing
WU[15:8]
Write timing
WU[23:16]
Write timing
10
ACK
ACK
START
ACK
ACK
ACK
STOP
WU23
WU22
WU21
WU20
WU19
WU18
WU17
WU16
0100110
B1
R/W
B7 B0B7 B0B7 B0B7 B0B7
1
WU15
WU14
WU13
WU12
WU11
WU10
WU9
WU8
WU7
WU6
WU5
WU4
WU3
WU2
WU1
WU0
SDA
Wake-up time register (3-byte)Dummy data
*1
Slave address
(0110010) Make sure to set B0 to "1" since it is a test bit.
Set B7 as an address pointer.
*1. Set B6 to B1 to "0" or "1" since they are dummy data.
: S-35710M output data
: Master device input data
Figure 19 Write Timing of Wake-up Time Register
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Rev.1.1_01 S-35710M
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7. Read operation of wake-up time register
Perform the read operation of the wake-up time register with the restart format. Regarding the restart format, refer to
"4. Data transmission format".
When performing the read operation of the wake-up time register, set the RST
_______
pin to "H". If the RST
_______
pin is set to "L",
the time register data is read.
Transmit the start condition and the slave address from the master device. The slave address of the S-35710M is
specified to "0110010". Next, transmit "0" to the read / write bit.
B7 in the 2nd byte is an address pointer. Set B7 to "0" when reading the wake-up time register. Next, transmit the
dummy data to B6 to B1. Make sure to set B0 to "1" since it is a test bit. This processing is called "dummy write".
Then transmit the start condition, the slave address and the read / write bit. The data of the wake-up time register can
be read when the read / write bit is set to "1".
Consequently, the data of the wake-up time register is output from the S-35710M. Each byte from B7 is transmitted.
When the read operation of the wake-up time register is finished, transmit "1" (NO_ACK) to the acknowledge after B0
output from the master device, and then transmit the stop condition.
The wake-up time register is a 3-byte register. "1" is read if the read operation is performed continuously after reading
3 bytes of the wake-up time register.
Regarding the wake-up time register, refer to " Configuration of Registers".
Moreover, the internal address pointer is reset if recognizing the stop condition. Therefore, do not transmit the stop
condition after dummy write operation. The time register is read if performing the read operation of the register after
transmitting the stop condition.
19 181 9 18 27 36
SCL
1
ACK
ACK
START
ACK
ACK
NO_ACK
STOP
WU23
WU22
WU21
WU20
WU19
WU18
WU17
WU16
0100110
B1B7 B0B7 B0B7 B0B7
WU15
WU14
WU13
WU12
WU11
WU10
WU9
WU8
WU7
WU6
WU5
WU4
WU3
WU2
WU1
WU0
SDA
Wake-up time register (3-byte)
0
B0B7
Dummy data*1
Dummy write
Slave address
(0110010)
1
ACK
START
0100110
B1
R/W
0
R/W
B7
Slave address
(0110010)
Make sure to set B0 to "1" since it is a test bit.
Input NO_ACKafter
the 3rd byte transmission.
Set B7 as an address pointer.
*1. Set B6 to B1 to "0" or "1" since they are dummy data.
: S-35710M output data
: Master device input data
Figure 20 Read Timing of Wake-up Time Register
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
18
Release of SDA
The RST
_______
pin of the S-35710M does not perform the reset operation of the communication interface. Therefore, the
stop condition is input to reset the internal interface circuit usually.
However, the S-35710M does not accept the stop condition from the master device when in the status that SDA outputs
"L" (at the time of acknowledge outputting or reading). Consequently, it is necessary to finish the acknowledge output or
read operation. Figure 21 shows the SDA release method.
First, input the start condition from the master device (since SDA of the S-35710M outputs "L", the S-35710M can not
detect the start condition). Next, input the clocks for 1-byte data access (9 clocks) from SCL. During the time, release
SDA of the master device. By this, the SDA input / output before communication interrupt is completed, and SDA of the
S-35710M becomes release status. Continuously, if the stop condition is input, the internal circuit resets and the
communication returns to normal status.
It is strongly recommended that the SDA release method is performed at the time of system initialization after the power
supply voltage of the master device is raised.
12 8 9
SCL
SDA
(S-35710M output) "L" or High-Z
"L" High-Z
"L" or High-Z
Start condition Clocks for 1-byte data access Stop condition
SDA
(Master device output)
"L"
SDA
Figure 21 SDA Release Method
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
19
Power-on Detection Circuit
In order for the power-on detection circuit to operate normally, raise the power supply voltage of the IC from 0.2 V or lower
so that it reaches 1.8 V of the operation power supply voltage minimum value within 10 ms, as shown in Figure 22.
Within 10 ms
1.8 V
(Operation power
supply voltage min.)
0 V
*1
0.2 V or lower
*1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35710M.
Figure 22 How to Raise Power Supply Voltage
If the power supply voltage of the S-35710M cannot be raised under the above conditions, the power-on detection circuit
may not operate normally and an oscillation may not start. In such case, perform the operations shown in "1. When
power supply voltage is raised at RST
_______
pin = "L" " and "2. When power supply voltage is raised at RST
_______
pin =
"H" ".
1. When power supply voltage is raised at RST
_______
pin = "L"
Set the RST
_______
pin to "L" until the power supply voltage reaches 1.8 V or higher. While the RST
_______
pin is set to "L", the
oscillation start signal becomes "H", and the crystal oscillation circuit normally oscillates. If the RST
_______
pin is set to "H"
after the power supply voltage reaches 1.8 V, the oscillation start signal becomes "L" within 500 ms, and the
oscillation status is maintained.
The current consumption increases while the RST
_______
pin is set to "L" (30 μA typ.).
0.2 V or lower
0 V*1
RST pin input
Oscillation start signal
Oscillation circuit output
10 ms
Oscillation start signal "H" "L"
within 500 ms
1.8 V
(Operation power supply voltage min.)
*1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35710M.
Figure 23 When Power Supply Voltage is Raised at RST
_______
Pin = "L"
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
20
2. When power supply voltage is raised at RST
_______
pin = "H"
Set the RST
_______
pin to "L" after the power supply voltage reaches 1.8 V or higher. If the RST
_______
pin is set to "L" for 500 ms
or longer, the oscillation start signal becomes "H", and the crystal oscillation circuit normally oscillates. After that, if the
RST
_______
pin is set to "H", the oscillation start signal becomes "L" within 500 ms, and the oscillation status is maintained.
The current consumption increases while the RST
_______
pin is set to "L" (30 μA typ.).
10 ms
0V
*1
1.8 V
0.2 V or lower
RST pin input
Oscillation start signal
Oscillation circuit output
(Operation power supply voltage min.)
Oscillation start signal
"H" "L"
within 500 ms
*1. 0 V means that there is no potential difference between the VDD pin and the VSS pin of the S-35710M.
Figure 24 When Power Supply Voltage is Raised at RST
_______
Pin = "H"
The RST
_______
pin has a built-in chattering elimination circuit. To determine the RST
_______
pin "H" input, perform communication
subsequent to setting the interval of 3.5 periods (0.438 seconds) of clock (8 Hz) or longer after the RST
_______
pin changes
from "L" to "H".
Regarding the chattering elimination of the RST
_______
pin, refer to " RST
_______
Pin".
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
21
RST
________
Pin
1. Chattering elimination
The RST
_______
pin has a built-in chattering elimination circuit, and the output logic is active "L".
Figure 25 is a timing chart of chattering elimination. Perform sampling at 8 Hz and operate the shift register circuit.
Perform the shift operation for 3 times, and reset the counter when DF1 to DF3 are all "L". During the charttering
elimination, the pulse width, 2 periods (approximately 0.25 seconds) of clock (8 Hz), can be eliminated. To determine
the RST
_______
pin "L" input, maintain the RST
_______
pin "L" input during the period longer than 3.5 periods (0.438 seconds) of
clock (8 Hz). Similarly, to determine the RST
_______
pin "H" input, maintain the RST
_______
pin "H" input during the period longer
than 3.5 periods (0.438 seconds) of clock (8 Hz).
Clock (8 Hz)
Chattering elimination width
RST
_
_______
pin input signal
Shift register_DF1
Shift register_DF2
Shift register_DF3
Reset signal afte
r
chattering elimination
2 periods
3.5 periods
Counter reset
Count-up action starts
3.5 periods
Figure 25 Timing Chart of Chattering Elimination
2. Operation at power-on
At power-on, the reset signal after chattering elimination is "L" regardless of the RST
_______
pin status. Consequently, the
S-35710M becomes initial status (Refer to "Figure 12 Status Transition Diagram for S-35710M") and can not
perform write operation to the wake-up time register. When the reset signal after chattering elimination is "L", the no
acknowledge is output in the 2nd or subserquent bytes if write operation is performed to the wake-up time register.
If the crystal oscillation circuit starts to oscillate after power-on, the clock operates and the reset signal after chattering
elimination becomes "H", the S-35710M then migrates to read mode. This makes the write operation to the wake-up
time register possible. Figure 26 shows the timing chart at power-on.
The write-disable time period of the wake-up time register showed in Figure 26 changes according to the oscillation
start time. If the no acknowledge is output from the S-35710M at the time of write operation to the wake-up time
register immediately after power-on, it is recommended to set a time interval of approximately 0.5 seconds to 1 second
for the next communication until the oscillation is stabilized.
Clock (8 Hz)
Write-disable time period of wake-up time register
RST pin input signal
Shift register_DF1
Shift register_DF2
Shift register_DF3
Reset signal afte
r
chattering elimination
VDD
Migrate to read mode
Figure 26 Timing Chart at Power-on
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
22
Example of Application Circuit
VIN VOUT
VSS
S-19xxx
VR
VDD
VSS
SCL
SDA
RST
INT
S-35710M
VCC
VSS
V
CC
12 V CPU
1 k
1 k
Figure 27
Caution 1. Start communication under stable condition after turnig on the system power supply.
2. The above connection diagrams do not guarantee operation. Set the constants after performing
sufficient evaluation using the actual application.
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
Rev.1.1_01 S-35710M
23
Precautions
• Do not apply excessive impact or vibration since this IC has a built-in quartz crystal. Also, do not locate a device
which generates high level of electronic noise near this IC.
• Depending on the device, the usage condition and other reasons, the built-in quartz crystal may be damaged due to
the impact or vibration at the time of board splitting and mounting. Perform thorough evaluation with the actual
application.
• The built-in quartz crystal may be damaged due to the resonance when executing the ultrasonic cleaning. Therefore,
the operation of the IC is not guaranteed if the ultrasonic cleaning is executed.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
FOR AUTOMOTIVE 125°C OPERATION 2-WIRE BUILT-IN QUARTZ CRYSTAL CONVENIENCE TIMER
S-35710M Rev.1.1_01
24
Characteristics (Typical Data)
1. Current consumption 1 vs.
Power supply voltage characteristics
2. Current consumption 2
vs.
SCL frequency characteristics
Ta = +25°C Ta = +25°C
6
0.0
1.0
0.8
0.6
0.4
0.2
420
IDD1 [A]
VDD
[V]
1500
0
600
10005000
I
DD2
[A]
SCL frequency [kHz]
300
200
100
400
500 V
DD
= 5.0 V
V
DD
= 3.0 V
3. Current consumption 1 vs.
Temperature characteristics
4.
Oscillation frequency
vs.
Power supply voltage characteristics
Ta = +25°C
0.8
40 25 0 25 50 75 100 125
Ta [C]
0.0
I
DD1
[A]
0.6
0.4
0.2
V
DD
= 5.0 V
V
DD
= 3.0 V
6
10
30
20
10
0
420
f/f [ppm]
VDD
[V]
5. Oscillation frequency vs. Temperature characteristics
6. Low level output current
vs. Output voltage characteristics
INT pin, SDA pin, Ta = +25°C
50
40 25 0 25 50 75 100 125
450
50
150
250
350
f/f [ppm]
Ta [C]
0
100
200
300
400
6
0
70
420
IOL [mA]
VOUT
[V]
60
50
40
30
20
10
VDD = 5.0 V
VDD = 3.0 V
7. High level output current vs. V
DD
−
V
OUT
characteristics
8. Low level input current vs. Power supply voltage characteristics
INT pin, Ta = +25°C RST
_
_____
_
pin, Ta = +25°C
6
25
0
420
IOH [mA]
VDD VOUT
[V]
5
10
15
20
VDD = 3.0 V
VDD = 5.0 V
60
0
420
I
IL
[A]
30
40
50
20
10
V
DD
[V]
6
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
No. FU008-A-P-SD-1.0
mm
HSOP8Q-A-PKG Dimensions
FU008-A-P-SD-1.0
0.42±0.05
1.27
5.02±0.2
14
85 14
85
3.0
0.22±0.05
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
5
8
1
4
ø2.0±0.05
ø1.5 0.3±0.05
2.1±0.1
8.0±0.1
6.7±0.1
2.0±0.05
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
HSOP8Q-A-Carrier Tape
No. FU008-A-C-SD-1.0
FU008-A-C-SD-1.0
+0.1
-0.0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
QTY. 4,000
HSOP8Q-A-Reel
No. FU008-A-R-SD-1.0
FU008-A-R-SD-1.0
60°
2±0.5
ø13±0.2
ø21±0.8
Enlarged drawing in the central part
13.4±1.0
17.4±1.0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
HSOP8Q-A
-Land Recommendation
FU008-A-L-SD-1.0
1.27
0.76
1.27 1.27
3.2
No. FU008-A-L-SD-1.0
Disclaimers (Handling Precautions)
1. All the information described herein
(product data,
specifications,
figures,
tables,
programs,
algorithms and application
circuit examples,
etc.)
is current as of publishing date of this document and is subject to change without notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein
(hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use
of the information described herein.
3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein.
4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings,
operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the
products outside their specified ranges.
5. When using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass
destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to
develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do
not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc.
Especially, the products cannot be used for life support devices, devices implanted in the human body and devices
that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products.
9. Semiconductor products may fail or malfunction with some probability.
The user of the products should therefore take responsibility to give thorough consideration to safety design including
redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or
death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any
part of this document described herein for the purpose of disclosing it to a third-party without the express permission
of ABLIC Inc. is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
2.2-2018.06
www.ablic.com
