LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 LM4923 1.1 Watt Fully Differential Audio Power Amplifier With Shutdown Select Check for Samples: LM4923, LM4923LQBD FEATURES DESCRIPTION * * * * * The LM4923 is a fully differential audio power amplifier primarily designed for demanding applications in mobile phones and other portable communication device applications. It is capable of delivering 1.1 watt of continuous average power to an 8 BTL load with less than 1% distortion (THD+N) from a 5VDC power supply. 1 2 * * Fully Differential Amplification Available in Space-saving WQFN Package Ultra Low Current Shutdown Mode Can Drive Capacitive Loads up to 100pF Improved Pop & Click Circuitry Eliminates Noises During Turn-on and Turn-off Transitions 2.4 - 5.5V Operation No Output Coupling Capacitors, Snubber Networks or Bootstrap Capacitors Required APPLICATIONS * * * Mobile Phones PDAs Portable Electronic Devices Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. The LM4923 does not require output coupling capacitors or bootstrap capacitors, and therefore is ideally suited for mobile phone and other low voltage applications where minimal power consumption is a primary requirement. KEY SPECIFICATIONS The LM4923 features a low-power consumption shutdown mode. To facilitate this, Shutdown may be enabled by logic low. Additionally, the LM4923 features an internal thermal shutdown protection mechanism. * * * The LM4923 contains advanced pop & click circuitry which eliminates noises which would otherwise occur during turn-on and turn-off transitions. * Improved PSRR at 217Hz 85dB(typ) Power Output at 5.0V @ 1% THD+N 1.1W(typ) Power Output at 3.3V @ 1% THD+N 400mW(typ) Shutdown Current 0.1A(typ) Connection Diagrams IN- IN+ VO- GND 8 7 1 6 2 5 3 4 VDD VO+ IN- VO- IN+ GND VDD BYP VO+ SD BYP SD Figure 1. NGP Package, Top View See Package Number NGP0008A Figure 2. 8 Pin VSSOP Package, Top View See Package Number DGK0008A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Typical Application VDD CS 1 PF RF1 20 k: R i1 20 k: + -IN - Differential Input + SD 1.0 PF + Differential Input Ri2 20 k: RF2 20 k: CB Bias VO+ RL Common Mode 8: - BYP VO- + +IN GND Figure 3. Typical Audio Amplifier Application Circuit These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V -65C to +150C Storage Temperature -0.3V to VDD +0.3V Input Voltage (3) Internally Limited ESD Susceptibility (4) 2000V Power Dissipation ESD Susceptibility (5) 200V Junction Temperature 150C Thermal Resistance JA (WQFN) 140C/W JA (DGK) 210C/W JC (DGK) 56C/W Soldering Information See AN-1187 (SNOA401) (1) (2) (3) (4) (5) 2 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / JA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4923, see power derating curve for additional information. Human body model, 100pF discharged through a 1.5k resistor. Machine Model, 220pF - 240pF discharged through all pins. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 Operating Ratings Temperature Range TMIN TA TMAX -40C TA 85C 2.4V VDD 5.5V Supply Voltage Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 3 LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Electrical Characteristics VDD = 5V (1) (2) The following specifications apply for VDD = 5V, AV = 1, and 8 load unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter LM4923 Conditions Typical (3) Limit (4) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, no load VIN = 0V, RL = 8 4 4 9 9 mA (max) ISD Shutdown Current VSHUTDOWN = GND 0.1 1 A (max) Po Output Power THD = 1% (max); f = 1 kHz LM4923, RL = 8 1.1 1 THD+N Total Harmonic Distortion+Noise Po = 0.4 Wrms; f = 1kHz 0.02 PSRR Power Supply Rejection Ratio Vripple = 200mV sine p-p % f = 217Hz (5) 85 73 f = 1kHz (5) 85 73 CMRR Common_Mode Rejection Ratio f = 217Hz, VCM = 200mVpp VOS Output Offset VIN = 0V VSDIH Shutdown Voltage Input High VSDIL Shutdown Voltage Input Low 0.7 V (1) (2) (3) (4) (5) 4 50 dB 4 mV 0.9 V All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25C and represent the parametric norm. Datasheet min/max specification limits are specified by design, test, or statistical analysis. 10 terminated input. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 Electrical Characteristics VDD = 3V (1) (2) The following specifications apply for VDD = 3V, AV = 1, and 8 load unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions LM4923 Typical (3) Limit (4) Units (Limits) IDD Quiescent Power Supply Current VIN = 0V, no load VIN = 0V, RL = 8 3 3 5.5 5.5 mA (max) ISD Shutdown Current VSHUTDOWN = GND 0.1 1 A (max) Po Output Power THD = 1% (max); f = 1kHz LM4923, RL = 8 0.375 W THD+N Total Harmonic Distortion+Noise Po = 0.25Wrms; f = 1kHz 0.02 % PSRR Power Supply Rejection Ratio Vripple = 200mV sine p-p f = 217Hz f = 1kHz (5) 85 (5) 85 50 dB 73 CMRR Common-Mode Rejection Ratio f = 217Hz VCM = 200mVpp VOS Output Offset VIN = 0V 4 mV VSDIH Shutdown Voltage Input High 0.8 V VSDIL Shutdown Voltage Input Low 0.6 V (1) (2) (3) (4) (5) All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25C and represent the parametric norm. Datasheet min/max specification limits are specified by design, test, or statistical analysis. 10 terminated input. EXTERNAL COMPONENTS DESCRIPTION (Figure 3) Components 1. Functional Description Ri Inverting input resistance which sets the closed-loop gain in conjunction with Rf. 2. Rf Feedback resistance which sets the closed-loop gain in conjunction with Ri. 3. CS Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for information concerning proper placement and selection of the supply bypass capacitor. 4. CB Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External Components, for information concerning proper placement and selection of CB. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 5 LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics THD+N vs Frequency VDD = 2.6V, RL = 4, PO = 150mW 10 10 1 1 THD+N (%) THD+N (%) THD+N vs Frequency VDD = 2.6V, RL = 8, PO = 150mW 0.1 0.1 0.01 0.01 0.001 20 100 1k 0.001 20 10k 20k 100 FREQUENCY (Hz) 10 Figure 5. THD+N vs Frequency VDD = 5V, RL = 8, PO = 400mW THD+N vs Frequency VDD = 3V, RL = 8, PO = 275mW 10 THD+N (%) THD+N (%) 1 0.1 0.1 0.01 0.01 0.001 20 100 1k 10k 20k 0.001 20 FREQUENCY (Hz) 100 1k 10k 20k FREQUENCY (Hz) Figure 6. Figure 7. THD+N vs Frequency VDD = 3V, RL = 4, PO = 225mW THD+N vs Output Power VDD = 2.6V, RL = 8 10 THD+N (%) 1 THD+N (%) 10k 20k Figure 4. 1 10 1k FREQUENCY (Hz) 0.1 0.01 1 20 kHz 0.1 1 kHz 0.01 20 Hz 0.001 20 100 1k 10k 20k 0.001 10m FREQUENCY (Hz) Figure 8. 6 Submit Documentation Feedback 100m 1 OUTPUT POWER (W) Figure 9. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 Typical Performance Characteristics (continued) 10 THD+N vs Output Power VDD = 2.6V, RL = 4 10 THD+N vs Output Power VDD = 5V, RL = 8 20 kHz 1 1 THD+N (%) THD+N (%) 20 kHz 1 kHz 0.1 0.01 0.1 1 kHz 20 Hz 0.01 20 Hz 0.001 10m 100m 0.001 10m 1 100m OUTPUT POWER (W) Figure 10. Figure 11. THD+N vs Output Power VDD = 3V, RL = 8 THD+N vs Output Power VDD = 3V, RL = 4 THD+N (%) 1 1 kHz 1 kHz 0.1 0.01 20 Hz 0.001 10m 100m 20 Hz 0.001 10m 1 100m OUTPUT POWER (W) 1 OUTPUT POWER (W) Figure 12. Figure 13. PSRR vs Frequency VDD = 5V, RL = 8, Input terminated PSRR vs Frequency VDD = 3V, RL = 8, Input terminated 0 0 -10 -10 -20 -20 -30 -30 PSRR (dB) PSRR (dB) 2 20 kHz 1 20 kHz 0.1 0.01 10 THD+N (%) 10 1 OUTPUT POWER (W) -40 -50 -60 -40 -50 -60 -70 -70 -80 -80 -90 -90 -100 20 -100 20 100 1k 10k 100k 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 14. Figure 15. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 7 LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) 2 0 1.8 -10 1.6 -20 1.4 -30 CMRR (dB) OUTPUT POWER (W) Output Power vs Supply Voltage RL = 8 1.2 10% THD+N 1 800m 1% THD+N CMRR vs Frequency VDD = 5V, RL = 8 -40 -50 -60 600m -70 400m -80 -90 200m 0 2.4 3 3.5 4.5 4 5 -100 20 5.5 100 Figure 17. CMRR vs Frequency VDD = 3V, RL = 8 PSRR vs Common Mode Voltage VDD = 3V, RL = 8, f = 217Hz 0 -10 -10 -20 -20 -30 -30 -40 -50 -60 -50 -60 -70 -80 -80 -90 -90 -100 20 -100 100 1k T -40 -70 10k 20k 0 FREQUENCY (Hz) 0 2 3 4 Figure 18. Figure 19. PSRR vs Common Mode Voltage VDD = 5V, RL = 8, f = 217Hz Power Dissipation vs Output Power VDD = 2.6V, RL = 8 and 4 5 0.4 0.35 POWER DISSIPATION (W) -20 -30 PSRR (dB) 1 DC COMMON-MODE VOLTAGE (V) -10 -40 -50 -60 -70 -80 0.3 RL = 4: 0.25 0.2 0.15 RL = 8: 0.1 0.05 -90 -100 0 0 1 2 3 4 5 0 DC COMMON-MODE VOLTAGE (V) Submit Documentation Feedback 0.1 0.2 0.3 0.4 OUTPUT POWER (W) Figure 20. 8 10k 20k Figure 16. PSRR (dB) CMRR (dB) 0 1k FREQUENCY (Hz) SUPPLY VOLTAGE (V) Figure 21. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 Typical Performance Characteristics (continued) Power Dissipation vs Output Power VDD = 5V, RL = 8 0.7 Power Dissipation vs Output Power VDD = 3V, RL = 8 0.25 POWER DISSIPATION (W) POWER DISSIPATION (W) 0.6 0.5 0.4 0.3 0.2 0.2 0.15 0.1 0.05 0.1 0 0 0 0.2 0.4 0.8 0.6 1 1.2 1.4 0.1 0 OUTPUT POWER (W) Figure 22. OUTPUT NOISE VOLTAGE (V) POWER DISSIPATION (W) 0.6 0.5 0.4 0.3 0.2 0.1 0 20 40 60 80 10P Vo1 + Vo2 1P Shutdown On 100n 20 100 120 140 160 100 AMBIENT TEMPERATURE (oC) Figure 25. Noise Floor VDD = 3V Clipping Voltage vs Supply Voltage 0.8 Vo1 + Vo2 Shutdown On 1P 10k 20k Figure 24. RL = 4: Top 0.7 10P 1k FREQUENCY (Hz) DROPOUT VOLTAGE (V) OUTPUT NOISE VOLTAGE (V) 100P 0.5 Noise Floor VDD = 5V 100P 0 0.4 Figure 23. Power Derating Curve 0.7 0.3 0.2 OUTPUT POWER (W) RL = 4: Bottom 0.6 0.5 0.4 0.3 RL = 8: Top 0.2 RL = 8: Bottom 0.1 100n 20 100 1k 10k 20k 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 SUPPLY VOLTAGE (V) FREQUENCY (Hz) Figure 26. Figure 27. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 9 LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Output Power vs Load Resistance 1.6 Supply Current Shutdown Voltage 5 5V, 10% THD+N 1.4 OUTPUT POWER (W) 1.0 3V, 10% THD+N 0.8 3V, 1% THD+N 0.6 0.4 2.6V, 10% THD+N 0.2 SUPPLY CURRENT (mA) 4 5V, 1% THD+N 1.2 3 2 1 0 2.6V, 1% THD+N 0 -1 4 8 12 16 20 24 28 32 0 LOAD RESISTANCE (:) Submit Documentation Feedback 1 1.5 2 2.5 SHUTDOWN VOLTAGE (V) Figure 28. 10 0.5 Figure 29. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 APPLICATION INFORMATION DIFFERENTIAL AMPLIFIER EXPLANATION The LM4923 is a fully differential audio amplifier that features differential input and output stages. Internally this is accomplished by two circuits: a differential amplifier and a common mode feedback amplifier that adjusts the output voltages so that the average value remains VDD / 2. When setting the differential gain, the amplifier can be considered to have "halves". Each half uses an input and feedback resistor (Ri1 and RF1) to set its respective closed-loop gain (see Figure 1). With Ri1 = Ri2 and RF1 = RF2, the gain is set at -RF / Ri for each half. This results in a differential gain of AVD = -RF/Ri (1) It is extremely important to match the input resistors to each other, as well as the feedback resistors to each other for best amplifier performance. See the Proper Selection of External Components section for more information. A differential amplifier works in a manner where the difference between the two input signals is amplified. In most applications, this would require input signals that are 180 out of phase with each other. The LM4923 can be used, however, as a single ended input amplifier while still retaining its fully differential benefits. In fact, completely unrelated signals may be placed on the input pins. The LM4923 simply amplifies the difference between them. All of these applications provide what is known as a "bridged mode" output (bridge-tied-load, BTL). This results in output signals at Vo1 and Vo2 that are 180 out of phase with respect to each other. Bridged mode operation is different from the single-ended amplifier configuration that connects the load between the amplifier output and ground. A bridged amplifier design has distinct advantages over the single-ended configuration: it provides differential drive to the load, thus doubling maximum possible output swing for a specific supply voltage. Four times the output power is possible compared with a single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-loop gain without causing excess clipping, please refer to the Audio Power Amplifier Design section. A bridged configuration, such as the one used in the LM4923, also creates a second advantage over singleended amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across the load. This assumes that the input resistor pair and the feedback resistor pair are properly matched (see PROPER SELECTION OF EXTERNAL COMPONENTS). BTL configuration eliminates the output coupling capacitor required in single-supply, single-ended amplifier configurations. If an output coupling capacitor is not used in a single-ended output configuration, the half-supply bias across the load would result in both increased internal IC power dissipation as well as permanent loudspeaker damage. Further advantages of bridged mode operation specific to fully differential amplifiers like the LM4923 include increased power supply rejection ratio, common-mode noise reduction, and click and pop reduction. EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS The LM4923's exposed-DAP (die attach paddle) package (WQFN) provide a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane and, finally, surrounding air. Failing to optimize thermal design may compromise the LM4923's high power performance and activate unwanted, though necessary, thermal shutdown protection. The WQFN package must have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heat sink area with a thermal via. The via diameter should be 0.012in - 0.013in. Ensure efficient thermal conductivity by plating-through and solder-filling the vias. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 11 LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Best thermal performance is achieved with the largest practical copper heat sink area. In all circumstances and conditions, the junction temperature must be held below 150C to prevent activating the LM4923's thermal shutdown protection. Figure 24 in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. Example PCB layouts are shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an WQFN package is available from Texas Instruments's package Engineering Group under application note AN1187. PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 4 LOADS Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide as possible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintain full output voltage swing. POWER DISSIPATION Power dissipation is a major concern when designing a successful amplifer, whether the amplifier is bridged or single-ended. Equation 2 states the maximum power dissipation point for a single-ended amplifier operating at a given supply voltage and driving a specified output load. PDMAX = (VDD)2 / (22RL) Single-Ended (2) However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation versus a single-ended amplifier operating at the same conditions. PDMAX = 4 * (VDD)2 / (22RL) Bridge Mode (3) Since the LM4923 has bridged outputs, the maximum internal power dissipation is 4 times that of a single-ended amplifier. Even with this substantial increase in power dissipation, the LM4923 does not require additional heatsinking under most operating conditions and output loading. From Equation 3, assuming a 5V power supply and an 8 load, the maximum power dissipation point is 625mW. The maximum power dissipation point obtained from Equation 3 must not be greater than the power dissipation results from Equation 4: PDMAX = (TJMAX - TA) / JA (4) The LM4923's JA in an NGP0008A package is 140C/W. Depending on the ambient temperature, TA, of the system surroundings, Equation 4 can be used to find the maximum internal power dissipation supported by the IC packaging. If the result of Equation 3 is greater than that of Equation 4, then either the supply voltage must be decreased, the load impedance increased, the ambient temperature reduced, or the JA reduced with heatsinking. In many cases, larger traces near the output, VDD, and GND pins can be used to lower the JA. The larger areas of copper provide a form of heatsinking allowing higher power dissipation. For the typical application of a 5V power supply, with an 8 load, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 62C provided that device operation is around the maximum power dissipation point. Recall that internal power dissipation is a function of output power. If typical operation is not around the maximum power dissipation point, the LM4923 can operate at higher ambient temperatures. Refer to the Typical Performance Characteristics curves for power dissipation information. 12 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 POWER SUPPLY BYPASSING As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection ratio (PSRR). The capacitor location on both the bypass and power supply pins should be as close to the device as possible. A larger half-supply bypass capacitor improves PSRR because it increases half-supply stability. Typical applications employ a 5V regulator with 10F and 0.1F bypass capacitors that increase supply stability. This, however, does not eliminate the need for bypassing the supply nodes of the LM4923. The LM4923 will operate without the bypass capacitor CB, although the PSRR may decrease. A 1F capacitor is recommended for CB. This value maximizes PSRR performance. Lesser values may be used, but PSRR decreases at frequencies below 1kHz. The issue of CB selection is thus dependant upon desired PSRR and click and pop performance as explained in the section Proper Selection of External Components. SHUTDOWN FUNCTION In order to reduce power consumption while not in use, the LM4923 contains shutdown circuitry that is used to turn off the amplifier's bias circuitry. The device may then be placed into shutdown mode by toggling the Shutdown Select pin to logic low. The trigger point for shutdown is shown as a typical value in the Supply Current vs Shutdown Voltage graphs in the Typical Performance Characteristics section. It is best to switch between ground and supply for maximum performance. While the device may be disabled with shutdown voltages in between ground and supply, the idle current may be greater than the typical value of 0.1A. In either case, the shutdown pin should be tied to a definite voltage to avoid unwanted state changes. In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry, which provides a quick, smooth transition to shutdown. Another solution is to use a single-throw switch in conjunction with an external pull-up resistor. This scheme ensures that the shutdown pin will not float, thus preventing unwanted state changes. PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components in applications using integrated power amplifiers is critical when optimizing device and system performance. Although the LM4923 is tolerant to a variety of external component combinations, consideration of component values must be made when maximizing overall system quality. The LM4923 is unity-gain stable, giving the designer maximum system flexibility. The LM4923 should be used in low closed-loop gain configurations to minimize THD+N values and maximize signal to noise ratio. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1Vrms are available from sources such as audio codecs. Please refer to the AUDIO POWER AMPLIFIER DESIGN section for a more complete explanation of proper gain selection. When used in its typical application as a fully differential power amplifier the LM4923 does not require input coupling capacitors for input sources with DC common-mode voltages of less than VDD. Exact allowable input common-mode voltage levels are actually a function of VDD, Ri, and Rf and may be determined by Equation 5: VCMi < (VDD-1.2)*((Rf+(Ri)/(Rf)-VDD*(Ri / 2Rf) (5) -RF / RI = AVD (6) Special care must be taken to match the values of the feedback resistors (RF1 and RF2) to each other as well as matching the input resistors (Ri1 and Ri2) to each other (see Figure 1) more in front. Because of the balanced nature of differential amplifiers, resistor matching differences can result in net DC currents across the load. This DC current can increase power consumption, internal IC power dissipation, reduce PSRR, and possibly damaging the loudspeaker. The chart below demonstrates this problem by showing the effects of differing values between the feedback resistors while assuming that the input resistors are perfectly matched. The results below apply to the application circuit shown in Figure 1, and assumes that VDD = 5V, RL = 8, and the system has DC coupled inputs tied to ground. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 13 LM4923, LM4923LQBD SNAS211E - JULY 2004 - REVISED MAY 2013 www.ti.com Tolerance RF1 RF2 V02 - V01 ILOAD 20% 0.8R 1.2R -0.500V 62.5mA 10% 0.9R 1.1R -0.250V 31.25mA 5% 0.95R 1.05R -0.125V 15.63mA 1% 0.99R 1.01R -0.025V 3.125mA 0% R R 0 0 Similar results would occur if the input resistors were not carefully matched. Adding input coupling capacitors in between the signal source and the input resistors will eliminate this problem, however, to achieve best performance with minimum component count it is highly recommended that both the feedback and input resistors matched to 1% tolerance or better. AUDIO POWER AMPLIFIER DESIGN Design a 1W/8 Audio Amplifier Given: Power Output 1Wrms Load Impedance 8 Input Level 1Vrms Input Impedance 20k Bandwidth 100Hz-20kHz 0.25dB A designer must first determine the minimum supply rail to obtain the specified output power. The supply rail can easily be found by extrapolating from the Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section. A second way to determine the minimum supply rail is to calculate the required VOPEAK using Equation 7 and add the dropout voltages. Using this method, the minimum supply voltage is (Vopeak + (VDO TOP + (VDO BOT )), where VDO BOT and VDO TOP are extrapolated from the Dropout Voltage vs Supply Voltage curve in the Typical Performance Characteristics section. (7) Using the Output Power vs Supply Voltage graph for an 8 load, the minimum supply rail just about 5V. Extra supply voltage creates headroom that allows the LM4923 to reproduce peaks in excess of 1W without producing audible distortion. At this time, the designer must make sure that the power supply choice along with the output impedance does not violate the conditions explained in the Power Dissipation section. Once the power dissipation equations have been addressed, the required differential gain can be determined from Equation 8. (8) Rf / Ri = AVD (9) From Equation 8, the minimum AVD is 2.83. Since the desired input impedance was 20k, a ratio of 2.83:1 of Rf to Ri results in an allocation of Ri = 20k for both input resistors and Rf = 60k for both feedback resistors. The final design step is to address the bandwidth requirement which must be stated as a single -3dB frequency point. Five times away from a -3dB point is 0.17dB down from passband response which is better than the required 0.25dB specified. fH = 20kHz * 5 = 100kHz (10) The high frequency pole is determined by the product of the desired frequency pole, fH , and the differential gain, AVD . With a AVD = 2.83 and fH = 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4923 GBWP of 10MHz. This figure displays that if a designer has a need to design an amplifier with a higher differential gain, the LM4923 can still be used without running into bandwidth limitations. 14 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD LM4923, LM4923LQBD www.ti.com SNAS211E - JULY 2004 - REVISED MAY 2013 Revision History Rev Date 1.0 09/28/07 Added the VSSOP package, then released. Description 1.01 12/17/07 Updated the mktg outline NGP0008A into the rev B. 1.02 02/19/09 Fixed typo labels on the typical circuit diagram. E 05/03/13 Changed layout of National Data Sheet to TI format. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LM4923 LM4923LQBD Submit Documentation Feedback 15 PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM4923LQ/NOPB ACTIVE WQFN NGP 8 1000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 GB2 LM4923LQX/NOPB ACTIVE WQFN NGP 8 4500 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 GB2 LM4923MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 GC8 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Sep-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM4923LQ/NOPB Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant WQFN NGP 8 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM4923LQX/NOPB WQFN NGP 8 4500 330.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM4923MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Sep-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM4923LQ/NOPB WQFN NGP 8 1000 210.0 185.0 35.0 LM4923LQX/NOPB WQFN NGP 8 4500 367.0 367.0 35.0 LM4923MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NGP0008A LQB08A (Rev B) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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