LT4356MP-1/LT4356MP-2
1
4356mp12fb
APPLICATIONS
FEATURES DESCRIPTION
Surge Stopper
The LT
®
4356 surge stopper protects loads from high voltage
transients. It regulates the output during an overvoltage
event, such as load dump in automobiles, by controlling
the gate of an external N-channel MOSFET. The output
is limited to a safe value thereby allowing the loads to
continue functioning. The LT4356MP also monitors the
voltage drop between the VCC and SNS pins to protect
against overcurrent faults. An internal amplifi er limits the
current sense voltage to 50mV. In either fault condition, a
timer is started inversely proportional to MOSFET stress.
If the timer expires, the FLT pin pulls low to warn of an
impending power-down. If the condition persists, the
MOSFET is turned off. After a cooldown period, the GATE
pin pulls up turning on the MOSFET again.
The auxiliary amplifi er may be used as a voltage detection
comparator or as a linear regulator controller driving an
external PNP pass transistor.
Back-to-back FETs can be used in lieu of a Schottky diode
for reverse input protection, reducing voltage drop and
power loss. A shutdown pin reduces the quiescent current
to less than 7μA for the LT4356-1 during shutdown. The
LT4356-2 differs from the LT4356-1 during shutdown by
reducing the quiescent current to 60μA and keeping alive
the auxiliary amplifi er for uses such as an undervoltage
lockout or always-on regulator.
n Automotive/Avionic Surge Protection
n Hot Swap/Live Insertion
n High Side Switch for Battery Powered Systems
n Intrinsic Safety Applications
n Stops High Voltage Surges
n Adjustable Output Clamp Voltage
n Overcurrent Protection
n Wide Operation Range: 4V to 80V
n Reverse Input Protection to –60V
n Low 7μA Shutdown Current, LT4356-1
n Adjustable Fault Timer
n Controls N-channel MOSFET
n Shutdown Pin Withstands –60V to 100V
n Fault Output Indication
n Guaranteed Operation –55°C to 125°C
n Auxiliary Amplifi er for Level Detection Comparator or
Linear Regulator Controller
n Available in 10-Pin MSOP or 16-Pin SO Packages
4A, 12V Overvoltage Output Regulator Overvoltage Protector Regulates Output at
27V During Transient
0.1μF
10Ω
10mΩ IRLR2908
VIN
12V
4356mp12 TA01
LT4356S
GND TMR
OUTGATESNS
IN+
SHDN
AOUT FAULT
VOUT
EN
FLTUNDERVOLTAGE
FB
VCC
DC-DC
CONVERTER
GND
SHDN
VCC
4.99k
383k
100k
102k
100ms/DIV 4356mp12 TA01b
VIN
20V/DIV
VOUT
20V/DIV
80V INPUT SURGE CTMR = 6.8μF
ILOAD = 500mA
27V ADJUSTABLE CLAMP
12V
12V
TYPICAL APPLICATION
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. Hot Swap, No RSENSE and ThinSOT are trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
LT4356MP-1/LT4356MP-2
2
4356mp12fb
VCC, SHDN ................................................ –60V to 100V
SNS ............................. VCC – 30V or –60V to VCC + 0.3V
OUT, AOUT, FLT, EN ..................................... –0.3V to 80V
GATE (Note 3) .................................–0.3V to VOUT + 10V
FB, TMR, IN+ ................................................ –0.3V to 6V
AOUT, EN, FLT, IN+ ..................................................–3mA
1
2
3
4
5
FB
OUT
GATE
SNS
VCC
10
9
8
7
6
TMR
GND
EN
FLT
SHD
N
TOP VIEW
MS PACKAGE
10-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 160°C/W
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
TMR
FB
NC
OUT
GATE
NC
SNS
VCC
IN+
NC
AOUT
NC
GND
EN
FLT
SHD
N
TJMAX = 150°C, θJA = 100°C/W
Operating Temperature Range
LT4356M ............................................–55°C to 125°C
Storage Temperature Range
MS, SO ..............................................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS, SO ............................................................. 300°C
ABSOLUTE MAXIMUM RATINGS
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT4356MPMS-1#PBF LT4356MPMS-1#TRPBF LTFGD 10-Lead Plastic MSOP –55°C to 125°C
LT4356MPS-1#PBF LT4356MPS-1#TRPBF LT4356MPS-1 16-Lead Plastic SO –55°C to 125°C
LT4356MPS-2#PBF LT4356MPS-2#TRPBF LT4356MPS-2 16-Lead Plastic SO –55°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT4356MPMS-1 LT4356MPMS-1#TR LTFGD 10-Lead Plastic MSOP –55°C to 125°C
LT4356MPS-1 LT4356MPS-1#TR LT4356MPS-1 16-Lead Plastic SO –55°C to 125°C
LT4356MPS-2 LT4356MPS-2#TR LT4356MPS-2 16-Lead Plastic SO –55°C to 125°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi
cations, go to: http://www.linear.com/tapeandreel/
PIN CONFIGURATION
(Notes 1 and 2)
ORDER INFORMATION
LT4356MP-1/LT4356MP-2
3
4356mp12fb
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VCC = 12V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Operating Voltage Range l480V
ICC VCC Supply Current VSHDN = Float l1 1.5 mA
VSHDN = 0V, IN+ = 1.3V, LT4356MP-1
LT4356MP-1 l
7
7
25
40
μA
μA
VSHDN = 0V, IN+ = 1.3V, LT4356MP-2
LT4356MP-2 l
60
60
70
250
μA
μA
IRReverse Input Current VSNS = VCC = –30V, SHDN Open
VSNS = VCC = VSHDN = –30V
l
l
0.3
0.8
1
2
mA
mA
ΔVGATE GATE Pin Output High Voltage VCC = 4V; (VGATE – VOUT)
80V ≥ VCC ≥ 8V; (VGATE – VOUT)
l
l
4.5
10
8
16
V
V
IGATE(UP) GATE Pin Pull-Up Current VGATE = 12V; VCC = 12V
VGATE = 48V; VCC = 48V
l
l
–4
–4.5
–23
–30
–38
–50
μA
μA
IGATE(DN) GATE Pin Pull-Down Current Overvoltage, VFB = 1.4V, VGATE = 12V
Overcurrent, VCC – VSNS = 120mV, VGATE = 12V
Shutdown Mode, VSHDN = 0V, VGATE = 12V
l
l
l
75
5
1.5
150
10
5
mA
mA
mA
VFB FB Pin Servo Voltage VGATE = 12V; VOUT = 12V l1.215 1.25 1.275 V
IFB FB Pin Input Current VFB = 1.25V l0.3 1 μA
ΔVSNS Overcurrent Fault Threshold ΔVSNS = (VCC – VSNS), VCC = 12V
ΔVSNS = (VCC – VSNS), VCC = 48V
l
l
42.5
43
50
51
55
56
mV
mV
ISNS SNS Pin Input Current VSNS = VCC = 12V to 48V l51022 μA
ILEAK FLT, EN Pins Leakage Current
AOUT Pin Leakage Current
FLT, EN = 80V
AOUT = 80V
l2.5
4.5
μA
μA
ITMR TMR Pin Pull-Up Current VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 0.5V
VTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 75V
VTMR = 1.3V, VFB = 1.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5V
VTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80V
l
l
l
l
l
–1.5
–44
–3.5
–2.5
–195
–2.5
–50
–5.5
–4.5
–260
–4
–56
–8.5
–6.5
–315
μA
μA
μA
μA
μA
TMR Pin Pull-Down Current VTMR = 1V, VFB = 1V, ΔVSNS = 0V l1.5 2.2 2.7 μA
VTMR TMR Pin Thresholds FLT From High to Low, VCC = 5V to 80V
VGATE From Low to High, VCC = 5V to 80V
l
l
1.22
0.48
1.25
0.5
1.28
0.52
V
V
ΔVTMR Early Warning Period From FLT Going Low to GATE Going Low, VCC = 5V to 80V l80 100 120 mV
VIN+IN+ Pin Threshold l1.22 1.25 1.28 V
IIN+IN+ Pin Input Current VIN+ = 1.25V l0.3 1 μA
VOL FLT, EN Pins Output Low ISINK = 2mA
ISINK = 0.1mA
l
l
2
300
8
800
V
mV
AOUT Pin Output Low ISINK = 2mA
ISINK = 0.1mA
l
l
2
200
8
400
V
mV
LT4356MP-1/LT4356MP-2
4
4356mp12fb
ICC (Shutdown) vs VCC
ICC vs VCC
VCC (V)
0
0
ICC (μA)
20
40
20 40 60 80
4356mp12 G03
120 LT4356-2
IN+ = 1.3V
60
80
100
10 30 50 70
VCC (V)
0
0
ICC (μA)
200
400
600
20 40 60 80
4356mp12 G01
800
1000
10 30 50 70
ICC (Shutdown) vs VCC
VCC (V)
0
0
ICC (μA)
10
20
30
40
20 40 60 80
4356mp12 G02
50
60
10 30 50 70
LT4356-1
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specifi ed.
Note 3: An internal clamp limits the GATE pin to a minimum of 10V above
the OUT pin. Driving this pin to voltages beyond the clamp may damage
the device.
ELECTRICAL CHARACTERISTICS
TYPICAL PERFORMANCE CHARACTERISTICS
Specifi cations are at VCC = 12V, TA = 25°C unless otherwise noted.
The
l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VCC = 12V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IOUT OUT Pin Input Current VOUT = VCC = 12V
VOUT = VCC = 12V, VSHDN = 0V
l
l
200
6
300
14
μA
mA
ΔVOUT OUT Pin High Threshold ΔVOUT = VCC – VOUT; EN from Low to High l0.25 0.5 0.7 V
VSHDN SHDN Pin Threshold VCC = 12V to 48V
l
0.6
0.4
1.4 1.7
2.1
V
V
VSHDN(FLT) SHDN Pin Float Voltage VCC = 12V to 48V l0.6 1.2 2.1 V
ISHDN SHDN Pin Current VSHDN = 0V l–1 –4 –8 μA
tOFF(OC) Overcurrent Turn-Off Delay Time GATE from High to Low, ΔVSNS = 0 → 120mV l24 μs
tOFF(OV) Overvoltage Turn-Off Delay Time GATE from High to Low, VFB = 0 → 1.5V l0.25 1 μs
LT4356MP-1/LT4356MP-2
5
4356mp12fb
TYPICAL PERFORMANCE CHARACTERISTICS
Specifi cations are at VCC = 12V, TA = 25°C unless otherwise noted.
TEMPERATURE (°C)
–50
0
ICC (μA)
50
100
150
200
0 50 100 125
4356mp12 G05
250
300
–25 25 75
LT4356-2
ICC (Shutdown) vs Temperature
ICC (Shutdown) vs Temperature
TEMPERATURE (°C)
–50
0
ICC (μA)
5
10
15
20
0 50 100 125
4356mp12 G04
25
35
30
–25 25 75
LT4356-1
SHDN Current vs Temperature
GATE Pull-Up Current vs VCC
GATE Pull-Up Current
vs Temperature
TEMPERATURE (°C)
–50
0
ISHDN (μA)
1
2
3
0 50 100 125
4356mp12 G06
4
6
5
–25 25 75
VSHDN = 0V
VCC (V)
0
0
IGATE (μA)
10
20
30
5
15
25
35
20 40 60 80
4356mp12 G07
40
10 30 50 70
TEMPERATURE (°C)
–50
0
IGATE (μA)
5
10
15
20
0 50 100 125
4356mp12 G08
25
35
30
–25 25 75
VGATE = VOUT = 12V
GATE Pull-Down Current
vs Temperature
TEMPERATURE (°C)
–50
100
IGATE(DOWN) (mA)
120
140
160
0 50 100 125
4356mp12 G09
180
220
200
–25 25 75
OVERVOLTAGE CONDITION
VFB = 1.5V
GATE Pull-Down Current
vs Temperature ΔVGATE vs IGATE
TEMPERATURE (°C)
–50
0
IGATE(DOWN) (mA)
2
4
6
0 50 100 125
4356mp12 G10
8
12
10
–25 25 75
OVERCURRENT CONDITION
ΔVSNS = 120mV
IGATE (μA)
0
0
ΔVGATE (V)
4
2
6
8
10
4 8 12 16
4356mp12 G11
12
14
2 6 10 14
VOUT = 12V
ΔVGATE vs Temperature
TEMPERATURE (°C)
–50 0 50 100 125
–25 25 75
0
ΔVGATE (V)
4
2
6
8
10
4356mp12 G12
12
14 IGATE = –1μA
VCC = 8V
VCC = 4V
LT4356MP-1/LT4356MP-2
6
4356mp12fb
TYPICAL PERFORMANCE CHARACTERISTICS
Warning Period
TMR Current vs VCC
TMR Pull-Down Current
vs Temperature Output Low Voltage vs Current
VCC (V)
0 20406080
4356mp12 G16
10 30 50 70
0
ITMR (μA)
4
2
6
8
10
12
14 OVERVOLTAGE, EARLY
WARNING PERIOD
VFB = 1.5V
VTMR = 1.3V
TEMPERATURE (°C)
–50
0
ITMR (μA)
0 50 100 125
4356mp12 G17
3.0
2.5
2.0
1.5
1.0
0.5
–25 25 75
VTMR = 1V
CURRENT (mA)
0
0
VOL (V)
1.0
2.0
3.0
0.5
1.5
2.5
3.5
2.0 3.0
4356mp12 G18
4.0
1.00.5 2.51.5
AOUT
EN
FLT
Overvoltage Turn-Off Time
vs Temperature
Overcurrent Turn-Off Time
vs Temperature
TEMPERATURE (°C)
–50
0
100
tOFF (ns)
0 50 100 125
4356mp12 G19
500
400
300
200
–25 25 75
OVERVOLTAGE CONDITION
VFB = 1.5V
TEMPERATURE (°C)
–50
1.0
1.5
tOFF (μs)
0 50 100 125
4356mp12 G20
4.0
3.5
3.0
2.5
2.0
–25 25 75
OVERCURRENT CONDITION
ΔVSNS = 120mV
VCC (V)
0
ICC (mA)
–10
–15
–80
4356mp12 G21
–5
0–20 –40 –60
–20 VCC = SNS
Reverse Current
vs Reverse Voltage
Overcurrent TMR Current
vs (VCC – VOUT)
VCC – VOUT (V)
0
0
ITMR (μA)
40
80
120
160
20 40 60 80
4356mp12 G15
200
280
240
10 30 50 70
OVERCURRENT CONDITION
VOUT = 0V
VTMR = 1V
ΔVGATE vs VCC
Overvoltage TMR Current
vs (VCC – VOUT)
VCC (V)
0 20406080
4356mp12 G13
10 30 50 70
0
ΔVGATE (V)
4
2
6
8
10
12
16
14
IGATE = –1μA
VOUT = VCC
TA = –45°C
TA = 25°C
TA = 130°C
VCC – VOUT (V)
0
0
ITMR (μA)
8
16
24
32
20 40 60 80
4356mp12 G14
40
48
10 30 50 70
OVERVOLTAGE CONDITION
VOUT = 5V
VTMR = 1V
LT4356MP-1/LT4356MP-2
7
4356mp12fb
PIN FUNCTIONS
AOUT
(SO Package Only): Amplifi er Output. Open collector
output of the auxiliary amplifi er. It is capable of sinking
up to 2mA from 80V. The negative input of the amplifi er
is internally connected to a 1.25V reference.
EN: Open-Collector Enable Output. The EN pin goes high
impedance when the voltage at the OUT pin is above (VCC
– 0.7V), indicating the external MOSFET is fully on. The
state of the pin is latched until the OUT pin voltage resets
at below 0.5V and goes back up above 2V. The internal
NPN is capable of sinking up to 3mA of current from 80V
to drive an LED or opto-coupler.
FB: Voltage Regulator Feedback Input. Connect this pin
to the center tap of the output resistive divider connected
between the OUT pin and ground. During an overvoltage
condition, the GATE pin is servoed to maintain a 1.25V
threshold at the FB pin. This pin is clamped internally to
7V. Tie to GND to disable the OV clamp.
FLT: Open-Collector Fault Output. This pin pulls low
after the voltage at the TMR pin has reached the fault
threshold of 1.25V. It indicates the pass transistor is
about to turn off because either the supply voltage has
stayed at an elevated level for an extended period of
time (voltage fault) or the device is in an overcurrent
condition (current fault). The internal NPN is capable of
sinking up to 3mA of current from 80V to drive an LED or
opto-coupler.
GATE: N-channel MOSFET Gate Drive Output. The GATE pin
is pulled up by an internal charge pump current source and
clamped to 14V above the OUT pin. Both voltage and cur-
rent amplifi ers control the GATE pin to regulate the output
voltage and limit the current through the MOSFET.
GND: Device Ground.
IN+ (SO Package Only): Positive Input of the Auxiliary
Amplifi er. This amplifi er can be used as a level detection
comparator with external hysteresis or linear regulator
controlling an external PNP transistor. This pin is clamped
internally to 7V. Connect to ground if unused.
OUT: Output Voltage Sense Input. This pin senses the
voltage at the source of the N-channel MOSFET and sets
the fault timer current. When the OUT pin voltage reaches
0.7V away from VCC, the EN pin goes high impedance.
SHDN: Shutdown Control Input. The LT4356 can be shut
down to a low current mode by pulling the SHDN pin below
0.4V. Pull this pin above 2.1V or disconnect it and allow
the internal current source to turn the part back on. The
leakage current to ground at the pin should be limited to
no more than 1μA if no pull-up device is used to turn the
part on. The SHDN pin can be pulled up to 100V or below
GND by 60V without damage. In shutdown, the auxiliary
amplifi er turns off in the LT4356-1 but continues operating
in the LT4356-2.
SNS: Current Sense Input. Connect this pin to the output of
the current sense resistor. The current limit circuit controls
the GATE pin to limit the sense voltage between VCC and
SNS pins to 50mV. At the same time the sense amplifi er
also starts a current source to charge up the TMR pin.
This pin can be pulled below GND by up to 60V, though
the voltage difference with the VCC pin must be limited to
less than 30V. Connect to VCC if unused.
TMR: Fault Timer Input. Connect a capacitor between this
pin and ground to set the times for early warning, fault
and cooldown periods. The current charging up this pin
during fault conditions depends on the voltage difference
between the VCC and OUT pins. When VTMR reaches 1.25V,
the FLT pin pulls low to indicate the detection of a fault
condition. If the condition persists, the pass transistor
turns off when VTMR reaches the threshold of 1.35V. As
soon as the fault condition disappears, the pull-up current
stops and a 2μA current starts to pull the TMR pin down.
When VTMR reaches the retry threshold of 0.5V, the GATE
pin pulls high turning back on the pass transistor.
VCC: Positive Supply Voltage Input. The positive supply
input ranges from 4V to 80V for normal operation. It
can also be pulled below ground potential by up to 60V
during a reverse battery condition, without damaging the
part. The supply current is reduced to 7μA with all the
functional blocks off.
LT4356MP-1/LT4356MP-2
8
4356mp12fb
–
+
+–
+
–
+
–
VCC
SHDN
IN+
AUXILIARY
AMPLIFIER
IA
1.25V
50mV
2μA
1.35V
1.25V –
+
1.25V
0.5V
SNS
TMR GND
GATE
14V
AOUT
OUT
4356mp12 BD
VCC
ITMR
FLT
EN
FB
+
–
CHARGE
PUMP
CONTROL
LOGIC
GATEOFF FLT
OUT OVOC
VA
SHDN
RESTART
+
–
BLOCK DIAGRAM
LT4356MP-1/LT4356MP-2
9
4356mp12fb
Some power systems must cope with high voltage surges
of short duration such as those in automobiles. Load
circuitry must be protected from these transients, yet
high availability systems must continue operating during
these events.
The LT4356 is an overvoltage protection regulator that
drives an external N-channel MOSFET as the pass transis-
tor. It operates from a wide supply voltage range of 4V to
80V. It can also be pulled below ground potential by up
to 60V without damage. The low power supply require-
ment of 4V allows it to operate even during cold cranking
conditions in automotive applications. The internal charge
pump turns on the N-channel MOSFET to supply current
to the loads with very little power loss. Two MOSFETs can
be connected back to back to replace an inline Schottky
diode for reverse input protection. This improves the ef-
fi ciency and increases the available supply voltage level
to the load circuitry during cold crank.
Normally, the pass transistor is fully on, powering the
loads with very little voltage drop. When the supply volt-
age surges too high, the voltage amplifi er (VA) controls
the gate of the MOSFET and regulates the voltage at the
source pin to a level that is set by the external resistive
divider from the OUT pin to ground and the internal 1.25V
reference. A current source starts charging up the capaci-
tor connected at the TMR pin to ground. If the voltage at
the TMR pin, VTMR, reaches 1.25V, the FLT pin pulls low
to indicate impending turn-off due to the overvoltage
condition. The pass transistor stays on until the TMR
pin reaches 1.35V, at which point the GATE pin pulls low
turning off the MOSFET.
The potential at the TMR pin starts decreasing as soon as
the overvoltage condition disappears. When the voltage
at the TMR pin reaches 0.5V the GATE pin begins rising,
turning on the MOSFET. The FLT pin will then go to a high
impedance state.
The fault timer allows the load to continue functioning
during short transient events while protecting the MOSFET
from being damaged by a long period of supply overvolt-
age, such as a load dump in automobiles. The timer period
varies with the voltage across the MOSFET. A higher voltage
corresponds to a shorter fault timer period, ensuring the
MOSFET operates within its safe operating area (SOA).
The LT4356 senses an overcurrent condition by monitor-
ing the voltage across an optional sense resistor placed
between the VCC and SNS pins. An active current limit
circuit (IA) controls the GATE pin to limit the sense volt-
age to 50mV. A current is also generated to start charging
up the TMR pin. This current is about 5 times the current
generated during an overvoltage event. The FLT pin pulls
low when the voltage at the TMR pin reaches 1.25V and
the MOSFET is turned off when it reaches 1.35V.
An auxiliary amplifi er is provided with the negative input
connected to an internal 1.25V reference. The output pull-
down device is capable of sinking up to 2mA of current
allowing it to drive an LED or opto coupler. This amplifi er
can be confi gured as a linear regulator controller driving
an external PNP transistor or a comparator function to
monitor voltages.
A shutdown pin turns off the pass transistor and reduces
the supply current to less than 7μA for the LT4356-1. The
supply current drops down to 60μA while keeping the
internal reference and the auxiliary amplifi er active for the
LT4356-2 version during shutdown.
OPERATION
LT4356MP-1/LT4356MP-2
10
4356mp12fb
The LT4356 can limit the voltage and current to the load
circuitry during supply transients or overcurrent events.
The total fault timer period should be set to ride through
short overvoltage transients while not causing damage
to the pass transistor. The selection of this N-channel
MOSFET pass transistor is critical for this application.
It must stay on and provide a low impedance path from
the input supply to the load during normal operation and
then dissipate power during overvoltage or overcurrent
conditions.
The following sections describe the overcurrent and the
overvoltage faults, and the selection of the timer capacitor
value based on the required warning time. The selection
of the N-channel MOSFET pass transistor is discussed
next. Auxiliary amplifi er, reverse input, and the shutdown
functions are covered after the MOSFET selection. External
component selection is discussed in detail in the Design
Example section.
Overvoltage Fault
The LT4356 limits the voltage at the OUT pin during an
overvoltage situation. An internal voltage amplifi er regu-
lates the GATE pin voltage to maintain a 1.25V threshold at
the FB pin. During this period of time, the power MOSFET
is still on and continues to supply current to the load. This
allows uninterrupted operation during short overvoltage
transient events.
When the voltage regulation loop is engaged for longer
than the time-out period, set by the timer capacitor con-
nected from the TMR pin to ground, an overvoltage fault is
detected. The GATE pin is pulled down to the OUT pin by a
150mA current. After the fault condition has disappeared
and a cooldown period has transpired, the GATE pin starts
to pull high again. This prevents the power MOSFET from
being damaged during a long period of overvoltage, such
as during load dump in automobiles.
Overcurrent Fault
The LT4356 features an adjustable current limit that
protects against short circuits or excessive load current.
During an overcurrent event, the GATE pin is regulated to
limit the current sense voltage across the VCC and SNS
pins to 50mV.
An overcurrent fault occurs when the current limit circuitry
has been engaged for longer than the time-out delay set
by the timer capacitor. The GATE pin is then immediately
pulled low by a 10mA current to GND turning off the
MOSFET. After the fault condition has disappeared and a
cooldown period has transpired, the GATE pin is allowed
to pull back up and turn on the pass transistor.
Fault Timer
The LT4356 includes an adjustable fault timer pin. Con-
necting a capacitor from the TMR pin to ground sets the
delay timer period before the MOSFET is turned off. The
same capacitor also sets the cooldown period before the
MOSFET is allowed to turn back on after the fault condi-
tion has disappeared.
Once a fault condition, either overvoltage or overcurrent,
is detected, a current source charges up the TMR pin. The
current level varies depending on the voltage drop across
the drain and source terminals of the power MOSFET(VDS),
which is typically from the VCC pin to the OUT pin. This
scheme takes better advantage of the available Safe
Operating Area (SOA) of the MOSFET than would a fi xed
timer current. The timer function operates down to VCC =
5V across the whole temperature range.
APPLICATIONS INFORMATION
LT4356MP-1/LT4356MP-2
11
4356mp12fb
Fault Timer Current
The timer current starts at around 2μA with 0.5V or less
of VDS, increasing linearly to 50μA with 75V of VDS dur-
ing an overvoltage fault (Figure 1). During an overcurrent
fault, it starts at 4μA with 0.5V or less of VDS but increases
to 260μA with 80V across the MOSFET (Figure 2). This
arrangement allows the pass transistor to turn off faster
during an overcurrent event, since more power is dissipated
during this condition. Refer to the Typical Performance
Characteristics section for the timer current at different
VDS in both overvoltage and overcurrent events.
When the voltage at the TMR pin, VTMR, reaches the 1.25V
threshold, the FLT pin pulls low to indicate the detection
of a fault condition and provide warning to the load of
the impending power loss. In the case of an overvoltage
fault, the timer current then switches to a fi xed 5μA. The
interval between FLT asserting low and the MOSFET turn-
ing off is given by:
tWARNING = CTMR • 100mV
5μA
APPLICATIONS INFORMATION
Figure 1. Overvoltage Fault Timer Current
Figure 2. Overcurrent Fault Timer Current
tFLT
= 15ms/μF
TOTAL FAULT TIMER = tFLT + tWARNING
tWARNING
= 20ms/μF
tFLT = 93.75ms/μF tWARNING
= 20ms/μF
VTMR(V)
ITMR = 5μA ITMR = 5μA
VDS = 75V
(ITMR = 50μA)
VDS = 10V
(ITMR = 8μA)
1.35
1.25
TIME
4356mp12 F01
0.50
tFLT
= 2.88ms/μF
TOTAL FAULT TIMER = tFLT + tWARNING
tFLT = 21.43ms/μF tWARNING
= 2.86ms/μF
tWARNING
= 0.38ms/μF
VTMR(V)
VDS = 10V
(ITMR = 35μA)
1.35
1.25
0.50 TIME
4356mp12 F02
VDS = 80V
(ITMR = 260μA)
LT4356MP-1/LT4356MP-2
12
4356mp12fb
voltage N-channel MOSFETs. For systems with VCC less
than 8V, a logic level MOSFET is required since the gate
drive can be as low as 4.5V.
The SOA of the MOSFET must encompass all fault condi-
tions. In normal operation the pass transistor is fully on,
dissipating very little power. But during either overvoltage
or overcurrent faults, the GATE pin is servoed to regu-
late either the output voltage or the current through the
MOSFET. Large current and high voltage drop across the
MOSFET can coexist in these cases. The SOA curves of
the MOSFET must be considered carefully along with the
selection of the fault timer capacitor.
Transient Stress in the MOSFET
During an overvoltage event, the LT4356 drives a series
pass MOSFET to regulate the output voltage at an acceptable
level. The load circuitry may continue operating throughout
this interval, but only at the expense of dissipation in the
MOSFET pass device. MOSFET dissipation or stress is a
function of the input voltage waveform, regulation voltage
and load current. The MOSFET must be sized to survive
this stress.
Most transient event specifi cations use the model shown
in Figure 3. The idealized waveform comprises a linear
ramp of rise time tr, reaching a peak voltage of VPK and
exponentially decaying back to VIN with a time constant
of t. A common automotive transient specifi cation has
constants of tr = 10μs, VPK = 80V and τ = 1ms. A surge
condition known as “load dump” has constants of tr =
5ms, VPK = 60V and τ = 200ms.
This fi xed early warning period allows the systems to per-
form necessary backup or house-keeping functions before
the power supply is cut off. After VTMR crosses the 1.35V
threshold, the pass transistor turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after VTMR has reached 1.25V threshold,
since it would lengthen the overall fault timer period and
cause more stress on the power MOSFET.
As soon as the fault condition has disappeared, a 2μA
current starts to discharge the timer capacitor to ground.
When VTMR reaches the 0.5V threshold, the internal charge
pump starts to pull the GATE pin high, turning on the
MOSFET. The TMR pin is then actively regulated to 0.5V
until the next fault condition appears. The total cooldown
timer period is given by:
tCOOL = CTMR • 0.85V
2μA
MOSFET Selection
The LT4356 drives an N-channel MOSFET to conduct the
load current. The important features of the MOSFET are
on-resistance RDS(ON), the maximum drain-source voltage
V(BR)DSS, the threshold voltage, and the SOA.
The maximum allowable drain-source voltage must be
higher than the supply voltage. If the output is shorted
to ground or during an overvoltage event, the full supply
voltage will appear across the MOSFET.
The gate drive for the MOSFET is guaranteed to be more
than 10V and less than 16V for those applications with VCC
higher than 8V. This allows the use of standard threshold
APPLICATIONS INFORMATION
Figure 3. Prototypical Transient Waveform
VPK
T
VIN
4356mp12 F03
tr
LT4356MP-1/LT4356MP-2
13
4356mp12fb
APPLICATIONS INFORMATION
MOSFET stress is the result of power dissipated within
the device. For long duration surges of 100ms or more,
stress is increasingly dominated by heat transfer; this is
a matter of device packaging and mounting, and heatsink
thermal mass. This is analyzed by simulation, using the
MOSFET thermal model.
For short duration transients of less than 100ms, MOSFET
survival is increasingly a matter of safe operating area
(SOA), an intrinsic property of the MOSFET. SOA quanti-
fi es the time required at any given condition of VDS and
ID to raise the junction temperature of the MOSFET to its
rated maximum. MOSFET SOA is expressed in units of
watt-squared-seconds (P2t). This fi gure is essentially con-
stant for intervals of less than 100ms for any given device
type, and rises to infi nity under DC operating conditions.
Destruction mechanisms other than bulk die temperature
distort the lines of an accurately drawn SOA graph so that
P2t is not the same for all combinations of ID and VDS.
In particular P2t tends to degrade as VDS approaches the
maximum rating, rendering some devices useless for
absorbing energy above a certain voltage.
Calculating Transient Stress
To select a MOSFET suitable for any given application, the
SOA stress must be calculated for each input transient
which shall not interrupt operation. It is then a simple matter
to chose a device which has adequate SOA to survive the
maximum calculated stress. P2t for a prototypical transient
waveform is calculated as follows (Figure 4).
Let
a = VREG – VIN
b = VPK – VIN
(VIN = Nominal Input Voltage)
Then
P2t = ILOAD21
3tr
b–a
()
3
b+1
2τ2a2ln b
a+3a2+b2−4ab
⎛
⎝
⎜⎞
⎠
⎟
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
Typically VREG ≈ VIN and τ >> tr simplifying the above to
P2t = 1
2 ILOAD2VPK –V
REG
()
2τ(W2s)
For the transient conditions of VPK = 80V, VIN = 12V, VREG
= 16V, tr = 10μs and τ = 1ms, and a load current of 3A, P2t
is 18.4W2s—easily handled by a MOSFET in a D-pak pack-
age. The P2t of other transient waveshapes is evaluated by
integrating the square of MOSFET power versus time.
Calculating Short-Circuit Stress
SOA stress must also be calculated for short-circuit condi-
tions. Short-circuit P2t is given by:
P
2t = (VIN • ΔVSNS/RSNS)2 • tTMR (W2s)
where, ΔVSNS is the SENSE pin threshold, and tTMR is the
overcurrent timer interval.
For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR
= 100nF, P2t is 6.6W2s—less than the transient SOA
calculated in the previous example. Nevertheless, to
account for circuit tolerances this fi gure should be doubled
to 13.2W2s.
Limiting Inrush Current and GATE Pin Compensation
The LT4356 limits the inrush current to any load capacitance
by controlling the GATE pin voltage slew rate. An external
capacitor can be connected from GATE to ground to slow
down the inrush current further at the expense of slower
turn-off time. The gate capacitor is set at:
C1 = IGATE(UP)
IINRUSH
•C
L
Figure 4. Safe Operating Area Required to Survive Prototypical
Transient Waveform
VPK
T
VIN
4356mp12 F04
VREG
tr
LT4356MP-1/LT4356MP-2
14
4356mp12fb
Figure 5
Figure 6. Auxiliary LDO Output with Optional Current Limit
APPLICATIONS INFORMATION
The LT4356 does not need extra compensation compo-
nents at the GATE pin for stability during an overvoltage or
overcurrent event. With transient input voltage step faster
than 5V/μs, a gate capacitor, C1, to ground is needed to
prevent self enhancement of the N-channel MOSFET.
The extra gate capacitance slows down the turn-off time
during fault conditions and may allow excessive current
during an output short event. An extra resistor, R1, in series
with the gate capacitor can improve the turn-off time. A
diode, D1, should be placed across R1 with the cathode
connected to C1 as shown in Figure 5.
Auxiliary Amplifi er
An uncommitted amplifi er is included in the LT4356 to
provide fl exibility in the system design. With the negative
input connected internally to the 1.25V reference, the am-
plifi er can be connected as a level detect comparator with
external hysteresis. The open collector output pin, AOUT,
is capable of driving an opto or LED. It can also interface
with the system via a pull-up resistor to a supply voltage
up to 80V. Another use is to implement undervoltage
lockout, as shown in the typical application “Overvoltage
Regulator with Undervoltage Lockout.” In shutdown, the
auxiliary amplifi er turns off in the LT4356-1 but continues
operating in the LT4356-2.
C1
R3
4356mp F05
LT4356S
GATE
Q1
R1
D1
IN4148W
RLIM
*4.7Ω
D1*
BAV99
2N2905A OR
BCP53
INPUT 2.5V OUTPUT
≈ 150mA MAX
* OPTIONAL FOR
CURRENT LIMIT
LT4356S
AOUT
IN+
11
12
R6
100k
4356 F06
R4
249k 47nF
R5
249k
10μF
VOUT 1.25 R4 R5
R5
ILIM z0.7
RLIM
The amplifi er can also be confi gured as a low dropout
linear regulator controller. With an external PNP transistor,
such as 2N2905A, it can supply up to 100mA of current
with only a few hundred mV of dropout voltage. Current
limit can be easily included by adding two diodes and one
resistor (Figure 6).
Reverse Input Protection
A blocking diode is commonly employed when reverse
input potential is possible, such as in automotive applica-
tions. This diode causes extra power loss, generates heat,
and reduces the available supply voltage range. During
cold crank, the extra voltage drop across the diode is
particularly undesirable.
The LT4356 is designed to withstand reverse voltage
without damage to itself or the load. The VCC, SNS, and
SHDN pins can withstand up to 60V of DC voltage below
the GND potential. Back-to-back MOSFETs must be used
to eliminate the current path through their body diodes
(Figure 7). Figure 8 shows the approach with a P-channel
MOSFET in place of Q2.
LT4356MP-1/LT4356MP-2
15
4356mp12fb
Figure 7. Overvoltage Regulator with N-channel MOSFET
Reverse Input Protection
APPLICATIONS INFORMATION
Shutdown
The LT4356 can be shut down to a low current mode when
the voltage at the SHDN pin goes below the shutdown
threshold of 0.6V. The quiescent current drops to 7μA for
the LT4356-1 and 60μA for the LT4356-2 which leaves the
auxiliary amplifi er on.
The SHDN pin can be pulled up to VCC or below GND by
up to 60V without damaging the pin. Leaving the pin open
allows an internal current source to pull it up and turn
on the part while clamping the pin to 2.5V. The leakage
current at the pin should be limited to no more than 1μA
if no pull-up device is used to help turn it on.
Supply Transient Protection
The LT4356 is guaranteed to be safe from damage with
supply voltages up to 100V. Nevertheless, voltage tran-
sients above 100V may cause permanent damage. During
a short-circuit condition, the large change in current fl owing
through power supply traces and associated wiring can
cause inductive voltage transients which could exceed
100V. To minimize the voltage transients, the power trace
parasitic inductance should be minimized by using wide
traces. A small surge suppressor, D2, in Figure 9, at the
input will clamp the voltage spikes.
Figure 8. Overvoltage Regulator with P-channel MOSFET
Reverse Input Protection
Figure 9. Overvoltage Regulator with Low-Battery Detection
CTMR
0.1μF
RSNS
10mΩ
Q1
IRLR2908
Q2
IRLR2908
VIN
12V
VOUT
12V, 3A
CLAMPED
AT 16V
4356mp12 F07
LT4356S
GND TMR
12 1
OUTSNS
47
SHDN
9
AOUT
14
IN+
16
VCC
8
EN
FLT
FB
11
10
2
D2*
SMAJ58CA
R2
4.99k
R1
59k
GATE
5
R7
10k
R5
1M
Q3
2N3904
D1
1N4148
R3
10Ω
R4
10Ω
*DIODES INC.
CTMR
47nF
*SANYO 25CE22GA
R3
10Ω
RSNS
10mΩ Q1
IRLR2908
D2
SMAJ58A
VIN
4356mp12 F09
LT4356S
GND TMR
OUTGATESNS
IN+
SHDN
AOUT FAULT
EN
FLTUNDERVOLTAGE
FB
CL*
22μF
DC-DC
CONVERTER
GND
SHDN
VCC
R2
4.99k
R4
383k
R5
100k
R1
59k
12 1
457
9
16
VCC
8
14
2
11
10
CTMR
0.1μF
RSNS
10mΩ
Q1
IRLR2908
Q2
Si4435
VIN
12V
VOUT
12V, 3A
CLAMPED
AT 16V
4356mp12 F08
LT4356S
GND TMR
12 1
OUTSNS
47
SHDN
9
AOUT
14
IN+
16
VCC
8
EN
FLT
FB
11
10
2
R2
4.99k
R1
59k
GATE
5
R6
10k
D1
1N5245
15V
R3
10Ω
D2*
SMAJ58CA
*DIODES INC.
LT4356MP-1/LT4356MP-2
16
4356mp12fb
A total bulk capacitance of at least 22μF low ESR electro-
lytic is required close to the source pin of MOSFET Q1. In
addition, the bulk capacitance should be at least 10 times
larger than the total ceramic bypassing capacitor on the
input of the DC/DC converter.
Layout Considerations
To achieve accurate current sensing, Kelvin connection
to the current sense resistor (RSNS in Figure 9) is recom-
mended. The minimum trace width for 1oz copper foil is
0.02" per amp to ensure the trace stays at a reasonable
temperature. 0.03" per amp or wider is recommended.
Note that 1oz copper exhibits a sheet resistance of about
530μΩ/square. Small resistances can cause large errors in
high current applications. Noise immunity will be improved
signifi cantly by locating resistive dividers close to the pins
with short VCC and GND traces.
Design Example
As a design example, take an application with the follow-
ing specifi cations: VCC = 8V to 14V DC with transient up
to 80V, VOUT ≤ 16V, current limit (ILIM) at 5A, low battery
detection at 6V, and 1ms of overvoltage early warning
(Figure 9).
First, calculate the resistive divider value to limit VOUT to
16V during an overvoltage event:
VREG =1.25V • R1 + R2
()
R2 =16V
Set the current through R1 and R2 during the overvoltage
condition to 250μA.
R2 = 1.25V
250μA = 5k
Choose 4.99k for R2.
R1 = 16V – 1.25V
()
• R2
1.25V = 58.88k
The closest standard value for R1 is 59k.
Next calculate the sense resistor, RSNS, value:
RSNS = 50mV
ILIM
= 50mV
5A = 10mΩ
CTMR is then chosen for 1ms of early warning time:
CTMR = 1ms • 5μA
100mV = 50nF
The closest standard value for CTMR is 47nF.
Finally, calculate R4 and R5 for the 6V low battery threshold
detection:
6V = 1.25V • R4 + R5
()
R5
Choose 100k for R5.
R4 = 6V – 1.25V
()
• R5
1.25V = 380k
Select 383k for R4.
The pass transistor, Q1, should be chosen to withstand
the output short condition with VCC = 14V.
The total overcurrent fault time is:
tOC = 47nF • 0.85V
45.5μA = 0.878ms
The power dissipation on Q1 equals to:
P = 14V • 50mV
10mΩ = 70W
These conditions are well within the Safe Operating Area
of IRLR2908.
APPLICATIONS INFORMATION
LT4356MP-1/LT4356MP-2
17
4356mp12fb
Wide Input Range 5V to 28V Hot Swap with Undervoltage Lockout
CTMR
1μF
R3
10Ω
29
14
16
10
11
112
4578
RSNS
20mΩ
Q1
SUD50N03-10
VIN
4356mp12 TA02
LT4356S-1
GND TMR
OUTGATESNS
IN+
SHDN
AOUT
VOUT
EN
FLT
FB
VCC
R7
49.9k
R6
118k
100μF
C1
47nF
TYPICAL APPLICATIONS
24V Overvoltage Regulator Withstands 150V at VIN
CTMR
0.1μF
Q1
IRF640
VIN
24V
VOUT
CLAMPED AT 32V
4356mp12 TA03
LT4356S
GND TMR
12 1
OUTSNS
47
SHDN
9
FLT
10
EN
11
VCC
8FB 2
D2*
SMAT70A
R2
4.99k
R1
118k
GATE
5
R3
10Ω
R9
1k
1W
*DIODES INC.
LT4356MP-1/LT4356MP-2
18
4356mp12fb
TYPICAL APPLICATIONS
Overvoltage Regulator with Undervoltage Lockout
CTMR
0.1μF
R3
10Ω
RSNS
20mΩ
Q1
IRLR2908
VIN
4356mp12 TA04
LT4356S-2
GND TMR
OUTGATESNS
IN+
SHDN
AOUT
VOUT
CLAMPED AT 16V
EN
FLT
FB
VCC
R2
4.99k
R7
100k
R6
280k
R4
1M
R5
1M
R1
59k
D2*
SMAJ58A
*DIODES INC.
875
12 1
4
29
14
16
10
11
Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown
R3
10Ω
RSNS
10mΩ
VIN
12V
VOUT
12V, 4A
CLAMPED AT 16V
4356mp12 TA05
LT4356S
GND TMR
12 1
OUTGATESNS
457
IN+
16
SHDN
9
VCC
VDD
8
EN
FLT
FB
11
AOUT LBO
14
10
2
D1
1N4746A
18V
1W
R2
24.9k
R6
47k
R4
402k
R5
105k
R1
294k
1k
0.5W
Q1
IRLR2908
Q2
VN2222
CTMR
0.1μF
D2*
SMAJ58A
*DIODES INC.
LT4356MP-1/LT4356MP-2
19
4356mp12fb
TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35V
D1
1N4714
BV = 33V
C1
6.8nF
CTMR
0.1μF
R3
10Ω
RSNS
15mΩ VOUT
48V
2.5A
4356mp12 TA06
LT4356S
GND TMR
12 1
OUTGATESNSVCC
4578
SHDN
EN
FLT
9
11
10
AOUT PWRGD
FB
IN+
14
2
16
R7
1M
CL
300μF
R5
4.02k
R4
140k
R6
100k
R8
47k
R2
4.02k
R1
226k
Q1
FDB3632
D2*
SMAT70A
VIN
48V
*DIODES INC.
2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15V
D1
1N4700
BV = 13V
C1
6.8nF
CTMR
0.1μF
R3
10Ω
RSNS
15mΩ VOUT
28V
2.5A
4356mp12 TA07
LT4356S
GND TMR
12 1
OUTGATESNSVCC
4578
SHDN
EN
FLT
9
11
10
AOUT PWRGD
FB
IN+
14
2
16
R7
1M
CL
300μF
R5
4.02k
R4
113k
R6
27k
R8
47k
R2
4.02k
R1
110k
Q1
FDB3632
D2*
SMAT70A
*DIODES INC.
VIN
28V
LT4356MP-1/LT4356MP-2
20
4356mp12fb
TYPICAL APPLICATIONS
Overvoltage Regulator with Reverse Input Protection Up to –80V
CTMR
0.1μF
RSNS
10mΩ
Q1
IRLR2908
Q2
IRLR2908
VIN
12V
VOUT
12V, 3A
CLAMPED
AT 16V
4356mp12 TA08
LT4356S
GND TMR
12 1
OUTSNSVCC
47
SHDN
9
AOUT
14
IN+
16
8
EN
FLT
FB
11
10
2
D2*
SMAJ58CA
R2
4.99k
R1
59k
GATE
5
R7
10k
R5
1M
Q3
2N3904
D1
1N4148
R3
10Ω
R4
10Ω
* DIODES INC.
** OPTIONAL COMPONENT FOR
REDUCED STANDBY CURRENT
D3**
IN4148
LT4356MP-1/LT4356MP-2
21
4356mp12fb
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
MSOP (MS) 0307 REV E
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
12345
4.90 ± 0.152
(.193 ± .006)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LT4356MP-1/LT4356MP-2
22
4356mp12fb
PACKAGE DESCRIPTION
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)s 45o
0o – 8o TYP
.008 – .010
(0.203 – 0.254)
1
N
2345678
N/2
.150 – .157
(3.810 – 3.988)
NOTE 3
16 15 14 13
.386 – .394
(9.804 – 10.008)
NOTE 3
.228 – .244
(5.791 – 6.197)
12 11 10 9
S16 0502
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
.245
MIN
N
1 2 3 N/2
.160 p.005
RECOMMENDED SOLDER PAD LAYOUT
.045 p.005
.050 BSC
.030 p.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LT4356MP-1/LT4356MP-2
23
4356mp12fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 05/10 Revised Features and Description
Added parameters to VOL in the Electrical Characteristics section
Rearranged Typical Performance Characteristics
Revised Pin Functions section
Made minor text edits to the Operation section
Replaced Figure 6 and text edits in the Applications Information section
1
3
4
7
9
13-20
B 01/12 Revised Max value for IGATE(UP) current at VCC = 12V
Correct part number
3
10, 14
(Revision history begins at Rev A)
LT4356MP-1/LT4356MP-2
24
4356mp12fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2009
LT 0112 REV B • PRINTED IN USA
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
LT1641-1/LT1641-2 Positive High Voltage Hot Swap™ Controllers Active Current Limiting, Supplies From 9V to 80V
LTC1696 Overvoltage Protection Controller ThinSOT™ Package, 2.7V to 28V
LTC1735 High Effi ciency Synchronous Step-Down
Switching Regulator
Output Fault Protection, 16-Pin SSOP
LTC1778 No RSENSE™ Wide Input Range Synchronous
Step-Down Controller
Up to 97% Effi ciency, 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ (0.9)(VIN),
IOUT Up to 20A
LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring
LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy
LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies
LTC3727/LTC3727-1 2-Phase, Dual, Synchronous Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 14V
LTC3827/LTC3827-1 Low IQ, Dual, Synchronous Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 80μA Quiescent Current
LTC3835/LTC3835-1 Low IQ, Synchronous Step-Down Controller Single Channel LTC3827/LTC3827-1
LT3845 Low IQ, Synchronous Step-Down Controller 4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, 120μA Quiescent Current
LT3850 Dual, 550kHz, 2-Phase Sychronous Step-Down
Controller
Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle,
4mm × 4mm QFN-28, SSOP-28 Packages
LT4256 Positive 48V Hot Swap Controller with
Open-Circuit Detect
Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output,
Up to 80V Supply
LTC4260 Positive High Voltage Hot Swap Controller with
ADC and I2C
Wide Operating Range 8.5V to 80V
LTC4352 Ideal MOSFET ORing Diode External N-channel MOSFETs Replace ORing Diodes, 0V to 18V Operation
LTC4354 Negative Voltage Diode-OR Controller Controls Two N-channel MOSFETs, 1μs Turn-Off, 80V Operation
LTC4355 Positive Voltage Diode-OR Controller Controls Two N-channel MOSFETs, 0.5μs Turn-Off, 80V Operation
Hot Swap, No RSENSE and ThinSOT are trademarks of Linear Technology Corporation.
Overvoltage Regulator with Linear Regulator Up to 100mA
CTMR
0.1μF
R3
10Ω
RSNS
10mΩ
Q2
2N2905A
VIN
12V
VOUT
12V, 3A
CLAMPED AT 16V
2.5V, 100mA
4356mp12 TA09
LT4356S
GND TMR
12 1
OUTGATESNS
457
AOUT
14
SHDN
9
VCC
8
EN
FLT
FB
11
IN+16
10
2
C5
10μF
R2
4.99k
R6
100k
R1
59k
R5
249k
R4
249k
C3
47nF
Q1
IRLR2908
D2*
SMAJ58A
*DIODES INC.
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