Product Brief September 2000 TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description Fully-integrated clock synthesis Clock or sync protection switching Fast, autonomous switching with software-override capability Supports a wide choice of SONET/SDH/ATM output clock frequencies: 622.08 MHz 51.84 MHz 34.368 MHz 19.44 MHz 4.096 MHz 1.544 MHz 155.52 MHz 44.736 MHz 32.768 MHz 16.384 MHz 2.43 MHz 77.76 MHz 38.88 MHz 24.704 MHz 8.192 MHz 2.048 MHz Supports multiple input clock frequencies: 51.84 MHz 8.192 MHz 1.544 MHz 38.88 MHz 6.48 MHz 8 kHz 19.44 MHz 2.048 MHz Generates sync outputs at 8 kHz aligned to an 8 kHz input clock/sync Locks to backup reference clock if both working and protection reference clocks are lost Compatible with Lucent Technologies TTRN012G5 2.5 Gbits/s MUX/Synthesizer, TDAT042G5/ TADM042G5 SONET/ATM/POS devices, TSOT0410G, and TMXF28155 Super Mapper Single 3.3 V supply Supports multiple output levels: CMOS, LVPECL, or LVDS Applications SONET/SDH and PDH add/drop multiplexers SONET/SDH and PDH cross connects ATM and packet over SONET switches and routers SONET/SDH and PDH test equipment Remote access servers The Lucent Technologies Microelectronics Group TSWC01622 is designed for a wide variety of synchronous timing applications. It serves as a clock synthesizer and low-skew clock fanout device generating clocks at frequencies up to 622.08 MHz that are synchronized to the system reference clock. It also serves as an intelligent clock protection switch with fast, autonomous selection based on the presence of the two input clocks. Alternatively, clock switching can be controlled entirely through a software interface. The TSWC01622 also delivers an output sync signal that is aligned to the input clock. If 8 kHz system sync signals are applied as the clock A and clock B inputs, the TSWC01622 will generate an output sync signal that is phase-aligned to the selected input sync. A programmable phase offset is provided to allow the user to offset the output sync relative to the input sync. The output sync can be used for global alignment of cells or frames in SONET/SDH/PDH cross connects or ATM switch applications. The device allows flexible choices of LVDS, LVPECL, or CMOS input and output levels. The TSWC01622 is intended for clock distribution and protection switching on a line card, a switch card, or a shelf timing card. Along with the wide variety of input and output frequencies, a unique feature of the device is a guaranteed correct number of output clock cycles between output sync pulses before, during, and after a clock selection switching event. The number of clock cycles between sync pulses remains correct even during a switch between working and protection clock sources that have an arbitrary phase relationship between them. The TSWC01622 also solves the skew problem associated with timing distribution over cable or backplane traces of different lengths. The block diagram is shown on the next page. Note that the diagram is representative of device functionality and conceptual signal flow. Internal implementation details may be different than shown. TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Product Brief September 2000 Description (continued) RSVA CLKAP CLKAN CLKA CLKBP CLKBN CLKB MONA MONB DIVIDE BY M RREF LOSS OF CLOCK A DIVIDE BY M CHARGE PUMP PD LF[2:0] LOOP FILTER LOSS OF CLOCK B PHASE COMPARE SELLVDS DIVIDE FINSEL[3:0] RSVB VCXO 38.88 MHz LSVCO CLKBU LOC 38.88 MHz DIVIDE BY N LOSS OF CLOCK BACKUP INLOSN LF[P:N] VC[P:N] FBUSEL[3:0] VNGATES VBB SELCLK SELBUN AUTOSWN REVERTN SWCONTN ENSQLN ENLON LORSTN TSTCLKP TSTCLKN CONTROL AND SWITCH STATE MACHINE PD CHARGE PUMP/ LOOP FILTER DIVIDE VCO SYOFF[9:0] ENABLE TEST CLOCK SYNC OFFSET SYDU DIVIDE RESETN SYOFFPOS D Q SYLVSP[1:0] SYLVSN[1:0] SWSTATE[1:0] INT[8:0] BASED ON SDHSEL CKPDH5 CKPDH4 CKPDH3 CKPDH2 CKPDH1 SYNC8K SYPCLP[1:0] SYPCLN[1:0] PCK622P[1:0] PCK622N[1:0] CK622P[1:0] CK622N[1:0] PDH CLOCK GEN. PCK155P[1:0] PCK155N[1:0] SONET CLOCK GEN. PDHSEL[3:0] CK155P[1:0] CK155N[1:0] CK77 TSTMODE SERCLK SERENBLN CK51 INTERNAL TEST CONTROL CK38 CK19 SDHSEL[3:0] SERDAT 0795(F)r.1 Figure 1. Functional Block Diagram of TSWC01622 For additional information, contact your Microelectronics Group Account Manager or the following: http://www.lucent.com/micro INTERNET: docmaster@micro.lucent.com E-MAIL: N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai 200233 P. R. China Tel. (86) 21 6440 0468, ext. 325, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148 Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot), FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 3507670 (Helsinki), ITALY: (39) 02 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid) Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Copyright (c) 2000 Lucent Technologies Inc. All Rights Reserved September 2000 PB00-144HSPL