DEMO CIRCUIT 1134 QUICK STARTLTC4222 GUIDE LTC4222 Dual Hot Swap Controller with I2C Compatible Monitoring DESCRIPTION Demonstration Circuit DC1134A allows evaluation of the performance of the LTC(R)4222_UF Dual Hot Swap Controller with I2C Compatible Monitoring in +12V/5A and +3.3V/5A applications. The DC1134A can demonstrate turn-on and turnoff transients as well as the steady state mode of the LTC4222. The Controller responds to fault conditions such as input overvoltage (OV), input undervoltage (UV), output power good (PWRGD) fault and overcurrent fault, and response may be verified by the Fault Alert LED. The board contains one LTC(R)4222_UF Controller, two rail channels, input clamps, input and output voltage dividers for setting the UV, OV and PWRGD comparator thresholds, LEDs to indicate the presence of input and output voltages, I2C and ALERT signals, three jumpers ADR0, ADR1, and ADR3 for I2C address programming, jumper TIMER SELECT for timer off period selection, jumper "ON" for ON pin signal selection, jumper PERFORMANCE SUMMARY SYMBOL PARAMETER VDDN Input Supply Range VDDN(UVL) Input Supply Undervoltage Lockout VSENSE(TH) Circuit Breaker Threshold (VVDDVSENSED) VSENSE Current Limit Voltage (VVDD-VSENSED) VDD1 VDD2 ILIMIT dUOUT/DT VINPUT(TH) "ON CONFIG" for selecting independent or coupled rail operation, two jumpers "ADIN1" and "ADIN2" for selecting ADC1 and ADC2 input signals, two jumpers "EN1 and EN2" for selection EN1 and EN2 pin signals, I2C port and turret terminals for critical signals to facilitate evaluation in a working system. Each rail channel includes a series connected power MOSFET and sense resistor. The I2C port designed to interface with the DC590A allows providing full control of the DC1134 with LTC's QuickEval software. Design files for this circuit board are available. Call the LTC factory. L, LTC, LTM, LT, Burst Mode, OPTI-LOOP, Over-The-Top and PolyPhase are registered trademarks of Linear Technology Corporation. Adaptive Power, C-Load, DirectSense, Easy Drive, FilterCAD, Hot Swap, LinearView, Module, Micropower SwitcherCAD, Multimode Dimming, No Latency , No Latency Delta-Sigma, No RSENSE, Operational Filter, PanelProtect, PowerPath, PowerSOT, SmartStart, SoftSpan, Stage Shedding, SwitcherCAD, ThinSOT, UltraFast and VLDO are trademarks of Linear Technology Corporation. Other product names may be trademarks of the companies that manufacture the products. Specifications are at TA = 25C CONDITIONS VDD Rising VFB-=1.3V VFB-=0V Start-Up Timer Expired First Rail Operating Voltage Second Rail Operating Voltage Circuit Breaker Current Limit in both Rails Steady State Condition, after Power-Up Both Rails Output Voltage Slew Rate Rail Current Lower Current Limit Threshold CONFIG, ENn, FBn, ONn, OVn and UVn VIN Rising Pin Input Threshold MIN 2.9 2.34 47.5 46 14 130 4.6 850 1.215 TYP 2.43 50 50 16.6 150 12 3.3 5 1200 1.235 MAX 29 2.53 52.5 UNITS V V mV 54 19 165 mV mV mV V V A V/s V 5.4 1900 1.255 1 LTC4222 PERFORMANCE SUMMARY SYMBOL IGATE(UP) Specifications are at TA = 25C PARAMETER CONDITIONS External N-Channel Gate Pull-Up Current Gate On, VGATE = 0V MIN 8 TYP 12 MAX 18 UNITS A OPERATING PRINCIPLES The LTC4222 is a low voltage dual hot swap controller that has 2.9V to 29V operating range and 35V absolute maximum voltage for the VDD pins. In the DC1134A the first channel operates on the +12V rail and the second channel on the +3.3V rail. Each channel can easily be readjusted for any voltage between 2.9V and 29V by replacing the top resistors in the UV, OV and FB dividers (R1, R2, R7 for the first channel and R101, R102, R107 for the second one). The DC1134 as supplied by the factory is assembled with the Si4864DP MOSFETs in an SO-8 package and with 10m current sense resistors, setting a minimum of 4.6A current limit and 4.75A circuit breaker threshold. The current limit and circuit breaker thresholds can be adjusted by changing the channel's sense resistor (RS1 and RS2). To enable demonstration of higher current applications up to 25A, provisions have been made to replace the provided sense resistor with a 1W, 2512 size and replace Q1 and Q101 with MOSFETs in a PowerPAK SO-8, such as the Si7476ADP. The large turrets may be removed to permit installation of up to a 12 gauge wire for direct, low resistance connections to the board. None of the turrets are swaged. QUICK START PROCEDURE Demonstration circuit 1134 is easy to set up to evaluate the performance of the LTC4222. Refer to Figure 1 for proper measurement equipment setup and follow the procedure below: The DC1134 is factory set up to operate with 12V and 3.3V rails and up to 5A. If the LTC4222 is to be evaluated at different operating conditions, follow steps 1 through 3 below, otherwise skip to step 4. 1. If evaluating at a voltage other than 12V and 3.3V, R1, R2, R101 and R102 must be adjusted for proper UV and OV comparator response. The values of the bottom resistor in the divider R3 (14.7k) and R103 (4.12k) may be assigned arbitrarily. Select a voltage divider top resistor R1 and R101 as R1 14.7(VMAX/12/1.255)[1-1.215/VMIN12]k, 2 R101 4.12(VMAX3.3/1.255)[1-1.215/VMIN3.3]k. Select a voltage divider middle resistor R2 and R102 as R2 14.7(1.215VMAX12/1.255VMIN12-1)k R102 4.12(1.215VMAX3.3/1.255VMIN3.3-1) k. where VMIN and VMAX are the minimum and maximum output voltages expected for normal operation. Select resistors in the feedback dividers R7 or R107 as R = 3.01[VMIN /1.255-1]k where VMIN is the minimum output voltage accepted as a good output. 2. If the DC1134 will operate at other than 5A max, change the value of the sense resistor RSENSE= 0.99*47.5mV/ILOAD(MAX) for a 1% tolerance current sense resistor. LTC4222 3. If the DC1134 will operate above 10A, replace Q1 with a suitable PowerPAK SO-8 package MOSFET such as the Si7880ADP suitable for up to 20A. The SO-8 pads on the front of the board include the extra heat-sinking area this package requires. Alternately, for low power applications, Q1 may be replaced with a MOSFET in a SSOT-6 package using pads on the back of the board. 4. The "TIMER SELECT" jumper chooses the startup time limit. It may enable either the adjustable timer with external timer capacitor CT or the built in internal timer with a fixed startup time 100ms. CT is stuffed with a 0.68F capacitor at the factory, which provides a 8ms startup time. To customize the startup time, select CT = TSTART/12.3(ms/F). 5. The soft start capacitor, CSS, sets the current ramp rate at which the inrush current will increase when turning on. CSS is stuffed with a 68nF capacitor at the factory, which provides a 5mV/ms inrush sense resistor voltage ramp or 0.5A/ms for both rails. 6. The LTC4222 does not require an RC network on the GATE pin for compensation. However, an RC network may be used to limit the rate at which the GATE rises to provide an inrush current below the internal current limit. Pads for R6, R106, CG1 and CG2 on the back of the board are available for this purpose. R6 and CG1, as well as R106 and CG2 may be stuffed with 100K resistor, and CG = CLOAD * 20uA/IINRUSH for this purpose. 7. The ADIN1 and ADIN2 turrets may be used to provide signals to take 10 bit measurements of any voltage. Jumpers "ADIN1 SELECT" and "`ADIN2 SELECT" choose between measuring the input rail voltage or measuring the voltage on the ADIN1, ADIN2 turrets respectively. The rail input voltages are measured through resistor dividers. The +12V divider is assembled to a 15.4V full scale range to match the range of the Q1 SOURCE voltage measurement. The +3.3V divider is assembled to a 4.3V full scale range to match the range of the Q101 SOURCE voltage measurement. To change the full scale of the input measurement, select R11 or R111 as R = VRANGE*12.4k/1.23-12.4k. The signals at the ADIN1 and ADIN2 turrets are also measured through a voltage dividers, but the bottom resistor is not stuffed at the factory, defaulting to a 1.28V full scale voltage. To select a larger full scale voltage, choose R17 and R117 as R = 12.8/(VRANGE-1.28)k. 8. If the system uses short connector pins to sense board insertion, place "EN1" and "EN2" jumpers to position SHORT PIN1 and SHORT PIN2, respectively. Using the SHORT PIN1 and SHORT PIN2 turrets, connect the aforementioned short pins. Those are direct connections to the LTC4222's EN1 and EN2 pins; if deleterious voltages are anticipated, add a series resistor and clamping. EN1 and EN2 are good for -0.3 to +12V on their own. EN1 and EN2 are also logic compatible with a 1.235V threshold and 130mV hysteresis. 9. The I2C address, assigned to the board, is selected on the board by using jumpers "ADR0", "ADR1" and "ADR2" to pull the address pins high, low, or allow them to float. An address table is shown in the data sheet. The evaluation software automatically scans and identifies the I2C address, regardless of the setting. 10. After any necessary component changes have been made, connect suitable loads between +12V/5A OUTPUT and GND and +3.3V/5A OUTPUT and GND. This may be a passive resistive load or an active electronic load box. If long leads are present between the DC1134 and load, install 10F or more at C1 and C101. This should eliminate the chance of MOSFET oscillation and large negative excursions at +12V/5A OUTPUT. 11. Connect power supplies capable of supplying 10A to the +12V INPUT and GND turrets and 3 LTC4222 the +3.3V INPUT and GND turrets. The minimum current capability of the supply must accommodate the tolerance of the circuit breaker threshold of 10%. With the 10m, 1%, factory installed sense resistor, the overload circuit breaker will trip at (5.00.3)A. 12. Connect the ribbon cable from a DC590 to the I2C PORT on the DC1134. LTC's QuickEval software will automatically recognize the DC1134 and load software to read and write to the LTC4222's registers. During an I2C transaction, D5 and D7 will flicker faintly. If the I2C port (JP7) is disconnected, the turret terminals SDA and SCL can be connected directly to an 4 I2C bus. Power for D4, D5, and D7 is supplied by JP7, pin 2, so in this mode the LEDs will not light unless 5V is connected to this pin. 13. The following experiments can be run. Turn on into a nominal load. Turn on into an overload. Turn on into a short circuit. Turn on into a nominal load and increase the load until the LTC4222 trips off. A digital storage scope provides a convenient means of observing the turn-on and overload events. Observe the input or output current using a current probe. A probe ground turret on the board provides a low current connection to the LTC4222's ground. LTC4222 Figure 1. Proper Measurement Equipment Setup 5 LTC4222 USING THE I2C PORT WITH QUICKEVAL Demonstration circuit 1134 is easy to set up to evaluate the performance of the LTC4222. Refer to Figure 1 for proper measurement equipment setup and follow the procedure below: REGISTER DISPLAY OPTIONS The content of all Controller registers is displayed in the Register List with symbols "1" and "0" and updated with each refresh of the interface. Additionally there is an option to display CONTROL(A), ALERT(B), STATUS(C), and FAULT(D) registers for both channels with functional bits description. Clicking appropriate register button calls the necessary information. Figures 2 and 3 demonstrate register display options. Checking a box to the left of each bit of the registers CONTROL, ALERT, and FAULT sets the respective bit, while unchecking a box clears the bit. The STATUS register bits are shown after every refresh of the interface. The Clear button for register D clears out the bits in this register. Figure 3. START / REFRESH BUTTONS Click on the START button to enable a timer that continuously updates the interface with the latest data from the LTC4222. This button will display STOP when the timer is enabled. Click on STOP to stop the timer. Click on the Refresh button for a single update. FET CONTROL The status of the FET is shown with a color display. When the FET On bit (C3) is checked and read as high and the FET On Control bit (A3) is set, the FET is on, the shape display will be green. Turn FET Off. If C3 is low and A3 is set, the FET is off, the shape display will be red. Clear Faults. In all other cases, the FET is off, the shape display is red. Figure 2. 6 Turn FET On. The Turn FET On control button sets bits A3 logic high. Turn FET Off or Clear Faults clears bit A3 to logic low. LTC4222 ADDRESS SELECTION Select in the drop down list box the Write address byte of the LTC4222 that is to be communicated with. If multiple LTC4222s are on the bus lines, the Mass Write address BEh can be selected to communicate with all LTC4222s at the same time. The Auto find button will scan through the 27 individual LTC4222 addresses and list which addresses responded with an acknowledge. The ARA button sends the Alert Response protocol and displays the address of the device that replies with its address. DATA DISPLAY OPTION Source voltage, ADIN signal, and load current (In) for both channels are displayed in the ADC Data window in the decimal format of the ADC register content. To translate the register content to the physical value use the following equations: Source voltage = Source(data) * 0.03125V ADIN voltage = ADIN(data) * 0.00125V Load Current = Idata * 0.00625V (for 10m sense resistor). 6) ADC Control The ADC Control window allows the ADC to be placed into the HALT state, facilitating single measurements. Checking ADC_ALERT causes the ALERT pin to be asserted at the end of an ADC conversion. 7 PROBE GND ALERT SCL SDA GND INPUT INTVCC E113 E16 E12 E8 E11 2 1 ALERT SCL SDA I2C ADD RESS R9 4.7K 1/4W R109 390 D101 LED (Green) E101 E4 +3.3V INTVCC GND E13 + 1 1 1 + CIN1 OPT LOW D1 LED (Green) CIN2 OPT R18 5.11K 1% R15 5.11K 1% 4 4 INPUT +3.3V 2 4 6 8 10 12 14 SCALING JP7 I2C PORT 1 3 + + 5 + + 7 + + 9 + + 11 + + 13 + + + + Z101 SMBJ26A ADR2 JP6 ADR1 JP5 ADR0 JP4 4 Z1 SMBJ26A HIGH C4 TP1 VSS A2 A1 A0 5 6 7 8 SMT PAD TP2 SDA SCL WP VCC U2 24LC025 100nF X7R 3 INT TIMER SELECT EXT JP1 1 R12 12.4K 1% R11 143K 1% 2 CARD IDENTITY SMT PAD 4 3 2 1 R112 12.4K 1% R111 30.9K 1% CT 680nF X7R 0.1uF X5R C102 SCALING INPUT +12V ON CONFIG 1 INTVCC R16 5.11K 1% 13.3K 1% R103 CVCC 100nF X7R R101 23.7K 1% R102 4.64K 1% 68nF 8 7 6 5 4 3 2 1 1 GND TIMER ADR2 ADR1 ADR0 GND INTVCC CONFIG SS 0.010 R20 1K 28 27 Q1 Si4864DP 8 7 6 5 1 CG2 OPT 1 2 5 6 5 6 7 8 17 18 19 20 21 22 23 24 4 4 R22 1K 4 SC L D7 LED (Green) Q106 OPT 1 2 3 R105 10 R5 10 3 2 1 4 Si4864DP Q101 R106 OPT EN#2 ADIN2 SDA SCL ALERT# ON ADIN1 EN#1 Q5 2N7002 SDA D5 LED (Green) 1% 1/2W RS2 26 Q3 2N7002 R24 0 33 U1 LTC4222CUF CSS TOGETHER SEPARATE JP2 3 R3 14.7K 1% R2 3.32K 1% R1 140K 1% 0.010 1% 1/2W RS1 31 E1 2 1 1 2 FLOAT 1 2 1 2 2 2 2 3 3 3 1 2 2 30 INPUT 2 1 29 +12V 3 UV1 32 OV1 OV2 9 VDD1 VDD2 11 SENSE-1 SENSE-2 12 GATE1 GATE2 13 FB1 FB2 25 GPIO1 GPIO2 SOURCE1 SOURCE2 14 UV2 10 2 1 3 2 1 15 3 Q6 OPT CG1 OPT SDA SCL ALERT R6 OPT 1 5.11K 1% R13 ON 3 INTVCC C3 OPT I2C LINE R19 1K AL ER T D4 LED (Red) 1 (Green) D103 LED R104 390 1/4W JP8 3 C1 OPT GND E15 1 3.3V INPUT ADIN2 C101 OPT JP108 EXT 3 +12V IN PUT EXT ADIN1 ADIN SELECT R4 4.7K 1/4W (Green) D3 LED INDICATORS C103 OPT Q2 2N7002 R107 3.92K 1% R108 3.01K 1% OFF JP111 1 ON R8 3.01K 1% R7 22.1K 1% 2 1 16 2 3 2 2 1 1 2 2 2 1 + 2 EN1 JP9 2 R110 390 D102 LED (Green) GND SHORT PIN A/D SCALING EN2 JP109 (OPT) R117 R114 10K 1% (OPT) R17 GND SHORT PIN R10 4.7K 1/4W D2 LED (Green) A/D SCALING R14 10K 1% + 2 1 3 1 3 1 2 1 2 2 3 2 2 8 1 6 5 2 1 +12V/5A GND OUTPUT 1.235V ADIN2 FULL SCALE GND ADIN1 1.235V FULL GND SCALE SHORT PIN1 PWRGD1 E114 E102 GND OUTPUT +3.3V/5A PWRGD2 E103 SHORT PIN2 E107 E115 E6 E9 E5 E7 E3 E14 E2 LTC4222