1
IXYS reserves the right to change limits, test conditions and dimensions
Contents Page
Symbols and Definitions 2
Nomenclature 2
General Information 3
Assembly Instructions 4
FRED, Rectifier Diode and Thyristor Chips in Planar Design 5
IGBT Chips
VCES IC
G-Series, Low VCE(sat) B2 Types 600 ...1200 V 7 ... 20 A 6
G-Series, Fast C2 Types 600 V 7 ... 20 A 6
S-Series, SCSOA Capability, Fast Types 600 V 10 ... 20 A 6
E-Series, Improved NPT³ technology 1200 ... 1700 V 20 ... 150 A 7
MOSFET Chips
VDSS RDS(on)
HiPerFETTM Power MOSFET 70 ...1200 V 0.005 ... 4.5 Ω8-10
PolarHTTM MOSFET, very Low RDS(on) 55 ... 300 V 0.015 ... 0.135 Ω11
P-Channel Power MOSFET -100 ...-600 V 0.06 ... 1.2 Ω12
N-Channel Depletion Mode MOSFET 500 ...1000 V 30 ... 110 Ω12
Layouts 13-17
Bipolar Chips
VRRM / VDRM IF(AV)M / IT(AV)M
Rectifier Diodes 1200 ... 1800 V 12 ... 416 A 18-19
FREDs 600 ... 1200 V 8 ... 244 A 20-21
Low Leakage FREDs 200 ... 1200 V 9 ... 148 A 22-23
SONIC-FRDTM Diodes 600 ... 1800 V 12 ... 150 A 24-25
GaAs Schottky Diodes 100 ... 600 V 3.5 ... 25 A 26-27
Schottky Diodes 8 ... 200 V 28 ... 145 A 28-31
Phase Control Thyristors 800 ... 2200 V 15 ... 540 A 32-33
Fast Rectifier Diodes 1600 ... 1800 V 10 ... 26 A 34
Direct Copper Bonded (DCB), Direct Alu Bonded (DAB) Ceramic Substrates
What is DCB/DAB? 35
DCB Specification 36
Chip-Shortform2004.pmd 26.10.2004, 12:441
2© 2004 IXYS All rights reserved
Symbols and Definitions
Cies Input capacitance of IGBT
Ciss Input capacitance of MOSFET
-di/dt Rate of decrease of forward current
ICDC collector current
IDDrain current
IFForward current of diode
IF(AV)M Maximum average forward current at specified Th
IFSM Peak one cycle surge forward current
IGT Gate trigger current
IRReverse current
IRM Maximum peak recovery current
ITForward current of thyristor
IT(AV)M Maximum average on-state current of a thyristor
at specified Th
ITSM Maximum surge current of a thyristor
RDS(on) Static drain-source on-state resistance
Rthjc Thermal resistance junction to case
rTSlope resistance of a thyristor or diode
(for power loss calculations)
Tcase Case temperature
ThHeatsink temperature
tfi Current fall time with inductive load
Tj, T(vj) Junction temperature
Tjm, T(vj)m Maximum junction temperature
trr Reverse recovery time of a diode
VCE(sat) Collector-emitter saturation voltage
VCES Maximum collector-emitter voltage
VDRM Maximum repetitive forward blocking
voltage of thyristor
VDSS Drain-source break-down voltage
VFForward voltage of diode
VRReverse voltage
VRRM Maximum peak reverse voltage of thyristor or
diode
VTOn-state voltage of thyristor
VT0 Threshold voltage of thyristors or diodes (for
power loss calculation only)
Chip and DCB Ceramic Substrates Data book
Edition 2004
Published by IXYS Semiconductor GmbH
Marketing Communications
Edisonstraße 15, D-68623 Lampertheim
© IXYS Semiconductor GmbH All Rights reserved
As far as patents or other rights of third parties are concerned, liability is only
assumed for chips and DCB parts per se, not for applications, processes and
circuits implemented with components or assemblies. Terms of delivery and the
right to change design or specifications are reserved.
Nomenclature
IGBT and MOSFET Discrete
IXSD 40N60A (Example)
IX IXYS
Die technology
E NPT3 IGBT
F HiPerFETTM Power MOSFET
G Fast IGBT
SIGBT with SCSOA capability
T Standard Power MOSFET
DUnassembled chip (die)
40 Current rating, 40 = 40 A
NN-channel type
P P-channel type
60 Voltage class, 60 = 600 V
xx
MOSFET
APrime RDS(on) for standard MOSFET
Q Low gate charge die
Q2 Low gate charge die, 2nd generation
P PolarHTTM Power MOSFET
L Linear Mode MOSFET
IGBT
-- No letter, low VCE(sat)
A Or A2, std speed type
B Or B2, high speed type
C Or C2, very high speed type
W-CWP 55-12/18 (Thyristor Example)
WPackage type
CChip function
C = Silicon phase control thyristor
WUnassembled chip
PProcess designator
P = Planar passivated chip
cathode on top
55 Current rating value of one chip in A
12/18 Voltage class, 12/18 = 1200 up to 1800 V
Diode and Thyristor Chips
C-DWEP 69-12 (Diode Example)
CPackage type
DChip function
D = Silicon rectifier diode
WUnassembled chip
EP Process designator
EP = Epitaxial rectifier diode
N = Rectifier diode, cathode on top
P = Rectifier diode, anode on top
FN = Fast Rectifier diode, cathode on top
FP = Fast Rectifier diode, anode on top
69 Current rating value of one chip in A
-12 Voltage class, 12 = 1200 V
Registration No.:
001947 TS2/765/17557
Registration No.:
001947
Chip-Shortform2004.pmd 26.10.2004, 12:442
3
IXYS reserves the right to change limits, test conditions and dimensions
General Informations for Chips
When mounting Power Semiconductor chips to a header, ceramic substrate or hybrid thick film circuit, the solder system and the chip
attach process are very important to the reliability and performance of the final product. This brochure provides several guidelines
that describe recommended chip attachment pro-cedures. These methods have been used successfully for many years at IXYS.
Available forms of chip packings
IXYS offers various options.
Please order from one of the following possibilities:
Packaging Options Delivery form
C-...* Chips in tray (Waffle Pack); Electrically tested
T-...* Chips in wafer, unsawed; Bipolar = 5" (125 mm∅) wafer; Electrically tested, rejects are inked
W-...* Chips in wafer on foil, sawed; Bipolar = 5" (125 mm∅) wafer; Electrically tested, rejects are inked
...* must be amended by the exact chip type designation.
Packing, Storage and Handling
Chips should be transported in their original containers. All chip transfer to other containers or for assembly should be done only with
rubber-tipped vacuum pencils. Contact with human skin (or with a tool that has been touched by hand) leaves an oily residue that may
adversely impact subsequent chip attach or reliability.
At temperatures below 104°F (40°C), there is no limitation on storage time for chips in sealed original packages. Chips removed from
original packages should be assembled immediately. The wetting ability of the contact metallization with solder can be preserved by
storage in a clean and dry nitrogen atmosphere.
The IGBT and MOSFET Chips are electrostatic discharge (ESD) sensitive. Normal ESD precautions for handling must be observed.
Prior to chip attach, all testing and handling of the chips must be done at ESD safe work stations according to DIN IEC 47(CO) 701.
Ionized air blowers are recommended for added ESD protection.
Contamination of the chips degrades the assembly results.Finger prints, dust or oily deposits on the surface of the chips have to be
absolutely avoided.
Rough mechanical treatment can cause damage to the chip.
Electrical Tests
The electrical properties listed in the data sheet presume correctly assembled chips. Testing of non-assembled chips requires the
following precautions:
- High currents have to be supplied homogeneously to the whole metallized contact area.
- Kelvin probes must be used to test voltages at high currents
- Applying the full specified blocking or reverse voltage may cause arcing across the glass passivated junction termination, because
the electrical field on top of the passivation glass causes ionization of the surrounding air. This phenomenon can be avoided by using
inert fluids or by increasing the pressure of the gas surrounding the chip to values above 30 psig (2 bars).
General Rules for Assembly
The linear thermal expansion coefficient of silicon is very small compared to usual contact metals. If a large area metallized silicon
chip is directly soldered to a metal like copper, enormous shear stress is caused by temperature changes (e.g. when cooling down from
the solder temperature or by heating during working conditions) which can disrupt the solder mountdown.
If it is found that larger chips are cracking during mountdown or in the application, then the use of a low thermal expansion coefficient
buffer layer, e.g. tungsten, molybdenum or Trimetal®, for strain relief should be considered. An alternative solution is to soft-solder these
larger chips to DCB ceramic substrates because of their matching thermal expansion coefficients.
Chip-Shortform2004.pmd 26.10.2004, 12:443
4© 2004 IXYS All rights reserved
MOS/IGBT Chips
Recommended Solder System
IXYS recommends a soft solder chip attach using a solder composition of 92.5 % Pb, 5 % Sn and 2.5 % Ag. The maximum chip attach
temperature is 460°C for MOSFET and 360°C for HiPerFETTM and IGBT.
Wire Bonding
It is recommended to use wire of diameter not greater than 0.38 mm (0.015") for bonding to the source emitter and gate pads. Multiple
wires should be used in place of thicker wire to handle high drain or emitter currents. See tables for number of recommended wire
bonds. At smaller gate pads 0.15 mm is recommended.
Thermal Response Testing
To assure good chip attach processing, thermal response testing per MIL STD 750, Method 3161 or equivalent should be performed.
Bipolar Chips
Assembling
IXYS bipolar semiconductor chips have a soft-solderable, multi-layer metallization (Ti/Ni/Ag) on the bottom side and, on top, either
the same metallization scheme or an alumunium layer sufficiently thick for ultrasonic bonding. Note that the last layer of metal for
soldering is pure silver.
Regardless of their type all chips possess the same glass passivated junction termination system on top of the chip. For that reason
they can be easily chip bonded or they can all be simply soldered to a flat contacting electrode in accordance to the General Rules on
Page 3. All kinds of the usual soft solders with melting points below 660°F (350°C) can be used thanks to their pure silver top metal.
Solders with high melting points are preferable due to their better power cycling capability, i.e. they are more resistant to thermal
fatigue.
Soldering temperature should not exceed 750°F (400°C). The maximum temperature should not be applied for more than five
minutes.
As already mentioned above the electrical properties quoted in the data sheets can only be obtained with properly assembled chips.
This is only possible when all contact materials to be soldered together are well wetted and the solder is practically free of voids.
A simple means to achieve good solder connections is to use a belt furnace running with a process gas containing at least 10 %
Hydrogen in Nitrogen.
Other approved methods are also allowed, provided that the above mentioned temperature-time-limits are not exceeded and
temperature shocks above 930°F/min (500 K/min) are avoided.
We do not recommend the use of fluxes for soldering!
Ultrasonic Wire Bonding
Chips provided with a thick aluminium layer are designed for ultrasonic wire bonding. Wire diameters up to 500 µm can be used
dependent on chip types. Setting wires in parallel and application of stitch bonding lead to surge current ratings comparable to
soldered chips.
Coating
Although the chips are glass passivated, they must be protected against arcing and environmental influences. The coating material
that is in contact with the chip surface must have the following properties:
- elasticity (to prevent mechanical stress)
- high purity, no contamination with alkali metals
- good adhesion to metals and glass passivation.
Assembly Instructions
Chip-Shortform2004.pmd 26.10.2004, 12:444
5
IXYS reserves the right to change limits, test conditions and dimensions
FRED, Rectifier Diode and Thyristor Chips in Planar Design
Fast Recovery Epitaxial Diodes (FRED)
Power switches (IGBT, MOSFET, BJT, GTO) for applications in electronics are only as good as their associated free-wheeling
diodes. At increasing switching frequencies, the proper functioning and efficiency of the power switch, aside from conduction losses,
is determined by the turn-off behavior of the diode (characterized by Qrr, IRM and trr - Fig. 1.
Rectifier Diode and Thyristor Chips
The figures 3 a-c show cross sectional views of the diode and thyristor
chips in the passivation area. All thyristor and diode chips (DWN, DWFN,
CWP) are fabricated using separation diffusion processes so that all
junctions terminate on the topside of the chip. Now the entire bottom
surfaces of all chips are available for soldering onto a DCB or other ceramic
substrate without a molybdenum strain buffer. The elimination of the strain
buffer and its solder joint reduces thermal resistance and increases
blocking voltage stability. The junction termination areas are passivated
with glass, whose thermal expansion coefficient matches that of silicon. All
silicon chips increasingly use planar technology with guard rings and
channel stoppers to reduce electric fields on the chip surface.
The contact areas of the chips have vapor deposited metal layers which
contribute substantially to their high power cycle capability. All chips are
processed on silicon wafers of 5" diameter and diced after a wafer sample
test which auto-matically marks chips not meeting the electrical specification.
The chip geometry is square or rectangular.
Fig. 3a-c
Cross sections of Chips in the passivation area
a) Diode chip, type DWN, DWFN
b) Diode chip, type DWP, DWFP
c) Thyristor chip, type CWP
The reverse current character-istic following the peak reverse current IRM is
another very im-portant property. The slope of the decaying reverse current
dirr/dt results from design para- meters (technology and dif-fusion of the
FRED chip Fig. 2. In a circuit this current slope, in conjunction with parasitic
induc-tances (e.g. connecting leads, causes over-voltage spikes and high
frequency interference vol-tages.The higher the dirr/dt ("hard recovery" or
"snap-off" behavior) the higher is the resulting additional stress for both the
diode and the paralleled switch. A slow decay of the reverse current ("soft
recovery" behavior), is the most desirable characteristic, and this is designed
into all FRED. The wide range of available blocking voltages makes it
possible to apply these FRED as output rectifiers in switch-mode power
supplies (SMPS) as well as protective and free-wheeling diodes for power
switches in inverters and welding power supplies.
Metalization
Fig. 1: Current and voltage during turn-on and
turn-off switching of fast diodes
Fig. 2: Cross section of glassivated planar epitaxial
diode chip with seperation diffusion (type DWEP)
Epitaxie Schich t n-
Substrat n+
Kathode
Anode
Guard ring
Substrate n+
Epitaxy layer n-
Cathode
Anode
Glasspassivation
p
n
n+
GlasspassivationGuard ring
Metalization
Fig. 3b)
Metalization
Channel-
stopper
Glasspassivation
Guard ring
Emitter
Fig. 3c)
Glasspassivation
Metalization
Fig. 3a)
Chip-Shortform2004.pmd 26.10.2004, 12:445
18
© 2004 IXYS All rights reserved
Rectifier Diodes
Type
V
RRM
VJM
R
thJC
1
@I
F
typ.
V°CK/W AA/µs
DWN 5
800 -
0.7
150
12
2.80
1.14
1.14
7
140
tbd
tbd
tbd
DWP 5
1200
0.7
12
2.80
1.14
1.14
7
140
tbd
tbd
tbd
DWN 2
1200 -
0.7
12
2.80
1.14
1.14
7
150
tbd
tbd
tbd
DWN 9
1800
1.0
20
1.80
1.28
1.28
30
300
tbd
tbd
tbd
DWN 17
1.5
31
1.10
1.34
1.34
50
320
tbd
tbd
tbd
DWP 17
1.5
31
1.10
1.37
1.37
50
320
tbd
tbd
tbd
DWN 21
3.0
42
0.90
1.33
1.33
80
500
tbd
tbd
tbd
DWP 21
3.0
41
0.90
1.35
1.35
80
500
tbd
tbd
tbd
DWN 35
1.5
59
0.65
1.24
1.24
80
630
11
50
0.64
DWP 35
1.5
58
0.65
1.25
1.25
80
630
11
50
0.64
DWN 50
2.0
78
0.50
1.31
1.31
150
900
12
50
1
DWP 50
2.0
76
0.50
1.33
1.33
150
900
12
50
1
DWN 75
2.0
115
0.33
1.26
1.26
200
1500
24
50
3
DWP 75
2.0
118
0.35
1.27
1.27
200
1500
24
50
3
DWN 110
3.5
253
0.16
1.18
1.18
300
3200
45
50
6
DWP 110
3.5
253
0.16
1.18
1.18
300
3200
45
50
6
DWN 340
15.0
416
0.10
1.09
1.09
300
5900
235
30
50
DWN 108
1600 -
3.5
253
0.16
1.18
1.18
300
3200
45
50
6
DWN 347
2200
3.5
788
0.05
1.10
1.10
600
10500
45
40
50
1
Mounted on DCB
@-di/dt
IR
V
RRM
T
VJ M
typ. mA A
IF(AV)M VFIFSM Reverse Recovery
@IF
25°C 125°C
IRM
25°C; V
R
= 100 V
A
T
C
= 100°C
AVVA
rect. d = 0.5 T
VJ
=
Chip-Shortform2004.pmd 26.10.2004, 12:4418
19
© 2004 IXYS All rights reserved
DWN
DWP
Rectifier Diodes
Type Si-
thickn.
AB
mm mm mm
DWN 5
•
1123
4.40
2.10
0.265
DWP 5
•
716
4.40
2.10
0.265
DWN 2
•
1204
2.95
2.95
0.265
DWN 9
•
•
684
3.90
3.90
0.265
DWN 17
•
518
4.45
4.45
0.265
DWP 17
•
•
518
4.45
4.45
0.265
DWN 21
•
•
346
5.40
5.40
0.265
DWP 21
•
•
346
5.40
5.40
0.265
DWN 35
•
259
6.20
6.20
0.265
DWP 35
•
259
6.20
6.20
0.265
DWN 50
•
•
198
7.10
7.10
0.265
DWP 50
•
198
7.10
7.10
0.265
DWN 75
•
125
8.70
8.70
0.265
DWP 75
•
125
8.70
8.70
0.265
DWN 110
•
58
12.30
12.30
0.265
DWP 110
•
•
58
12.30
12.30
0.265
DWN 340
•
32
16.20
16.20
0.265
DWN 108
•
•
58
12.30
12.30
0.315
DWN 347
•
16
25.30
18.50
0.315
Tolerance
-0.1
-0.1
±5%
Wafer
DimensionsChips
per
solderable
bondable
Chip-Shortform2004.pmd 26.10.2004, 12:4419
20
© 2004 IXYS All rights reserved
FRED - Fast Recovery Epitaxial Diodes
Type
V
RRM
T
VJM
R
thJC
1
T
VJ
= @-di/dt
t
rr
@I
F
typ. 25°C @ V
R
= 30 V
V °C K/W V V °C typ. ns A
DWEP 27-02
200
5.0
150
54
0.9
1.09
0.84
150
30
300
4
50
100
35
1
100
DWEP 37-02
11.0
91
tbd
1.03
0.87
150
100
475
4
100
100
35
1
200
DWEP 77-02
20.0
244
0.4
1.12
0.87
150
125
1200
2
12.5
25
tbd
1
350
DWEP 8-06
600
1.5
tbd
2.5
1.65
1.48
150
8
50
5
12
100
tbd
tbd
tbd
DWEP 12-06
1.5
8
2.5
1.45
1.31
150
8
100
5
25
100
35
1
50
DWEP 15-06
3.0
12
1.6
1.65
1.48
150
16
100
5
25
100
35
1
50
DWEP 23-06
7.0
30
0.9
1.53
1.33
150
30
250
5
50
100
35
1
100
DWEP 25-06
7.0
30
0.9
1.53
1.38
150
43
300
5
50
100
35
1
100
DWEP 35-06
14.0
60
0.8
1.73
1.48
150
70
550
5
100
100
35
1
200
DWEP 55-06
17.0
80
0.7
1.58
1.38
125
75
600
5
100
100
35
1
200
DWEP 75-06
20.0
162
0.4
1.31
1.10
125
75
1000
20
80
200
35
1
350
DWEP 3-10
1000
2.0
tbd
2.5
2.65
2.09
150
6
40
7
12
100
tbd
tbd
tbd
DWEP 10-10
4.0
12
1.6
2.65
2.09
150
12
75
5
25
100
35
1
50
DWEP 18-10
7.0
30
0.9
2.43
2.04
150
30
200
7
50
100
35
1
100
DWEP 20-10
7.0
30
0.9
2.35
1.99
150
36
200
7
50
100
35
1
100
DWEP 30-10
14.0
60
0.8
2.24
1.79
150
60
500
7
100
100
35
1
200
DWEP 50-10
17.0
82
0.7
2.12
1.68
125
50
500
6
50
120
35
1
200
DWEP 70-10
20.0
129
0.4
1.89
1.57
125
75
800
14
80
200
35
1
350
DWEP 6-12
1200
2.0
tbd
2.5
2.55
2.19
150
5
80
7
10
100
tbd
tbd
tbd
DWEP 9-12
4.0
12
1.6
2.55
2.19
150
12
75
5
25
100
50
1
50
DWEP 17-12
7.0
30
0.9
2.60
2.19
150
30
200
7
50
100
40
1
100
DWEP 19-12
7.0
30
0.9
2.50
2.19
150
30
200
7
50
100
40
1
100
DWEP 29-12
14.0
60
0.7
2.35
1.94
150
60
500
7
100
100
40
1
200
DWEP 49-12
17.0
77
0.7
2.19
1.89
125
50
500
9
50
100
40
1
200
DWEP 69-12
20.0
123
0.4
1.77
1.54
125
75
800
20
75
200
40
1
350
1
Mounted on DCB
IR
V
RRM
125°C
mA
rect. d = 0.5 @IF
T
C
= 100°C
IF(AV)M IFSM
VF
A/µs
@-di/dt
Reverse Recovery
A
IRM @IF
AAA
25°C; V
R
= 100 V
Chip-Shortform2004.pmd 26.10.2004, 12:4420
21
© 2004 IXYS All rights reserved
FRED - Fast Recovery Epitaxial Diodes
Type Si-
thickn.
AB
mm mm mm
DWEP 27-02
•
518
4.45
4.45
0.35
DWEP 37-02
•
257
6.20
6.20
0.35
DWEP 77-02
•
•
151
8.91
7.22
0.35
DWEP 8-06
•
1612
3.60
1.80
0.35
DWEP 12-06
•
•
1851
2.40
2.40
0.35
DWEP 15-06
•
•
990
3.25
3.25
0.35
DWEP 23-06
•
•
531
5.50
3.50
0.35
DWEP 25-06
•
•
518
4.45
4.45
0.35
DWEP 35-06
•
•
257
6.20
6.20
0.35
DWEP 55-06
•
230
8.65
4.95
0.35
DWEP 75-06
•
•
151
8.91
7.22
0.35
DWEP 3-10
•
1612
1.80
3.60
0.35
DWEP 10-10
•
990
3.25
3.25
0.35
DWEP 18-10
•
531
5.50
3.50
0.35
DWEP 20-10
•
518
4.45
4.45
0.35
DWEP 30-10
•
•
257
6.20
6.20
0.35
DWEP 50-10
•
230
8.65
4.95
0.35
DWEP 70-10
•
151
8.91
7.22
0.35
DWEP 6-12
•
1851
2.40
2.40
0.35
DWEP 9-12
•
•
990
3.25
3.25
0.35
DWEP 17-12
•
•
531
5.50
3.50
0.35
DWEP 19-12
•
•
518
4.45
4.45
0.35
DWEP 29-12
•
•
257
6.20
6.20
0.35
DWEP 49-12
•
•
230
8.65
4.95
0.35
DWEP 69-12
•
•
151
8.91
7.22
0.35
Tolerance
-0.1
-0.1
±5%
Chips
per
Wafer
Dimensions
solderable
bondable
Chip-Shortform2004.pmd 26.10.2004, 12:4421
22
© 2004 IXYS All rights reserved
Low Leakage Fast Recovery Epitaxial Diodes
Type
V
RRM
I
R
VJM
R
thJC
1
V
RRM
I
RM
@-di/dt
t
rr
@I
F
VJ M
typ.
25°C; V
R
= 100 V
V
R
= 30 V
V mA °C K/W A typ. ns A
DWLP 4-02
200
0.20
175
14
2.50
1.21
0.75
5
80
2.4
10
100
25
1
50
DWLP 15-02
0.50
29
1.60
0.99
0.74
12
140
2.4
25
100
25
1
100
DWLP 15-02B
0.50
25
1.60
1.13
0.78
12
140
1.1
25
100
25
1
100
DWLP 25-02
0.20
46
0.90
1.10
0.80
30
325
2.0
50
100
25
1
200
DWLP 4-03
300
0.20
13
2.80
1.63
0.96
5
40
1.3
10
100
30
1
50
DWLP 8-03
0.25
15
2.50
1.45
0.95
6
60
1.4
12
100
30
1
50
DWLP 15-03
0.50
25
1.60
1.44
0.94
12
110
1.4
25
100
30
1
100
DWLP 15-03A
0.50
29
1.60
1.26
0.60
12
110
1.4
25
100
30
1
100
DWLP 23-03
1.00
51
0.90
1.19
0.77
30
300
3.0
50
100
30
1
200
DWLP 23-03A
1.00
41
0.90
1.49
0.99
30
300
1.9
50
100
25
1
200
DWLP 55-03
2.50
72
0.65
1.42
0.91
60
600
2.8
130
100
30
1
300
DWLP 75-03
4.00
117
0.40
1.43
0.92
100
1000
3.2
200
100
30
1
400
DWLP 8-04
400
0.25
14
2.50
1.40
0.91
6
60
1.4
12
100
30
1
50
DWLP 15-04
0.50
24
1.60
1.40
0.90
12
110
2.5
25
100
30
1
100
DWLP 23-04
1.00
46
0.90
1.43
0.93
30
300
2.5
50
100
30
1
200
DWLP 55-04
2.50
67
0.65
1.12
0.81
60
600
3.5
130
100
30
1
300
DWLP 75-04
4.00
117
0.40
1.39
0.89
100
1000
4.0
200
100
30
1
400
DWLP 150-04
8.50
148
0.35
6.14
9.72
300
1200
9.5
200
100
30
1
800
DWLP 4-06
600
0.20
11
2.80
1.97
1.14
5
40
2.6
10
100
30
1
50
DWLP 8-06A
0.25
12
2.50
1.95
1.13
6
50
2.6
12
100
35
1
50
DWLP 8-06B
0.25
11
2.50
2.39
1.25
6
50
1.4
12
100
30
1
50
DWLP 15-06A
0.50
21
1.60
1.95
1.12
12
110
2.9
25
100
35
1
100
DWLP 15-06B
0.50
16
1.60
2.38
1.23
12
110
1.5
25
100
35
1
100
DWLP 23-06A
1.00
40
0.90
1.54
1.10
30
250
3.5
50
100
35
1
200
DWLP 23-06B
2.00
30
0.90
2.45
1.35
30
250
2.0
50
100
30
1
200
DWLP 55-06
2.50
62
0.65
1.92
1.10
60
600
4.0
130
100
35
1
300
DWLP 75-06
4.00
99
0.40
1.93
1.11
100
1000
4.5
200
100
35
1
400
DWLP 8-12
1200
0.25
9
2.50
2.61
1.46
6
40
5.0
12
100
40
1
50
DWLP 15-12
0.50
14
1.60
2.45
1.52
12
90
5.7
25
100
40
1
100
DWLP 23-12
1.00
29
0.90
2.68
1.52
30
200
6.7
50
100
40
1
200
DWLP 55-12
2.50
48
0.65
2.54
1.40
60
500
7.0
130
100
40
1
300
DWLP 75-12
4.00
78
0.40
2.56
1.42
100
800
7.4
200
100
40
1
400
1
MountedonDCB
Reverse Recovery
@-di/dt
@I
F
175°C
VJ
=
V
F
V
@I
F
I
FSM
I
F(AV)M
rect. d = 0.5
C
= 100°C
AA/µs
25°C
VAA
Chip-Shortform2004.pmd 26.10.2004, 12:4422
23
© 2004 IXYS All rights reserved
Low Leakage Fast Recovery Epitaxial Diodes
Type
Si-
thickn.
A
B
mm mm mm
DWLP 4-02
•
1960
3.00
1.80
0.37
DWLP 15-02
•
990
3.25
3.25
0.37
DWLP 15-02B
•
990
3.25
3.25
0.37
DWLP 25-02
•
518
4.45
4.45
0.37
DWLP 4-03
•
1960
3.00
1.80
0.37
DWLP 8-03
•
1612
3.60
1.80
0.37
DWLP 15-03
•
990
3.25
3.25
0.37
DWLP 15-03A
•
990
3.25
3.25
0.37
DWLP 23-03
•
531
5.50
3.50
0.37
DWLP 23-03A
•
531
5.50
3.50
0.37
DWLP 55-03
•
•
230
8.65
4.95
0.37
DWLP 75-03
•
151
8.91
7.22
0.37
DWLP 8-04
•
1612
3.60
1.80
0.38
DWLP 15-04
•
990
3.25
3.25
0.38
DWLP 23-04
•
531
5.50
3.50
0.38
DWLP 55-04
•
•
230
8.65
4.95
0.38
DWLP 75-04
•
•
151
8.91
7.22
0.38
DWLP 150-04
•
•
74
13.00
9.77
0.38
DWLP 4-06
•
1960
3.00
1.80
0.40
DWLP 8-06A
•
1612
3.60
1.80
0.40
DWLP 8-06B
•
1612
3.60
1.80
0.40
DWLP 15-06A
•
990
3.25
3.25
0.40
DWLP 15-06B
•
990
3.25
3.25
0.40
DWLP 23-06A
•
531
5.50
3.50
0.40
DWLP 23-06B
•
531
5.50
3.50
0.40
DWLP 55-06
•
•
230
8.65
4.95
0.40
DWLP 75-06
•
•
151
8.91
7.22
0.40
DWLP 8-12
•
1612
3.60
1.80
0.46
DWLP 15-12
•
990
3.25
3.25
0.46
DWLP 23-12
•
531
5.50
3.50
0.46
DWLP 55-12
•
•
230
8.65
4.95
0.46
DWLP 75-12
•
151
8.91
7.22
0.46
Tolerance
-0.1
-0.1
±5%
Chips
per
Wafer
Dimensions
solderable
bondable
Chip-Shortform2004.pmd 26.10.2004, 12:4423
24
© 2004 IXYS All rights reserved
SONIC-FRD
TM
Diodes
Type
V
RRM
I
R
T
VJM
R
thJC
1
V
RRM
125°C typ. 25°C
Vtyp. mA°C K/W V A
DWHP 8-06 F
in design
tbd
150
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
DWHP 15-06 F
600
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
DWHP 23-06 F
tbd
tbd
0.90
1.94
1.68
20
200
tbd
tbd
20
200
DWHP 56-06 F
tbd
tbd
0.65
2.04
1.78
60
450
tbd
tbd
60
450
DWHP 69-06 F
tbd
tbd
0.40
2.05
1.80
100
750
tbd
tbd
100
750
DWHP 150-06 F
in design
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
DWHFP 15-12 F
1200
0.1
12
0.90
3.08
2.61
10
100
tbd
tbd
10
100
DWHFP 23-12 F
0.2
17
0.90
2.97
2.49
20
200
7
65
20
200
DWHFP 56-12 F
0.6
29
0.65
3.15
2.70
60
450
18
50
60
450
DWHFP 56-12 S
0.6
37
0.65
2.12
1.98
60
450
28
175
60
tbd
DWHFP 69-12 F
1
47
0.40
3.17
2.72
100
750
36
125
100
750
DWHFP 69-12 S
1
60
0.40
2.13
1.99
100
750
53
330
100
750
DWHFP 150-12 S
1.5
150
tbd
2.00
1.87
150
1150
54
170
150
1150
DLFP 55-17 S
1700
0.6
31
0.65
2.35
2.46
60
350
30
tbd
60
400
DLFP 68-17 S
1
51
0.40
2.34
2.44
100
650
50
150
100
600
DLFP 150-17 S
1.8
tbd
0.22
1.95
2.03
tbd
1150
78
350
150
1150
DLFP 200-17 S
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
tbd
DLFP 15-16/18 F
1600-
0.1
12
0.90
3.01
3.08
10
50
tbd
tbd
10
50
DLFP 25-16/18 F
1800
0.2
16
0.90
2.86
2.90
20
150
21
180
20
450
DLFP 55-16/18 F
0.6
27
0.65
2.90
2.94
60
350
30
330
60
450
DLFP 68-16/18 F
1
44
0.40
2.89
2.93
100
650
50
240
100
800
1
Mounted on DCB
25°C
typ. A A/µs
@-di/dt
rect. d = 0.5 trr @IF
IRM
AVAA
T
VJ
= @IF
Reverse Recovery
ns
typ.
IF(AV)M VFIFSM
T
C
= 100°C 150°C
Chip-Shortform2004.pmd 26.10.2004, 12:4424
25
© 2004 IXYS All rights reserved
SONIC-FRD
TM
Diodes
Type Si-
thickn.
mm
DWHP 8-06 F
•
tbd
3.60
1.80
0.180
DWHP 15-06 F
•
968
3.25
3.25
DWHP 23-06 F
•
532
5.50
3.50
DWHP 56-06 F
•
231
8.65
4.95
DWHP 69-06 F
•
152
8.91
7.22
DWHP 150-06 F
•
88
11.40
9.40
DWHFP 15-12 F
•
968
3.25
3.25
DWHFP 23-12 F
•
532
5.50
3.50
DWHFP 56-12 F
•
231
8.65
4.95
DWHFP 56-12 S
•
231
8.65
4.95
DWHFP 69-12 F
•
152
8.91
7.22
DWHFP 69-12 S
•
152
8.91
7.22
DWHFP 150-12 S
•
88
11.40
9.40
DLFP 55-17 S
•
231
8.65
4.95
0.265
DLFP 68-17 S
•
152
8.91
7.22
DLFP 150-17 S
•
88
11.40
9.40
DLFP 200-17 S
•
59
12.40
12.40
DLFP 15-16/18 F
•
968
3.25
3.25
DLFP 25-16/18 F
•
532
4.45
4.45
DLFP 55-16/18 F
•
231
8.65
4.95
DLFP 68-16/18 F
•
152
8.91
7.22
Tolerance
-0.1
-0.1
±5%
bondable
Chips
Wafer
solderable
mm
Dimensions
B
mm
per
A
Chip-Shortform2004.pmd 26.10.2004, 12:4425
26
© 2004 IXYS All rights reserved
GaAs Schottky Diodes
Type
V
RRM
T
VJM
25°C 125°C
V°C V V
DWGS04-01A
100
175
8.5
10.12
0.62
0.54
2.0
700
19.0
12.5
DWGS10-01C
25.0
5.20
0.99
0.94
10.0
< 10
19.0
80.0
DWGS04-018A
180
5.0
10.12
0.85
0.85
2.0
700
8.8
12.5
DWGS04-018C
8,4
10.12
1.25
1.02
4.0
< 10
8.8
32.0
DWGS10-018A
11.0
5.20
0.80
0.80
5.0
1300
22.0
30.0
DWGS10-018C
15.0
5.20
1.21
1.04
10.0
< 10
22.0
80.0
DWGS20-018A
17.0
3.70
0.80
0.80
7.5
2000
33.0
50.0
DWGS20-018C
23.0
3.70
1.24
1.07
20.0
< 10
33.0
120.0
DWGS04-025A
250
3.9
10.12
1.30
1.30
2.0
700
6.4
12.5
DWGS04-025C
7.8
10.12
1.26
1.05
4.0
< 10
6.4
32.0
DWGS10-025A
9.0
5.20
1.25
1.25
5.0
1300
18.0
30.0
DWGS10-025C
14.0
5.20
1.26
1.07
10.0
< 10
18.0
80.0
DWGS20-025A
13.0
3.70
1.25
1.25
7.5
2000
26.0
50.0
DWGS20-025C
20.0
3.70
1.24
1.10
20.0
< 10
26.0
120.0
DWGS04-03A
300
3.5
10.12
1.60
1.60
2.0
700
3.7
12.5
DWGS04-03C
6.0
10.12
1,56
1,10
4.0
< 10
3.7
32.0
DWGS10-03A
8.0
5.20
1.60
1.60
5.0
1300
9.0
30.0
DWGS10-03C
17.5
5.20
1.56
1.11
10.0
10
9.0
80.0
DWGS20-03C
25.0
3.70
1,56
1,14
20.0
15
14.0
120.0
@V
RRM
125°C
IR typIF(AV)M VF typ
µA
RthJC
rect. T
C
= 90°C T
VJ
= @IF
AK/W A
d = 0.5 typ.
pF A
125°C
0,5*V
RRM
IFSM
Cj
Chip-Shortform2004.pmd 26.10.2004, 12:4426
27
© 2004 IXYS All rights reserved
GaAs Schottky Diodes
Chips
per
Wafer AB
mm mm
DWGS04-01A
•
4060
1.30
1.30
DWGS10-01C
•
2126
2.10
1.60
DWGS04-018A
•
4060
1.30
1.30
DWGS04-018C
•
4060
1.30
1.30
DWGS10-018A
•
2126
2.10
1.60
DWGS10-018C
•
2126
2.10
1.60
DWGS20-018A
•
1480
3.00
1.60
DWGS20-018C
•
1480
3.00
1.60
DWGS04-025A
•
4060
1.30
1.30
DWGS04-025C
•
4060
1.30
1.30
DWGS10-025A
•
2126
2.10
1.60
DWGS10-025C
•
2126
2.10
1.60
DWGS20-025A
•
1480
3.00
1.60
DWGS20-025C
•
1480
3.00
1.60
DWGS04-03A
•
4060
1.30
1.30
DWGS04-03C
•
4060
1.30
1.30
DWGS10-03A
•
2126
2.10
1.60
DWGS10-03C
•
2126
2.10
1.60
DWGS20-03C
•
1480
3.00
1.60
Tolerance
-0.1
-0.1
Dimensions
solderable
bondable
Chip-Shortform2004.pmd 26.10.2004, 12:4427
28
© 2004 IXYS All rights reserved
Schottky Diodes
Type
V
RRM
T
VJM
R
thJC
1
I
RM
t
rr
typ. 25°C 25°C typ.
V°C K/WV AnsA
DWS 39-08D
8
145
1)
150
145
1)
0.8
0.31
0.18
60
1000
tbd
tbd
50
200
DWS 9-15B
15
tbd
150
tbd
1.7
0.40
0.28
10
160
tbd
tbd
tbd
tbd
DWS 19-15B
65
1)
150
65
1)
1.4
0.39
0.24
20
350
tbd
tbd
20
200
DWS 29-15B
98
1)
150
98
1)
1.1
0.39
0.25
40
660
tbd
tbd
40
200
DWS 7-30B
30
tbd
tbd
tbd
tbd
0.63
0.43
10
tbd
tbd
tbd
tbd
tbd
DWS 17-30B
tbd
150
tbd
1.4
tbd
tbd
20
330
2.40
tbd
20
200
DWS 27-30B
82
1)
150
82
1)
1.1
0.42
0.29
40
520
tbd
tbd
40
200
DWS 37-30B
102
1)
150
102
1)
0.8
0.40
0.27
40
800
tbd
tbd
50
200
DWS 217-30B
65
1)
150
65
1)
1.2
0.41
0.30
28
420
5.50
tbd
30
200
DWS 3-45B
45
28
1)
150
28
1)
1.7
0.48
0.41
10
160
1.00
tbd
10
200
DWS 4-45A
32
175
32
1.7
0.66
0.50
10
140
1.00
tbd
10
200
DWS 13-45B
42
1)
150
42
1)
1.4
0.48
0.41
20
320
1.40
tbd
20
200
DWS 14-45A
47
175
47
1.4
0.66
0.50
20
280
1.50
tbd
20
200
DWS 23-45B
63
1)
150
63
1)
1.1
0.48
0.42
40
640
2.00
tbd
40
200
DWS 24-45A
68
175
68
1.1
0.66
0.50
40
550
2.00
tbd
40
200
DWS 33-45B
89
1)
150
89
1)
0.8
0.48
0.41
60
900
2.60
tbd
50
200
DWS 34-45A
95
175
95
0.8
0.66
0.51
60
800
2.50
tbd
50
200
1
Mounted on DCB
T
C
= 125°C
mA A
1) = 100°C
IR
V
RRM
125°C
1) = 100°C
rect. d = 0.5
IF(AV)M
@IF @-di/dt
Reverse Recovery
T
VJ
= @IF
A version: 150°C
VAA
VFIFSM
A/µs
B version: 125°C
Chip-Shortform2004.pmd 26.10.2004, 12:4428
29
© 2004 IXYS All rights reserved
Schottky Diodes
Type Si-
thickn.
AB
mm mm mm
DWS 39-08D
•
343
5.40
5.40
0.25/0.43
DWS 9-15B
•
1886
2.40
2.40
0.25/0.43
DWS 19-15B
•
990
3.25
3.25
DWS 29-15B
•
515
4.45
4.45
DWS 7-30B
•
2857
2.40
2.40
0.25
DWS 17-30B
•
990
3.25
3.25
DWS 27-30B
•
515
4.45
4.45
DWS 37-30B
•
515
5.40
5.40
DWS 217-30B
•
729
3.25
4.45
DWS 3-45B
•
2857
2.40
2.40
DWS 4-45A
•
1886
2.40
2.40
DWS 13-45B
•
1515
3.25
3.25
DWS 14-45A
•
990
3.25
3.25
DWS 23-45B
•
•
757
4.45
4.45
DWS 24-45A
•
757
4.45
4.45
DWS 33-45B
•
•
515
5.40
5.40
DWS 34-45A
•
•
515
5.40
5.40
Tolerance
-0.1
-0.1
±5%
Dimensions
per
solderable
bondable
Wafer
Chips
Chip-Shortform2004.pmd 26.10.2004, 12:4429
30
© 2004 IXYS All rights reserved
Schottky Diodes
Type
V
RRM
T
VJM
R
thJC
1
I
RM
t
rr
typ. 25°C 25°C typ.
V°C K/WV AnsA
DWS 5-60A
60
tbd
175
tbd
1.7
tbd
tbd
10
170
tbd
tbd
tbd
tbd
DWS 15-60B
43
150
43
1.4
0.60
0.60
20
320
tbd
tbd
20
200
DWS 25-60B
63
1)
150
63
1.1
0.59
0.50
40
660
tbd
tbd
40
200
DWS 35-60B
82
1)
150
82
0.8
0.53
0.48
60
900
2.50
tbd
50
200
DWS 25-80B
80
66
1)
150
66
1.1
0.70
0.55
40
660
1.50
tbd
40
200
DWS 36-80A
91
175
91
0.8
0.74
0.58
60
700
2.00
tbd
50
200
DWS 2-100A
100
32
175
32
1.7
0.77
0.57
10
120
2.00
tbd
10
200
DWS 12-100A
45
175
45
1.4
0.78
0.57
20
230
2.30
tbd
20
200
DWS 22-100A
65
175
65
1.1
0.78
0.58
40
450
2.60
tbd
40
200
DWS 32-100A
92
175
92
0.8
0.77
0.57
60
700
3.40
tbd
50
200
DWS 1-150A
150
30
175
30
1.7
0.81
0.62
10
120
3.00
tbd
10
200
DWS 11-150A
43
175
43
1.4
0.81
0.62
20
200
4.00
tbd
20
200
DWS 21-150A
60
175
60
1.1
0.81
0.63
40
450
tbd
tbd
40
200
DWS 31-150A
85
175
85
0.8
0.81
0.62
60
700
4.50
tbd
50
200
DWS 1-180A
180
30
175
30
1.7
0.81
0.62
10
120
3.50
tbd
10
200
DWS 30-200A
200
tbd
175
tbd
0.8
0.00
0.00
60
700
5.00
tbd
50
200
1
Mounted on DCB
mA
1) = 100°C 1) = 100°C
IR
V
RRM
125°C
IF(AV)M Reverse RecoveryVFIFSM
A/µs
@IF @-di/dt
rect. d = 0.5 T
VJ
= @IF
T
C
= 125°C 150°C
AVAA
Chip-Shortform2004.pmd 26.10.2004, 12:4430
31
© 2004 IXYS All rights reserved
Schottky Diodes
Type Si-
thickn.
AB
mm mm mm
DWS 5-60A
•
2857
2.40
2.40
0.25
DWS 15-60B
•
990
3.25
3.25
DWS 25-60B
•
757
4.45
4.45
DWS 35-60B
•
515
5.40
5.40
DWS 25-80B
•
515
4.45
4.45
DWS 36-80A
•
343
5.40
5.40
DWS 2-100A
•
1886
2.40
2.40
DWS 12-100A
•
990
3.25
3.25
DWS 22-100A
•
757
4.45
4.45
DWS 32-100A
•
•
515
5.40
5.40
DWS 1-150A
•
2857
2.40
2.40
DWS 11-150A
•
1515
3.25
3.25
DWS 21-150A
•
757
4.45
4.45
DWS 31-150A
•
515
5.40
5.40
DWS 1-180A
•
1886
2.40
2.40
DWS 30-200A
•
515
5.40
5.40
Tolerance
-0.1
-0.1
±5%
Wafer
solderable
Dimensions
per
Chips
bondable
Chip-Shortform2004.pmd 26.10.2004, 12:4431
32
© 2004 IXYS All rights reserved
Phase Control Thyristors
Type
V
DRM
T
VJM
R
thJC
1
V
RRM
dv/dt
@t
p
max. 150°C
V °C K/W V V/µs mA µs
CWP 7-CG
800 -
5
125
15
1)
1.7
1.55
1.41
20
200
tbd
tbd
tbd
50
75
10
CWP 8
1200
4
150
tbd
1.7
1.53
1.53
44
300
60
20
16
40
100
10
CWP 8-CG
4
150
tbd
1.7
1.53
1.53
44
300
60
20
16
80
100
10
CWP 35
20
150
tbd
0.7
1.46
1.49
150
1200
100
10
50
80
100
10
CWP 16-CG
1200 -
8
150
25
1.2
1.40
1.41
45
400
150
10
11
100
150
10
CWP 21-CG
1600 -
12
61
1.1
1.56
1.57
80
520
150
20
15
100
150
10
CWP 22-CG
12
36
0.9
1.55
1.57
80
520
150
15
20
100
450
10
CWP 24
20
tbd
0.9
1.33
tbd
60
600
60
20
25
100
200
10
CWP 25-CG
20
tbd
0.9
1.33
1.31
60
600
60
20
25
100
200
10
CWP 41
1200 -
20
125
0.5
1.53
1.58
200
1150
150
20
120
200
450
10
CWP 50
1800
20
tbd
0.6
1.38
1.38
200
1500
150
20
150
200
450
10
CWP 55
20
tbd
0.5
1.29
1.26
200
1900
150
20
150
200
450
10
CWP 71
20
tbd
0.4
1.35
1.35
300
2400
185
20
150
200
450
10
CWP 130
30
204
0.2
1.21
1.16
350
4750
150
20
160
200
300
30
CWP 180
40
372
0.2
1.22
1.17
450
5200
150
20
300
200
300
30
CWP 341
40
tbd
0.2
1.21
1.17
600
7000
200
50
300
150
200
30
CWP 347
60
540
0.1
1.17
1.11
600
9500
200
50
300
150
200
30
CWP 69
1600 -
20
tbd
0.2
1.55
tbd
300
1700
185
20
150
150
200
30
CWP 339
2200
40
tbd
0.2
1.26
tbd
300
6000
150
20
160
150
200
30
CWP 345
60
520
0.1
1.34
1.34
600
8000
200
50
300
150
200
30
1
MountedonDCB
rect. d = 0.5 T
VJ
= @ITnon-rep.
IT(AV)M VTITSM
T
C
= 100°C 25°C t
p
= 10ms
AA
1) = 75°C
AVA
IL
@IT
T
VJ
= 25°C
V
R
= 100V, V
D
= 2/
3
V
DRM
t
p
= 200µs, di/dt = -10A/µs
T
VJ
= T
VJM
µsmA
IH
R
GK
= ∝
V
D
= 6 V
T
VJ
= 25°C
ns
tq
IR
V
RRM
T
VJ M
Chip-Shortform2004.pmd 26.10.2004, 12:4432
33
© 2004 IXYS All rights reserved
Phase Control Thyristors
...-CG types
Type Chips Si-
per thickn.
Wafer FG
JLM
mm mm mm mm mm mm
CWP 7-CG
•
•
518
4.45
4.45
-
-
0.2
1.1
1.6
0.38
CWP 8
•
•
375
5.20
5.20
1.80
0.90
-
-
-
0.38
CWP 8-CG
•
375
5.20
5.20
1.80
0.90
0.2
1.1
1.6
0.32
CWP 35
•
•
125
8.70
8.70
1.80
1.00
-
-
-
0.38
CWP 16-CG
•
•
239
6.50
6.50
-
-
0.2
1.1
1.6
0.38
CWP 21-CG
•
•
196
7.10
7.10
-
-
0.2
1.1
1.6
0.38
CWP 22-CG
•
•
196
7.10
7.10
-
-
0.2
1.1
1.6
0.38
CWP 24
•
•
196
7.10
7.10
1.80
1.00
-
-
-
0.32
CWP 25-CG
•
•
196
7.10
7.10
-
-
0.2
1.1
1.6
0.32
CWP 41
•
•
94
10.00
10.00
2.30
1.50
-
-
-
0.38
CWP 50
•
•
74
13.00
9.77
2.30
1.50
-
-
-
0.38
CWP 55
•
•
58
12.30
12.30
2.30
1.50
-
-
-
0.38
CWP 71
•
•
50
13.40
13.40
2.30
1.50
-
-
-
0.38
CWP 130
•
•
29
19.05
15.40
3.46
2.50
-
-
-
0.38
CWP 180
•
•
20
20.55
17.65
3.50
2.50
-
-
-
0.38
CWP 341
•
16
25.30
18.50
3.50
2.50
-
-
-
0.38
CWP 347
•
13
23.40
23.40
3.50
2.50
-
-
-
0.38
CWP 69
•
50
13.40
13.40
2.30
1.50
-
-
-
0.46
CWP 339
•
16
18.50
25.30
3.50
2.50
-
-
-
0.46
CWP 345
•
13
23.40
23.40
3.50
2.50
-
-
-
0.46
Tolerance
-0.1
-0.1
-0.1
+0.1
-0.1
+0.1
+0.1
±5%
mm
solderable
bondable
Dimensions
mm
Corner GateAB
Chip-Shortform2004.pmd 26.10.2004, 12:4433
34
© 2004 IXYS All rights reserved
DWFN DWFP
Fast Rectifier Diodes
Type
V
RRM
T
VJM
I
F(AV)M
R
thJC
1
rect. d = 0.5
I
RM
@I
F
@-di/dt
t
rr
T
C
= 75°C typ. 25°C typ.
V°CAK/W A µsA
DWFN 2-16/18
1600 -
2
125
10
2.9
1.79
tbd
10
75
tbd
tbd
tbd
1.5
4
5
DWFN 9-16/18
1800
4
16
1.6
1.98
tbd
30
160
tbd
tbd
tbd
1.5
8
5
DWFN 17-16/18
5
17
1.3
1.89
tbd
55
300
tbd
tbd
tbd
1.5
10
10
DWFP 17-16/18
5
17
1.3
2.10
tbd
55
300
tbd
tbd
tbd
1.5
10
10
DWFN 21-16/18
8
23
0.9
1.98
tbd
70
400
tbd
tbd
tbd
1.5
15
15
DWFN 35-16/18
10
26
0.7
1.88
tbd
80
500
tbd
tbd
tbd
1.5
25
25
1
Mounted on DCB
IR
V
RRM
T
VJ M
typ. mA AA/µsVVA
25°C 125°C
@-di/dt
Reverse Recovery
T
VJ
= @IF @IF
VFIFSM
Type Si-
thickn.
AB
mm mm mm
DWFN 2-16/18
•
1204 2.95 2.95 0.265
DWFN 9-16/18
•
684 3.90 3.90 0.265
DWFN 17-16/18
•
•
518 4.45 4.45 0.265
DWFP 17-16/18
•
•
239 4.45 4.45 0.265
DWFN 21-16/18
•
346 5.40 5.40 0.265
DWFN 35-16/18
•
259 6.20 6.20 0.265
Tolerance -0.1 -0.1 ±5%
per
solderable
Wafer
bondable
Chips Dimensions
Chip-Shortform2004.pmd 26.10.2004, 12:4434