DS04-27709-6Ea
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2001-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2006.5
ASSP F or P ower Supply Applications (Secondary battery)
DC/DC Converter IC
for Charging Li-ion batter y
MB3887
■DESCRIPTION
The MB3887 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and
enabling output voltage to be set to any desired level from one cell to four cells.
These ICs c an d yn ami ca ll y c ontr o l the sec on dary bat tery ’s char ge c ur rent by detec ti ng a voltage dro p in an AC
adapter in order to keep its power constant (dynamically-controlled charging) .
The charging method enables quick charging, for example, with the AC adapter during operation of a notebook PC.
The MB 3887 provides a broad power supply voltage rang e and low standby curr ent as well as high efficie ncy,
making it ideal for use as a built-in charging device in products such as notebook PC.
This product is covered by US Patent Number 6,147,477.
■FEATURES
• Detecting a voltage drop in the AC adapter and dynamically controlling the charge current
(Dynamica ll y-contr ol led chargi ng )
• Output voltage setting using external resistor : 1 cell to 4 cells
• High efficiency : 96% (V IN = 19 V, Vo = 16.8 V)
• Wide range of operating supply voltages : 8 V to 25 V
• Output voltage setting accuracy : 4.2 V ± 0.74% (Ta = −10 °C to +85 °C , per cell)
• Charging current accuracy : ±5%
• Built-in frequency setting capacitor enables frequency setting using external resistor only
• Oscillation frequency range : 100 kHz to 500 kHz
• Built-in current detection amplifier with wide in-phase input voltage range : 0 V to VCC
• In standby mode, leave output voltage setting resistor open to prevent inefficient current loss
• Built-in standby current function : 0 µA (standard)
• Built-in soft-start function independent of loads
• Built-in totem-pole output stage supporting P-channel MOS FET devices
• One type of package (SSOP-24pin : 1 type)
■Application
• Notebook PC
MB3887
2
■PIN ASSIGNMENT
(TOP VIE W)
(FPT-24P-M03)
1
2
3
4
5
6
7
8
9
10
11
12
−INC2 :
OUTC2 :
+INE2 :
−INE2 :
FB2 :
VREF :
FB1 :
−INE1 :
+INE1 :
OUTC1 :
OUTD :
−INC1 :
24
23
22
21
20
19
18
17
16
15
14
13
: +INC2
: GND
: CS
: VCC (O)
: OUT
: VH
: VCC
: RT
: −INE3
: FB3
: CTL
: +INC1
MB3887
3
■PIN DESCRIPTION
Pin No. Symbol I/O Descriptions
1−INC2 I Current detection amplifier (Current Amp2) input terminal.
2 OUTC2 O Current detection amplifier (Current Amp2) output terminal.
3+INE2 I Error amplifier (Error Amp2) non-inverted input terminal.
4−INE2 I Error amplifier (Error Amp2) inverted input terminal.
5 FB2 O Error amplifier (Error Amp2) output terminal.
6 VREF O Reference voltage output terminal.
7 FB1 O Error amplifier (Error Amp1) output terminal.
8−INE1 I Error amplifier (Error Amp1) inverted input terminal
9+INE1 I Error amplifier (Error Amp1) non-inverted input terminal.
10 OUTC1 O Current detection amplif ier (Current Amp1) output terminal.
11 OUTD O With IC in standby mode, this terminal is set to “Hi-Z” to prevent loss
of current through output voltage setting resistance.
Set CTL terminal to “H” level to output “L” level.
12 −INC1 I Current detection amplifier (Current Amp1) input terminal.
13 +INC1 I Current detection amplifier (Current Amp1) input terminal.
14 CTL I Power supply control terminal.
Setting the CTL terminal at “L” level places the IC in the standby
mode.
15 FB3 O Error amplifier (Error Amp3) output terminal.
16 −INE3 I Error amplifier (Error Amp3) inverted input terminal.
17 RT Triangular-wave oscillation frequency setting resistor connection
terminal.
18 VCC Power supply terminal for reference power supply and control circuit.
19 VH O Power supply terminal for FET drive circuit (VH = VCC − 6 V) .
20 OUT O External FET gate drive terminal.
21 VCC (O) Output circuit power supply terminal.
22 CS Soft-start capacitor connection terminal.
23 GND Ground termi nal.
24 +INC2 I Current detection amplifier (Current Amp2) input terminal.
MB3887
4
■BLO C K DIAGRAM
+
−−
+
8
10
13
12
9
+
−−
+
4
2
24
1
3
× 20
× 20
+
+
+
−
5
20
21
19
−
+
+
+
−
11
16
22
17 6 23
14
18
<Current Amp1> <Error Amp1>
7
VREF
<Current Amp2> <Error Amp2>
VREF
<Error Amp3>
VREF
VREF
VREF
5.0 V
4.2 V
10
µA
15 <SOFT>
2.5 V
1.5 V
<OUT>
<UVLO>
<OSC>
Bias
Voltage
<VH>
<REF> <CTL>
<PWM Comp.>
Drive
VCC
(VCC − 6 V)
(VCC UVLO)
VCC
VCC
VCC
CTL
215 kΩ
35 kΩ
0.91 V
(0.77 V)
VREF
UVLO
4.2 V
bias
−INC2
OUTD
FB2
OUTC2
VREF
−INE2
+INE2
+INE1
FB1
OUTC1
−INE1
−INC1
+INC2
GND
CS
VCC (O)
OUT
VH
RT
−INE3
FB3
+INC1
45 pF
MB3887
5
■ABSOLUTE MAXIMUM RATINGS
*1 : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) .
*2 : For details, refer to “■ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY”.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Conditions Rating Unit
Min Max
Power supply voltage VCC VCC, VCC (O) terminal*228 V
Output current IOUT 60 mA
Peak output current IOUT Duty ≤ 5 %
(t = 1 / fOSC × Duty) 700 mA
Power dissipation PDTa ≤ +25 °C740*1mW
Storage temperature TSTG −55 +125 °C
MB3887
6
■RECOMMENDED OPERATING CONDITIONS
* : For details, ref e r to “■ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY”.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Conditions Value Unit
Min Typ Max
Power supply voltage VCC VCC, VCC (O) terminal* 8 25 V
Referenc e vo ltag e outpu t
current IREF −10mA
VH terminal output current IVH 030 mA
Input vo lta ge VINE −INE1 to −INE3, +INE1,
+INE2 terminal 0VCC − 1.8 V
VINC +INC1, +INC2, −INC1,
−INC2 terminal 0VCC V
OUTD terminal
output voltage VOUTD 017 V
OUTD terminal
output cur rent IOUTD 02mA
CTL terminal input voltage VCTL 025 V
Output current IOUT −45 +45 mA
Peak output current IOUT Duty ≤ 5 %
(t = 1 / fosc × Duty) −600 +600 mA
Osci llati on fre que nc y fOSC 100 290 500 kHz
Timing resistor RT27 47 130 kΩ
Soft-start capacitor CS0.022 1.0 µF
VH terminal capacitor CVH 0.1 1.0 µF
Referenc e vo ltag e outpu t
capacitor CREF 0.1 1.0 µF
Operating ambient
temperature Ta −30 +25 +85 °C
MB3887
7
■ELECTRICAL CHARACTERISTICS (Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
* : Standard design value. (Continued)
Parameter Sym-
bol Pin
No. Conditions Value Unit
Min Typ Max
1.
Reference
voltage block
[REF]
Output voltage VREF1 6Ta = +25 °C 4.967 5.000 5.041 V
VREF2 6Ta = −10 °C to +85 °C 4.95 5.00 5.05 V
Input stability Line 6 VCC = 8 V to 25 V 310mV
Load stability Load 6 VREF = 0 mA to −1 mA 110mV
Short-circuit output
current Ios 6 VREF = 1 V −50 −25 −12 mA
2.
Under voltage
lock out protec-
tion circui t
block
[UVLO]
Threshold voltage VTLH 18 VCC = VCC (O) ,
VCC = 6.2 6.4 6.6 V
VTHL 18 VCC = VCC (O) ,
VCC = 5.2 5.4 5.6 V
Hysteresis width VH18 VCC = VCC (O) 1.0* V
Threshold voltage VTLH 6VREF = 2.6 2.8 3.0 V
VTHL 6VREF = 2.4 2.6 2.8 V
Hysteresis width VH60.2 V
3.
Soft-start block
[SOFT] Charge current ICS 22 −14 −10 −6µA
4.
Triangular
waveform os-
cillator circuit
block
[OSC]
Oscillation
frequency fOSC 20 RT = 47 kΩ260 290 320 kHz
Frequency
temperature
stability ∆f/fdt 20 Ta = −30 °C to +85 °C 1* %
5-1.
Error amplifier
block
[Error Am p1,
Error Amp2]
Input offset voltage VIO 3, 4,
8, 9 FB1 = FB2 = 2 V 15mV
Input bias current IB3, 4,
8, 9 −100 −30 nA
In-phase input
voltage ra nge VCM 3, 4,
8, 9 0VCC − 1.8 V
Volta ge gain AV5, 7 DC 100* dB
Frequency
bandwidth BW 5, 7 AV = 0 dB 2* MHz
Output voltage VFBH 5, 7 4.7 4.9 V
VFBL 5, 7 20 200 mV
Output source
current ISOURCE 5, 7 FB1 = FB2 = 2 V −2−1mA
Output sink current ISINK 5, 7 FB 1 = FB2 = 2 V 150 300 µA
MB3887
8
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
* : Standard design value (Continued)
Parameter Sym-
bol Pin
No. Conditions Value Unit
Min Typ Max
5-2.
Error amplifier
block
[Error Am p3]
Threshold voltage VTH1 16 FB3 = 2 V, Ta = +25 °C 4.183 4.200 4.225 V
VTH2 16 FB3 = 2 V,
Ta = −10 °C to +85 °C 4.169 4.200 4.231 V
Input current IINE3 16 −INE3 = 0 V −100 −30 nA
Voltage gain AV15 DC 100* dB
Frequency
bandwidth BW 15 AV = 0 dB 2* MHz
Output voltage VFBH 15 4.7 4.9 V
VFBL 15 20 200 mV
Output source
current ISOURCE 15 FB3 = 2 V −2−1mA
Output sink current ISINK 15 FB3 = 2 V 150 300 µA
OUTD terminal
output leak current ILEAK 11 OUTD = 17 V 01µA
OUTD terminal
output ON resistor RON 11 OUTD = 1 mA 35 50 Ω
6.
Current
detection
amplifier block
[Current Amp1,
Current Amp2]
Input offset voltage VIO
1,
12,
13,
24
+INC1 = +INC2 = −INC1
= −INC2 = 3 V to VCC −3+3mV
Input current
I+INCH 13,
24
+INC1 = +INC2 =
3 V to VCC,
∆VIN = −100 mV 20 30 µA
I−INCH 1, 12 +INC1 = +INC2 =
3 V to VCC,
∆Vin = −100 mV 0.1 0.2 µA
I+INCL 13,
24 +INC1 = +INC2 = 0 V,
∆Vin = −100 mV −180 −120 µA
I−INCL 1, 12 +INC1 = +INC2 = 0 V,
∆Vin = −100 mV −195 −130 µA
MB3887
9
(Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
* : Standard design value (Continued)
Parameter Sym-
bol Pin
No. Conditions Value Unit
Min Typ Max
6.
Current
detection
amplifier block
[Current Amp1,
Current Amp2]
Current detecti on
voltage
VOUTC1 2, 10 +INC1 = +INC2 =
3 V to VCC,
∆Vin = −100 mV 1.9 2.0 2.1 V
VOUTC2 2, 10 +INC1 = +INC2 =
3 V to VCC,
∆Vin = −20 mV 0.34 0.40 0.46 V
VOUTC3 2, 10 +INC1 = +INC2 =
0 V to 3 V,
∆Vin = −100 mV 1.8 2.0 2.2 V
VOUTC4 2, 10 +INC1 = +INC2 =
0 V to 3 V,
∆Vin = −20 mV 0.2 0.4 0.6 V
In-phase input
voltage range VCM
1,
12,
13,
24
0VCC V
Voltage gain AV2, 10 +INC1 = +INC2 =
3 V to VCC,
∆Vin = −100 mV 19 20 21 V/V
Frequency
bandwidth BW 2, 10 AV = 0 dB 2* MHz
Output voltag e VOUTCH 2, 10 4.7 4.9 V
VOUTCL 2, 10 20 200 mV
Output source
current ISOURCE 2, 10 OUTC1 = OUTC2 = 2 V −2−1mA
Output sink cur-
rent ISINK 2, 10 OUTC1 = OUTC2 = 2 V 150 300 µA
7.
PWM
comparator
block
[PWM Comp.]
Threshold voltage
VTL 5, 7,
15 Duty cycle = 0 %1.4 1.5 V
VTH 5, 7,
15 Duty cycle = 100 %2.5 2.6 V
MB3887
10
(Continued) (Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA)
* : Standard design value
Parameter Sym-
bol Pin
No. Conditions Value Unit
Min Typ Max
8.
Output block
[OUT]
Output source
current ISOURCE 20 OUT = 13 V, Duty ≤ 5 %
(t = 1 / fOSC × Duty) −400* mA
Output sink
current ISINK 20 OUT = 19 V, Duty ≤ 5 %
(t = 1 / fOSC × Duty) 400* mA
Output ON
resistor ROH 20 OUT = −45 mA 6.5 9.8 Ω
ROL 20 OUT = 45 mA 5.0 7.5 Ω
Rise time tr1 20 OUT = 3300 pF
(Si4435 × 1) 50* ns
Fall time tf1 20 OUT = 3300 pF
(Si4435 × 1) 50* ns
9.
Power supply
control block
[CTL]
CTL input voltage VON 14 IC Active mode 2 25 V
VOFF 14 IC Standby mode 0 0.8 V
Input current ICTLH 14 CTL = 5 V 100 150 µA
ICTLL 14 CTL = 0 V 01µA
10.
Bias voltage
block
[VH]
Output voltag e VH19 VCC = VCC (O)
= 8 V to 25 V,
VH = 0 to 30 mA VCC − 6.5 VCC − 6.0 VCC − 5.5 V
11.
General
Standby current ICCS 18 VCC = VCC (O) ,
CTL = 0 V 010µA
Power supply cur-
rent ICC 18 VCC = VCC (O) ,
CTL = 5 V 812mA
MB3887
11
■TYPICAL CHARACTERISTICS
(Continued)
6
5
4
3
2
1
00 5 10 15 20 25
Ta = +25 °C
CTL = 5 V
6
5
4
3
2
1
00 5 10 15 20 25
Ta = +25 °C
CTL = 5 V
VREF = 0 mA
6
5
4
3
2
1
00 5 10 15 20 25 30
Ta = +25 °C
VCC = 19 V
CTL = 5 V
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92−40 −20 0 +20 +40 +60 +80 +100
VCC = 19 V
CTL = 5 V
1000
900
800
700
600
500
400
300
200
100
0
10
9
8
7
6
5
4
3
2
1
0
0 5 10 15 20 25
V
REF
I
CTL
Ta = +25 °C
VCC = 19 V
Power supply current ICC (mA)
Power supply current vs. Power supply voltage
Power supply voltage VCC (V)
Reference voltage VREF (V)
Power supply voltage VCC (V)
Reference voltage vs. Power supply voltage
Reference voltage VREF (V)
Reference voltage output current IREF (mA)
Reference voltage vs. Reference voltage output current Reference voltage vs. Ambient temperature
Refe re nc e vo l ta ge VREF (V)
Ambient temperature Ta ( °C)
CTL terminal current, Reference voltage
vs. CTL terminal voltage
CTL terminal current ICTL (µA)
CTL ter mi nal volt age VCTL (V)
Reference voltage VREF (V)
MB3887
12
(Continued)
1 M
100 k
10 k10 100 1000
Ta = +25 °C
VCC = 19 V
CTL = 5 V
340
330
320
310
300
290
280
270
260 0 5 10 15 20 25
Ta = +25 °C
CTL = 5 V
RT = 47 kΩ
320
315
310
305
300
295
290
285
280
275
270
265
260−40 −20 0 +20 +40 +60 +80 +100
VCC = 19 V
CTL = 5 V
RT = 47 kΩ
4.25
2.24
4.23
2.22
4.21
4.20
4.19
4.18
4.17
4.16
4.15−40 −200+20 +40 +60 +80 +100
VCC = 19 V
CTL = 5 V
Triangular wave oscillation frequency
vs. Timing resistor
Triang ula r wav e oscillat ion
frequenc y fOSC (Hz)
Timing resistor RT (kΩ)
Triangular wave oscillation frequency
vs. Power supply voltage
Triangular wave oscillation
frequency fOSC (kHz)
Power supply volta ge VCC (V)
Triangular wave oscillation frequency
vs. Ambient temperature
Triangular wave oscillation
frequenc y fOSC (kHz)
Ambient temperature Ta ( °C)
Error amplifier threshold voltage
vs. Ambient temperature
Error amplifier threshold
voltage VTH (V)
Ambient temperature Ta ( °C)
MB3887
13
(Continued)
−
+
7
8
9
+
OUT
IN
(5)
(4)
(3)
240 kΩ
2.4 kΩ
10 kΩ
10 kΩ10 kΩ
10 kΩ
Error Amp1
(Error Amp2)
4.2 V VCC = 19 V
1 µF
Ta = +25 °C
AV
φ
40
20
0
−20
−40
180
90
0
−90
−180
1 k 10 k 100 k 1 M 10 M
−
+
+
15
16
22
+
OUT
IN
240 kΩ
2.4 kΩ
10 kΩ
10 kΩ10 kΩ
10 kΩ
Error Amp3
4.2 V
4.2 V
VCC = 19 V
1 µF
Ta = +25 °C
AV
φ
40
20
0
−20
−40
180
90
0
−90
−180
1 k 10 k 100 k 1 M 10 M
Ta = +25 °C
AV
φ
40
20
0
−20
−40
180
90
0
−90
−180
1 k 10 k 100 k 1 M 10 M
+
−10
13
12
VCC = 19 V
×20
(24)
(1) (2) OUT
12.55 V12.6 V
Current Amp1
(Current Amp2)
Error amplifier gain and phase vs. Frequency
Gain AV (d B)
Frequency f (Hz)
Phase φ (deg)
Current detection amplifier gain and phase vs. Frequency
Gain AV (dB)
Frequency f (Hz)
Phase φ (d eg)
Error amplifier gain and phase vs. Frequency
Gain AV (d B)
Frequency f (Hz)
Phase φ (deg)
MB3887
14
(Continued)
800
700
600
500
400
300
200
100
0
740
−40 −20 0 +20 +40 +60 +80 +100
Power dissipation vs. Ambient temperature
Power dissipation PD (mW)
Ambient temperature Ta ( °C)
MB3887
15
■FUNCTIONAL DESCRIPTION
1. DC/DC Converter Unit
(1) Reference voltage block (Ref)
The reference voltage generator uses th e voltage su pplied from the VCC ter minal (pin 18 ) to g enerate a tem -
perature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC’s internal
circuitry.
This terminal can also be used to obtain a load current to a maximum of 1mA from the reference voltage VREF
terminal (pin 6) .
(2) Triangular wave oscillator block (OS C)
The triangular wav e oscillator builds the capacitor for frequency setting into, and generates the triangular wave
oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) .
The triangular wave is input to the PWM comparator on the IC.
(3) Error amplifier block (Error Amp1)
This amplifier detec ts the output sign al from the curr ent detectio n amplifier (Current amp 1) , compares thi s to
the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charging current.
In additio n, an arbitrar y loop gain can be set up by connec ting a feedba ck resistor and capacitor between the
FB1 terminal (pin 7) and -INE1 terminal (pin 8) , providing stable phase compensation to the system.
(4) Error amplifier block (Error Amp2)
This amplifier (Error Amp2) detects voltage drop of the AC adapter and outputs a PWM control signal.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2
terminal (pin 5) to the −INE2 terminal (pin 4) of the error amplifier, enabling stable phase compensation to the
system.
(5) Error amplifier block (Error Amp3)
This error amp lifier ( Error Amp3 ) detects the outpu t voltage from the DC/DC c onve r ter and outputs the PWM
control signal. Exter nal output voltage setting resistors can be connected to the error amplifier inver ted input
terminal to set the desired level of output voltage from 1 cell to 4 cells.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3
ter minal (pin 15) to the −INE3 termin al ( pin 1 6) of the e rror amplif ier, en abling sta ble phase comp ensati on to
the system.
Connecting a soft-start capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on.
Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load.
(6) Current detection amplifier block (Current Amp1)
The cu rre nt detectio n am pli fie r (Cu rren t Amp1) de tect s a voltage dr o p whi ch occurs betwee n bot h end s o f the
output sense resistor (RS) due to the flow of the c harge c urrent , usi ng the +INC1 te r minal (pin 13) and −INC1
terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the ne xt
stage.
MB3887
16
(7) PWM comparator block (PWM Comp.)
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp1 to Error Amp3) depending on their output voltage.
The PW M comparator ci rcuit compares the tria ngular wave generated by the tria ngular wave oscillator to the
error amplifier output voltage and turns on the external output transistor during the interval in which the triangular
wave voltage is lower than the error amplifier output voltage.
(8) Output block (OUT)
The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET.
The output “L” lev el sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block
(VH) .
This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external
transistor in a wide range of input voltages.
(9) Control block (CTL)
Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The supply current is 10 µA at maximum
in the standby mode.)
CTL function tabl e
(10) Bias voltage block (VH)
The bias voltage circuit outpu ts VCC −6 V (Typ) as the minimum potential of th e output circuit. In the sta ndby
mode, this circuit outputs the potential equal to VCC.
2. Protection Functions
Under voltage lockout protection circuit (UVLO)
The transient state or a momentar y decrease in supply voltage or internal reference voltage (VREF) , which
occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in
breakdown or degradation of the system.
To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal
reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The system restores v oltage supply
when the supply voltage or internal ref erence voltage reaches the threshold voltage of the under voltage lock out
protection circuit .
Protection circuit (UVLO) operation f unction table
When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.)
CTL Power OUTD
L OFF (Standby) Hi-Z
HON (Active) L
OUTD OUT CS
Hi-Z H L
MB3887
17
3. Soft-Start Function
Soft-start block (SOFT)
Connect ing a capaci tor to the CS te r minal (pin 22) prevents r ush c urrents when th e IC is tur ned on . Using an
error amp lifie r for soft-s tar t detectio n makes the soft-s tart ti me cons tant, bein g indepe ndent of the ou tput load
of the DC/DC converter.
■SETTING THE CHARGING VOLTAGE
The cha rgin g voltage (DC/ DC outp ut voltage) can be s et by conn ectin g externa l voltage s etting resistor s (R3,
R4) to th e −INE3 te rm inal ( pin 1 6) . B e sure to sele ct a r esistor value that al lows you to ign ore the on -re sistor
(35 Ω, 1mA) of the internal FET connected to the OUTD terminal (pin 11) . In standby mode, the charging
voltage is applied to OUTD termial. Theref ore, output v oltage must be adjusted so that voltage applied to OUTD
terminal (pin 11) is 17 V or less.
Battery charging voltage : VO
VO (V) = (R3 + R4) / R4 × 4.2 (V)
■METHOD OF SETTING THE CHARGING CURRENT
The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 9) .
If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value.
Battery charge current setting voltage : +INE1
+INE1 (V) = 20 × I1 (A) × RS (Ω)
■METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected the RT terminal (pin 17) .
Triangular wave oscillation frequency : fOSC
fOSC (kHz) := 13630 / RT (kΩ)
<Error Amp3>
−
+
+
4.2 V
R3
VO
R4
−INE3
OUTD
CS
16
B
11
22
MB3887
18
■METHOD OF SETTING THE SOFT-START TIME
For pre venting rush current upon activation of IC, the IC allows soft-start using the capacitor (Cs) connected to
the CS terminal (pin 22) .
When CTL t ermi nal (pi n 14) is p laced u nder “H ” level and IC is a ctivated ( VCC ≥ UVLO thresho ld voltage) , Q2
is turned off and the external soft-start capacitor (Cs) connected to the CS terminal is charged at 10 µA.
Error A mp output (FB3 ter minal (pin 15) ) is deter mined by comp arison between th e lower voltage of the two
non-rev erse input terminals (4.2 V and CS terminal voltage) and rev erse input terminal voltage (−INE3 terminal
(pin 16) voltage) . Within the soft-start period (CS terminal voltage < 4.2 V) , FB3 is determined by comparison
between −INE3 terminal voltage and CS terminal voltage, and DC/DC conv erter output voltage goes up propor-
tionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor . Soft-start time
is found by the following formula :
Soft-start time : ts (time to output 100 %)
tS (s) := 0.42 × CS (µF)
= 4.9 V
= 4.2 V
= 0 V
CS terminal voltage
Comparison with Error Amp block − INE3
voltage.
Soft-start time: ts
15
16
22
−
+
+
UVLO
VREF
10 µA 10 µA
Q2
4.2 V
Error
Amp3
FB3
−INE3
CS
CS
Soft-start circuit
MB3887
19
■AC ADAPTOR VOLTAGE DETECTION
• With an exter nal r esistor co nnected to the +INE2 ter minal (pin 3) , the IC enters the dynamical ly-controlled
charg ing mode to reduce the charge c urrent to keep AC adapt er power constant when the pa rt ial potential
point A of the AC adapter voltage (VCC) becomes lower than the voltage at the −INE2 terminal.
AC adapter detection voltage setting : Vth
Vth (V) = (R1 + R2) / R2 × −INE2
■OPERATION TIMING DIAGRAM
−
+
VCC R1
R2
+INE2
−INE2
A
<Error Amp2>
4
3
2.5 V
1.5 V
Error Amp2 FB2
Error Amp1 FB1
Error Amp2 FB3
OUT
Constant voltage control Constant current control AC adapter dynamically-
controlled charging
MB3887
20
■PROCESSING WITHOUT USING THE CURRENT AMP
When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , −INC1 terminal
(pin 12) , and −I NC2 ter minal ( pin 1) to V REF, and then leave OUTC1 ter min al (pin 10 ) and OU TC2 ter minal
(pin 2) open.
24
1312
1
2
10
6
−INC1 +INC1
+INC2
−INC2
OUTC1
OUTC2
VREF
“Open”
Connection when Current Amp is not used
MB3887
21
■PROCESSING WITHOUT USING OF THE ERROR AMP
When Error Amp is not used, leave FB1 terminal (pin 7) , FB2 ter minal (pin 5) open and connect the −INE1
terminal (pin 8) and −INE2 terminal (pin 4) to GND and connect +INE1 terminal (pin 9) , and +INE2 terminal (pin
3) , to VREF.
9
5
8
4
7
+INE1 GND
+INE2
−INE1
−INE2
VREF
FB2
FB1
23
6
3
“Open”
Connection when Error Amp is not used
MB3887
22
■PROCESSING WITHOUT USING OF THE CS TERMINAL
When soft-start function is not used, leave the CS terminal (pin 22) open.
■NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE
• Insert a rev erse-current preventive diode at one of the three locations marked * to prev ent reverse current from
the battery.
• When selecting the rev erse current pre vention diode, be sure to consider the rev erse voltage (VR) and rev erse
current (I R) of the diode.
22
CS
“Open”
Connection when soft-start time is not specified
VCC(O)
OUT
VIN
VH
I1 R
S
BATT
Battery
A B
∗
∗
∗
21
20
19
MB3887
23
■THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY
Please start up and off the VCC terminal (pin 18) and VCC(O) terminal (pin 21) of the power supply terminal at
the same ti me. No do occu rre nce of the bias from the VH ter mina l (pin 19 ) , when there is a perio d of 8 V or
less in the VCC voltage after previously starting up VCC(O). At this time, there is a possibility of leading to
permanent destruction of the device when the voltage of 17 V or more is impressed to the VCC(O) terminal (pin
21) . Moreover, when earliness VCC falls more than VCC(O) when falling, it is similar.
MB3887
24
■APPLICATION EXAMPLE
A
B
Q1
Output voltage (Battery
voltage) is adjustable
D1
I1
Battery
R8
100 kΩ
C10
5600 pF
+
+ +
R9
10 kΩ
R14
1 kΩ
R10
30 kΩ
R11
30 kΩ
R7
22 kΩ
R18
200 kΩ
R19
100 kΩ
R17
100 kΩ
C6
1500 pF
C4
0.022 µF
R3
330 kΩ
R2
47 kΩC9
0.1 µF
C7
0.1 µF
C5
0.1 µF
C2
100 µFC3
100 µF
C1
22 µF
0.033 Ω
R1
22 µH
L1
R4
82 kΩ
R5
330 kΩ
R6
68 kΩ
R15
120 Ω
R16
200 kΩ
Q2
SW
R12
30 kΩ
R13
20 kΩ
C8
10000 pF
AB
AC Adaptor
IIN
VO
+
−−
+
8
10
13
12
9
+
−−
+
4
2
24
1
3
× 20
× 20
+
+
+
−
5
20
21
19
−
+
+
+
−
11
16
22
17 6 23
14
18
<Current Amp1>
7
VREF
<Current Amp2> VREF
VREF
VREF
VREF
5.0 V
4.2 V
10
µA
15 <SOFT>
2.5 V
1.5 V
<OUT>
<OSC>
Bias
Voltage
<VH>
<REF> <CTL>
<PWM Comp.>
Drive
VCC
(VCC − 6 V)
(VCC UVLO)
VCC VCC
CTL
215 kΩ
35 kΩ
0.91 V
(0.77 V)
VREF
UVLO
4.2 V
bias
−INC2
OUTD
FB2
OUTC2
VREF
−INE2
+INE2
+INE1
FB1
OUTC1
−INE1
−INC1
+INC2
GND
CS
VCC (O)
OUT
VH
RT
−INE3
FB3
+INC1
45 pF
<Error Amp1>
<Error Amp2>
<Error Amp3> <UVLO> VCC
VIN = 13.93 V to 25 V
(at 3 cell)
VIN = 17.65 V to 25 V
(at 4 cell)
Note:
Set output voltage so
that voltage applied to
OUTD terminal is 17 V or
less.
MB3887
25
■PARTS LIST
Note : VISHAY SILICONIX : VISHAY Intertechnology, Inc.
ROHM : ROHM CO., LTD.
TDK : TDK Corporation
SANYO : SANYO Electric Co ., Ltd.
KYOCERA : Kyocera Corporation
MURATA : Murata Manufacturing Co., Ltd.
SEIDEN TECHNO : SEIDEN TECHNO CO., LTD.
KOA : KOA Corporation
ssm : SUSUMU Co., Ltd.
OS-CON is a trademark of SANYO Electric Co., Ltd.
COMPONENT ITEM SPECIFICATION VENDOR PA RTS No.
Q1
Q2 P-ch FET
N-ch FET
VDS = −30 V, ID = ±8 A (Max)
VDS = 60 V, ID = 0.115 A
(Max)
VISH AY SIL I CON IX
VISH AY SIL I CON IX Si4435DY
2N7002E
D1 Diode VF = 0.42 V (Max) , IF = 3 A ROHM RB053L-30
L1 Inductor 22 µH3.5 A, 31.6
mΩTDK SLF12565T-
220M3R5
C1
C2, C3
C4
C5
C6
C7
C8
C9
C10
OS-CONTM
Electrolytic Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
22 µF
100 µF
0.022 µF
0.1 µF
1500 pF
0.1 µF
10000 pF
0.1 µF
5600 pF
25 V (10 %)
25 V (10 %)
50 V
16 V
10 V
25 V
10 V
16 V
10 V
SANYO
SANYO
TDK
KYOCERA
MURATA
MURATA
MURATA
KYOCERA
MURATA
25SL22M
25CV100AX
C1608JB1H223K
CM21W5R104K16
GRM39B152K10
GRM39F104KZ25
GRM39B103K10
CM21W5R104K16
GRM39B562K10
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10 to R12
R13
R14
R15
R16, R18
R17, R19
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
0.033 Ω
47 kΩ
330 kΩ
82 kΩ
330 kΩ
68 kΩ
22 kΩ
100 kΩ
10 kΩ
30 kΩ
20 kΩ
1 kΩ
120 Ω
200 kΩ
100 kΩ
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
1.0 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
SEIDEN TECHNO
KOA
KOA
KOA
KOA
KOA
KOA
KOA
KYOCERA
KOA
KOA
KOA
ssm
KOA
KOA
RK73Z1J-0D
RK73G1J-473D
RK73G1J-334D
RK73G1J-823D
RK73G1J-334D
RK73G1J-683D
RK73G1J-223D
RK73G1J-104D
CR21-103-F
RK73G1J-303D
RK73G1J-203D
RK73G1J-102D
RR0816P121D
RK73G1J-204D
RK73G1J-104D
MB3887
26
■REFERENCE DATA
(Continued)
100
98
96
94
92
90
88
86
84
82
80
10 m 100 m 1 10
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 12.6 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
100
98
96
94
92
90
88
86
84
82
80 0246810121416
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 12.6 V
SW = ON
Efficiency η (%) =
(V
BATT
× I
BATT
)
/ (V
IN
× I
IN
)
× 100
100
98
96
94
92
90
88
86
84
82
80
10 m 100 m 1 10
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
100
98
96
94
92
90
88
86
84
82
80 02468101214161820
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
Conversion efficiency vs. BATT charge current
(Constant voltage mode) Conversion efficiency vs. BATT charge voltage
(Constant current mode)
Conversion efficiency η (%)
BATT charge current IBATT (A)
Conversion efficiency η (%)
BATT charge voltage VBATT (V)
Conversion efficiency vs. BATT charge current
(Constant voltage mode) Conversion efficiency vs. BATT charge voltage
(Constant current mode)
Conversion efficiency η (%)
BATT charge current IBATT (A)
Conversion efficiency η (%)
BATT charge voltage VBATT (V)
MB3887
27
(Continued)
100
98
96
94
92
90
88
86
84
82
80
10 m 100 m 1 10
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(V
BATT
× I
BATT
)
/ (V
IN
× I
IN
) × 100
100
98
96
94
92
90
88
86
84
82
80 0 2 4 6 8101214161820
Ta = +25 °C
VIN = 19 V
BATT charge voltage =
set at 16.8 V
SW = ON
Efficiency η (%) =
(VBATT × IBATT)
/ (VIN × IIN) × 100
Conversion efficiency vs. BATT charge current
(Constant voltage mode) Conversion efficiency vs. BATT charge voltage
(Constant current mode)
Conversion efficiency η (%)
BATT cha r ge curr ent IBATT (A)
Conversion efficiency η (%)
BATT charge voltage VBATT (V)
18
16
14
12
10
8
6
4
2
001232.51.50.5 4 54.53.5
Dead Battery MODE DCC MODE
DCC : Dynamically-Controlled
Ta = +25 °C VIN = 19 V
BATT : Electronic load
,
(Product of KIKUSUI PLZ-150W)
20
18
16
14
12
10
8
6
4
2
00 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Dead Battery MODE DCC MODE
DCC : Dynamically-Controlled
BATT : Electronic load,
(Product of KIKUSUI PLZ-150W)
Ta = +25 °C
VIN = 19 V
BATT voltage vs. BATT charge current
(set at 12.6 V)
BATT voltage VBATT (V)
BATT charge current IBATT (A)
BATT voltage vs. BATT charge current
(set at 16.8 V)
BATT voltage VBATT (V)
BATT charge current IBATT (A)
MB3887
28
(Continued)
100
0
−100
15
10
5
0
V
BATT
(mV)
V
D
(V)
Ta = +25 °C
VIN = 19 V
BATT = 1.5 A 98 mVp-p
012345678910
(µs)
V
D
V
BATT
100
0
−100
15
10
5
0
VBATT (mV)
VD (V)
Ta = +25 °C
VIN = 19 V
BATT = 3.0 A 98 mVp-p
VD
VBATT
012345678910
(µs)
100
0
−100
15
10
5
0
V
BATT (
mV)
V
D
(V)
Ta = +25 °C
VIN = 19 V
BATT = 1.5 A 58 mVp-p V
BATT
012345678910
(µs)
V
D
100
0
−100
15
10
5
0
VBATT (mV)
VD (V)
96 mVp-p
VD
VBATT
012345678910
(µs)
VIN = 19 V
BATT = 3.0 A
Ta = +25 °C
Switching waveform constant voltage mode
(set at 12.6 V) Switching waveform constant current mode
(set at 12.6 V, with 10 V)
Switching waveform constant voltage mode
(set at 16.8 V) Switching waveform constant current mode
(set at 16.8 V, with 10 V)
MB3887
29
(Continued)
20
10
0
4
2
0
5
0
V
CTL
(V)
V
CS
(V)
V
BATT
(V)
0 2 4 6 8 101214161820
(ms)
Ta = +25 °C, VIN = 19 V
BATT = 12 ΩV
BATT
V
CTL
ts = 10.4 ms V
CS
20
10
0
4
2
0
5
0
VCTL (V)
VCS (V)
VBATT (V)
0 2 4 6 8 101214161820
(ms)
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
VBATT
VCTL
VCS
20
10
0
4
2
0
5
0
V
CTL
(V)
V
CS
(V)
V
BATT
(V)
0 2 4 6 8 101214161820
(ms)
V
BATT
ts = 10.4 ms V
CS
V
CTL
Ta = +25 °C, VIN = 19 V
BATT = 12 Ω
20
10
0
4
2
0
5
0
VCTL (V)
VCS (V)
VBATT (V)
0 2 4 6 8 101214161820
(ms)
Ta = +25 °C
VIN = 19 V
BATT = 12 Ω
VBATT
VCTL
VCS
Soft-start operating waveform
constant voltage mode
(set at 12.6 V)
Discharge operating waveform
constant vo ltage mode
(set at 12.6 V)
Soft-start operating waveform
constant voltage mode
(set at 16.8 V)
Discharge operating waveform
constant vo ltage mode
(set at 16.8 V)
MB3887
30
■USAGE PRECAUTIONS
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
• The use of n egative voltages below −0.3 V may create paras itic transist ors on LSI li nes, which c an cause
malfunction.
■ORDERING INFORMATION
■RoHS Compliance Information of Lead (Pb) Free version
The LS I products of Fujits u Microele ctronic s with “E1 ” are com pliant wit h RoHS Dir ective , and has o bser ved
the standard of lead, cadmium, mercury, Hexa valent chromium, polybrominated biphenyls (PBB) , and polybro-
minated diphenyl ethers (PBDE) .
The product that conforms to this standard is added “E1” at the end of the part number.
■MARKING FORMAT (Lead Free version)
Part number Package Remarks
MB3887PFV-❏❏❏ 24-pin plastic SSOP
(FPT-24P-M03) Conventional version
MB3887PFV-❏❏❏E1 24-pin plastic SSOP
(FPT-24P-M03) Lead Free version
INDEX
3887
XXXX
XXX
E1
Lead Free version
MB3887
31
■LABELING SAMPLE (Lead free version)
2006/03/01
ASSEMBLED IN JAPAN
G
QC PASS
(3N) 1MB123456P-789-GE1
1000
(3N)2 1561190005 107210
1,000
PCS
0605 - Z01A
1000
1/1
1561190005
MB123456P - 789 - GE1
MB123456P - 789 - GE1
MB123456P - 789 - GE1
Pb
Lead Free version
lead-free mark
JEITA logo JEDEC logo
MB3887
32
■MB3887PFV-❏❏❏E1 Recommended Conditions of Moisture Sensitivity Level
[Temperature Profile for FJ St andard IR Reflow]
(1) IR (infrared reflow)
(2) Manual soldering (partial heating method )
Conditions : Temperature 400 °C Max
Times : 5 s max/pin
Item Condition
Mounting Method IR (infrared reflow) , Manual soldering (partial heating method)
Mounting tim es 2 times
Storage period
Before opening Please use it within two years after
Manufacture.
From opening to the 2nd
reflow Less than 8 days
When the storage period after
opening was exceeded Please processes within 8 days
after baking (125 °C, 24H)
Storage conditions 5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
260 °C
(e)
(d')
(d)
255 °C
170 °C
190 °C
RT (b)
(a)
(c)
to
Note : Temperature : the top of the package body
(a) Te mperat ure Incr ease grad ient : Aver age 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s
(c) Tem perat ure Increas e grad ient : Aver age 1 °C/s to 4 °C/s
(d) Actual heating : Temperature 260 °C Max; 255 °C or more, 10s or less
(d’) : Temperature 230 °C or more, 40s or less
or
Temperature 225 °C or more, 60s or less
or
Temperature 220 °C or more, 80s or less
(e) Cooling : Natural cooling or forced cooling
H rank : 260 °C Max
MB3887
33
■PACKAGE DIMENSION
24-pin plastic SSOP Lead pitch 0.65 mm
Package width
×
package length
5.6 × 7.75 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 1.45 mm MAX
Weight 0.12 g
Code
(Reference) P-SSOP24-5.6×7.75-0.65
24-pin plastic SSOP
(FPT-24P-M03)
(FPT-24P-M03)
C
2003 FUJITSU LIMITED F24018S-c-4-5
7.75±0.10(.305±.004)
5.60±0.10 7.60±0.20
(.220±.004) (.299±.008)
*1
*2
0.10(.004)
112
1324
0.65(.026) –0.07
+0.08
0.24
.009 +.003
–.003 M
0.13(.005)
INDEX
0.17±0.03
(.007±.001)
"A"
0.25(.010)
0.10±0.10
(.004±.004)
(Stand off)
Details of "A" part
(Mounting height)
1.25 +0.20
–0.10
–.004
+.008
.049
0~8˚
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10(.004)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max).
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
MB3887
34
MEMO
MB3887
35
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD.
151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm.3102, Bund Center, No.222 Yan An Road(E),
Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
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The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
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The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
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the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
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Edited Strategic Business Development Dept.