Copyright©2012 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2012.3
FUJITSU SEMICONDUCTOR
DATA SHEET DS706-00028-1v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
32-bit ARMTM CortexTM-M3 based Microcontroller
MB9B110R Series
MB9BF112N/R, MB9BF114N/R,
MB9BF115N/R, MB9BF116N/R
DESCRIPTION
The MB9B110R Series are a highly integrated 32-bit microcontrollers dedicated for embedded controllers
with high-performance and competitive cost.
These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and has
peripheral functions such as Motor Control Timers, ADCs and Communication Interfaces ( UART, CSIO,
I2C, LIN).
The products which are described in this data sheet are placed into TYPE4 product categories in "FM3
MB9Axxx/MB9Bxxx Series PERIPHERAL MANUAL".
Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries.
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
FEATURES
32-bit ARM Cortex-M3 Core
Processor version: r2p1
Up to 144MHz Frequency Operation
Memory Protection Unit (MPU): improves the reliability of an embedded system
Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48
peripheral interrupts and 16 priority levels
24-bit System timer (Sys Tick): System timer for OS task management
On-chip Memories
[Flash memory]
These series are based on two independent on-chip Flash memories.
MainFlash
Up to 512Kbyte
Built-in Flash Accelerator System with 16Kbyte trace buffer memory
The read access to Flash memory can be achieved without wait cycle up to operation frequency of
72MHz. Even at the operation frequency more than 72MHz, an equivalent access to Flash memory
can be obtained by Flash Accelerator System.
Security function for code protection
WorkFlash
32Kbyte
Read cycle
4wait-cycle: the operation frequency more than 72MHz
2wait-cycle: the operation frequency more than 40MHz, and to 72MHz
0wait-cycle: the operation frequency to 40MHz
Security function is shared with code protection
[SRAM]
This Series contain a total of up to 64Kbyte on-chip SRAM memories. This is composed of two
independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus or D-code bus of Cortex-M3
core. SRAM1 is connected to System bus.
SRAM0: Up to 32 Kbyte
SRAM1: Up to 32 Kbyte
External Bus Interface
Supports SRAM, NOR and NAND Flash device
Up to 8 chip selects
8/16-bit Data width
Up to 25-bit Address bit
Supports Address/Data multiplex
Supports external RDY input
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MB9B110R Series
Multi-function Serial Interface (Max 8channels)
4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3)
Operation mode is selectable from the followings for each channel.
UART
CSIO
LIN
I2C
[UART]
Full-duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)
Various error detect functions available (parity errors, framing errors, and overrun errors)
[CSIO]
Full-duplex double buffer
Built-in dedicated baud rate generator
Overrun error detect function available
[LIN]
LIN protocol Rev.2.1 supported
Full-duplex double buffer
Master/Slave mode supported
LIN break field generate (can be changed 13 to 16-bit length)
LIN break delimiter generate (can be changed 1 to 4-bit length)
Various error detect functions available (parity errors, framing errors, and overrun errors)
[I2C]
Standard mode (Max 100kbps) / High-speed mode (Max 400kbps) supported
DMA Controller (8channels)
DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously.
8 independently configured and operated channels
Transfer can be started by software or request from the built-in peripherals
Transfer address area: 32bit (4Gbyte)
Transfer mode: Block transfer/Burst transfer/Demand transfer
Transfer data type: byte/half-word/word
Transfer block count: 1 to 16
Number of transfers: 1 to 65536
A/D Converter (Max 16channels)
[12-bit A/D Converter]
Successive Approximation Register type
Built-in 3unit
Conversion time: 1.0μs@5V
Priority conversion available (priority at 2levels)
Scanning conversion mode
Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion:
4steps)
Base Timer (Max 8channels)
Operation mode is selectable from the followings for each channel.
16-bit PWM timer
16-bit PPG timer
16/32-bit reload timer
16/32-bit PWC timer
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MB9B110R Series
General Purpose I/O Port
This series can use its pins as general purpose I/O ports when they are not used for external bus or
peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function
can be allocated.
Capable of pull-up control per pin
Capable of reading pin level directly
Built-in the port relocate function
Up 103 fast general purpose I/O Ports@120pin Package
Some pin is 5V tolerant I/O.
See "PIN DESCRIPTION" to confirm the corresponding pins.
Multi-function Timer (Max 3units)
The Multi-function timer is composed of the following blocks.
16-bit free-run timer × 3ch./unit
Input capture × 4ch./unit
Output compare × 6ch./unit
A/D activating compare × 3ch./unit
Waveform generator × 3ch./unit
16-bit PPG timer × 3ch./unit
The following function can be used to achieve the motor control.
PWM signal output function
DC chopper waveform output function
Dead time function
Input capture function
A/D convertor activate function
DTIF (Motor emergency stop) interrupt function
Real-time clock (RTC)
The Real-time clock can count Year/Month/Day/Hour/Minute/Second/A day of the week from 01 to 99.
Interrupt function with specifying date and time (Year/Month/Day/Hour/Minute/Second/A day of the
week.) is available. This function is also available by specifying only Year, Month, Day, Hour or Minute.
Timer interrupt function after set time or each set time.
Capable of rewriting the time with continuing the time count.
Leap year automatic count is available.
Quadrature Position/Revolution Counter (QPRC) (Max 3channels)
The Quadrature Position/Revolution Counter (QPRC) is used to measure the position of the position
encoder. Moreover, it is possible to use up/down counter.
The detection edge of the three external event input pins AIN, BIN and ZIN is configurable.
16-bit position counter
16-bit revolution counter
Two 16-bit compare registers
Dual Timer (32/16-bit Down Counter)
The Dual Timer consists of two programmable 32/16-bit down counters.
Operation mode is selectable from the followings for each channel.
Free-running
Periodic (=Reload)
One-shot
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MB9B110R Series
Watch Counter
The Watch counter is used for wake up from power saving mode.
Interval timer: up to 64s (Max) @ Sub Clock : 32.768kHz
External Interrupt Controller Unit
Up to 32 external interrupt input pin
Include one non-maskable interrupt (NMI)
Watchdog Timer (2channels)
A watchdog timer can generate interrupts or a reset when a time-out value is reached.
This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog.
"Hardware" watchdog timer is clocked by low-speed internal CR oscillator. Therefore, "Hardware"
watchdog is active in any power saving mode except STOP.
CRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator helps a verify data transmission or storage integrity.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
CCITT CRC16 Generator Polynomial: 0x1021
IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
Clock and Reset
[Clocks]
Five clock sources (2 external oscillators, 2 internal CR oscillator, and Main PLL) that are dynamically
selectable.
Main Clock : 4MHz to 48MHz
Sub Clock : 32.768kHz
High-speed internal CR Clock : 4MHz
Low-speed internal CR Clock : 100kHz
Main PLL Clock
[Resets]
Reset requests from INITX pin
Power on reset
Software reset
Watchdog timers reset
Low-voltage detector reset
Clock supervisor reset
Clock Super Visor (CSV)
Clocks generated by internal CR oscillators are used to supervise abnormality of the external clocks.
External OSC clock failure (clock stop) is detected, reset is asserted.
External OSC frequency anomaly is detected, interrupt or reset is asserted.
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MB9B110R Series
Low-Voltage Detector (LVD)
This Series include 2-stage monitoring of voltage on the VCC pins. When the voltage falls below the
voltage has been set, Low-Voltage Detector generates an interrupt or reset.
LVD1: error reporting via interrupt
LVD2: auto-reset operation
Low-Power Mode
Three power saving modes supported.
SLEEP
TIMER
STOP
Debug
Serial Wire JTAG Debug Port (SWJ-DP)
Embedded T race Macrocells (ETM) provide comprehensive debug and trace facilities.
Power Supply
Wide range voltage : VCC = 2.7V to 5.5V
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MB9B110R Series
PRODUCT LINEUP
Memory size
Product name MB9BF112N/R MB9BF114N/R MB9BF115N/R MB9BF116R
MainFlash 128Kbyte 256Kbyte 384Kbyte 512Kbyte
WorkFlash 32Kbyte 32Kbyte 32Kbyte 32Kbyte
On-chip RAM 16Kbyte 32Kbyte 48Kbyte 64Kbyte
SRAM0 8Kbyte 16Kbyte 24Kbyte 32Kbyte
SRAM1 8Kbyte 16Kbyte 24Kbyte 32Kbyte
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MB9B110R Series
Function
Product name
MB9BF112N
MB9BF114N
MB9BF115N
MB9BF116N
MB9BF112R
MB9BF114R
MB9BF115R
MB9BF116R
Pin count 100 120
Cortex-M3
CPU Freq. 144MHz
Power supply voltage range VCC: 2.7V to 5.5V
DMAC 8ch.
External Bus Interface
Addr: 25-bit (Max)
R/Wdata: 8/16-bit (Max)
CS: 8 (Max)
Support: SRAM, NOR Flash
Addr: 25-bit (Max)
R/Wdata: 8/16-bit (Max)
CS: 8 (Max)
Support: SRAM, NOR & NAND Flash
MF Serial Interface
(UART/CSIO/LIN/I2C) 8ch. (Max)
Base T imer
(PWC/Reload timer/PWM/PPG) 8ch. (Max)
A/D
activation
compare 3ch.
Input
capture 4ch.
Free-run
timer 3ch.
Output
compare 6ch.
Waveform
generator 3ch.
MF-
Timer
PPG 3ch.
3 units (Max)
QPRC 3ch. (Max)
Dual T imer 1 unit
Real-Time Clock 1 unit
Watch Counter 1 unit
CRC Accelerator Yes
Watchdog timer 1ch. (SW) + 1ch. (HW)
External Interrupts 16pins (Max) + NMI × 1
I/O ports 83pins (Max) 103pins (Max)
12-bit A/D converter 16ch. (3 units)
CSV (Clock Super Visor) Yes
LVD (Low-Voltage Detector) 2ch.
High-speed 4MHz 2%) Internal
OSC Low-speed 100kHz (Typ)
Debug Function SWJ-DP/ETM
Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package.
It is necessary to use the port relocate function of the General I/O port according to your function use.
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MB9B110R Series
PACKAGES
Product name
Package
MB9BF112N
MB9BF114N
MB9BF115N
MB9BF116N
MB9BF112R
MB9BF114R
MB9BF115R
MB9BF116R
QFP: FPT-100P-M36 (0.65mm pitch) -
LQFP: FPT-100P-M20*/M23 (0.5mm pitch) -
LQFP: FPT-120P-M21*/M37 (0.5mm pitch) -
BGA: BGA-112P-M04 (0.8mm pitch) -
: Supported
* : ES product only
Note : See "PACKAGE DIMENSIONS" for detailed information on each package.
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MB9B110R Series
PIN ASSIGNMENT
z FPT-100P-M20/M23
(TOP VIEW)
VSS
P81
P80
VCC
P60/SIN5_0/TIOA2_2/INT15_1/MRDY_0
P61/SOT5_0/TIOB2_2
P62/SCK5_0/ADTG_3/MOEX_0
P63/INT03_0/SIN5_1/MWEX_0
P0F/NMIX/CROUT_1/RTCCO_0/DTTI2X_0/DTTI2X_1/SUBOUT_0
P0E/CTS4_0/TIOB3_2/IC13_0/IC23_0/RTO25_1/MDQM1_0
P0D/RTS4_0/TIOA3_2/IC12_0/IC22_0/RTO24_1/MDQM0_0
P0C/SCK4_0/TIOA6_1/IC11_0/IC21_0/RTO23_1/MALE_0
P0B/SOT4_0/TIOB6_1/IC10_0/IC20_0/RTO22_1/MCSX0_0
P0A/SIN4_0/INT00_2/FRCK1_0/FRCK2_0/RTO21_1/MCSX1_0
P09/TRACECLK/TIOB0_2/RTS4_2/RTO20_1/MCSX2_0
P08/TRACED3/TIOA0_2/CTS4_2/ZIN2_1/MCSX3_0
P07/TRACED2/ADTG_0/SCK4_2/BIN2_1/MCLKOUT_0
P06/TRACED1/TIOB5_2/SOT4_2/INT01_1/AIN2_1/MCSX4_0
P05/TRACED0/TIOA5_2/SIN4_2/INT00_1/MCSX5_0
P04 /TDO/SWO
P03/TMS/SWDIO
P02 /TDI/ MCSX6_0
P01 /TCK/SWCLK
P00/TRSTX/MCSX7_0
VCC
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
VCC 1 75 VSS
P50/INT00_0/AIN0_2/SIN3_1/RTO10_0/MADATA00_0 2 74 P20/INT05_0/CROUT_0/AIN1_1/MAD24_0
P51/INT01_0/BIN0_2/SOT3_1/RTO11_0/MADATA01_0 3 73 P21/SIN0_0/INT06_1/BIN1_1
P52/INT02_0/ZIN0_2/SCK3_1/RTO12_0/MADATA02_0 4 72 P22/SOT0_0/TIOB7_1/ZIN1_1
P53/SIN6_0/TIOA1_2/INT07_2/RTO13_0/MADATA03_0 5 71 P23/SCK0_0/TIOA7_1
P54/SOT6_0/TIOB1_2/RTO14_0/MADATA04_0 6 70 P1F/AN15/ADTG_5/FRCK0_1/MAD23_0
P55/SCK6_0/ADTG_1/RTO15_0/MADATA05_0 7 69 P1E/AN14/RTS4_1/DTTI0X_1/MAD22_0
P56/INT08_2/DTTI1X_0/MADATA06_0 8 68 P1D/AN13/CTS4_1/IC03_1/MAD21_0
P30/AIN0_0/TIOB0_1/INT03_2/MADATA07_0 9 67 P1C/AN12/SCK4_1/IC02_1/MAD20_0
P31/BIN0_0/TIOB1_1/SCK6_1/INT04_2/MADATA08_0 10 66 P1B/AN11/SOT4_1/IC01_1/MAD19_0
P32/ZIN0_0/TIOB2_1/SOT6_1/INT05_2/MADATA09_0 11 65 P1A/AN10/SIN4_1/INT05_1/IC00_1/MAD18_0
P33/INT04_0/TIOB3_1/SIN6_1/ADTG_6/MADATA10_0 12 64 P19/AN09/SCK2_2/MAD17_0
P34/FRCK0_0/TIOB4_1/MADATA11_0 13 63 P18/AN08/SOT2_2/MAD16_0
P35/IC03_0/TIOB5_1/INT08_1/MADATA12_0 14 62 AVSS
P36/IC02_0/SIN5_2/INT09_1/MADATA13_0 15 61 AVRH
P37/IC01_0/SOT5_2/INT10_1/MADATA14_0 16 6 0 AVCC
P38/IC00_0/SCK5_2/INT11_1/MADATA15_0 17 59 P17/AN07/SIN2_2/INT04_1/MAD15_0
P39/DTTI0X_0/ADTG_2 18 58 P16/AN06/SCK0_1/MAD14_0
P3A/RTO00_0/TIOA0_1/RTCCO_2/SUBOUT_2 19 57 P15/AN05/SOT0_1/IC03_2/MAD13_0
P3B/RTO01_0/TIOA1_1 20 56 P14/AN04/SIN0_1/INT03_1/IC02_2/MAD12_0
P3C/RTO02_0/TIOA2_1 21 55 P13/AN03/SCK1_1/RTCCO_1/SUBOUT_1/IC01_2/MAD11_0
P3D/RTO03_0/TIOA3_1 22 54 P12/AN02/SOT1_1/IC00_2/MAD10_0
P3E/RTO04_0/TIOA4_1 23 53 P11/AN01/SIN1_1/INT02_1/FRCK0_2/MAD09_0
P3F/RTO05_0/TIOA5_1 24 52 P10/AN00
VSS 25 51 VCC
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
VCC
P40/TIOA0_0/RTO10_1/INT12_1
P41/TIOA1_0/RTO11_1/INT13_1
P42/TIOA2_0/RTO12_1
P43/TIOA3_0/RTO13_1/ADTG_7
P44/TIOA4_0/RTO14_1/MAD00_0
P45/TIOA5_0/RTO15_1/MAD01_0
C
VSS
VCC
P46/X0A
P47/X1A
INITX
P48/DTTI1X_1/INT14_1/SIN3_2/MAD02_0
P49/TIOB0_0/IC10_1/AIN0_1/SOT3_2/MAD03_0
P4A/TIOB1_0/IC11_1/BIN0_1/SCK3_2/MAD04_0
P4B/TIOB2_0/IC12_1/ZIN0_1/MAD05_0
P4C/TIOB3_0/IC13_1/SCK7_1/AIN1_2/MAD06_0
P4D/TIOB4_0/FRCK1_1/SOT7_1/BIN1_2/MAD07_0
P4E/TIOB5_0/INT06_2/SIN7_1/ZIN1_2/MAD08_0
PE0 /MD1
MD0
PE2/X0
PE3/X1
VSS
LQFP - 100
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
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MB9B110R Series
z FPT-120P-M21/M37
(TOP VIEW)
VSS
P81
P80
VCC
P60/SIN5_0/TIOA2_2/INT15_1/MRDY_0
P61/SOT5_0/TIOB2_2
P62/SCK5_0/ADTG_3/MOEX_0
P63/INT03_0/SIN5_1/RTO20_0/MWEX_0
P64/TIOA7_0/SOT5_1/INT10_2/FRCK2_1/RTO21_0
P65/TIOB7_0/SCK5_1/IC23_1/RTO22_0
P66/SIN3_0/ADTG_8/INT11_2/IC22_1/RTO23_0
P67/SOT3_0/TIOA7_2/IC21_1/RTO24_0
P68/SCK3_0/TIOB7_2/INT12_2/IC20_1/RTO25_0
P0F/NMIX/CROUT_1/RTCCO_0/DTTI2X_0/DTTI2X_1/SUBOUT_0
P0E/CTS4_0/TIOB3_2/IC13_0/IC23_0/RTO25_1/MDQM1_0
P0D/RTS4_0/TIOA3_2/IC12_0/IC22_0/RTO24_1/MDQM0_0
P0C/SCK4_0/TIOA6_1/IC11_0/IC21_0/RTO23_1/MALE_0
P0B/SOT4_0/TIOB6_1/IC10_0/IC20_0/RTO22_1/MCSX0_0
P0A/SIN4_0/INT00_2/FRCK1_0/FRCK2_0/RTO21_1/MCSX1_0
P09/TRACECLK/TIOB0_2/RTS4_2/RTO20_1/MCSX2_0
P08/TRACED3/TIOA0_2/CTS4_2/ZIN2_1/MCSX3_0
P07/TRACED2/ADTG_0/SCK4_2/BIN2_1/MCLKOUT_0
P06/TRACED1/TIOB5_2/SOT4_2/INT01_1/AIN2_1/MCSX4_0
P05/TRACED0/TIOA5_2/SIN4_2/INT00_1/MCSX5_0
P04/TDO/SWO
P03/TMS/SWDIO
P02/TDI/MCSX6_0
P01/TCK/SWCLK
P00/TRSTX/MCSX7_0
VCC
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
VCC 1 90 VSS
P50/INT00_0/AIN0_2/SIN3_1/RTO10_0/MADATA00_0 2 89 P20/INT05_0/CROUT_0/AIN1_1/MAD24_0
P51/INT01_0/BIN0_2/SOT3_1/RTO11_0/MADATA01_0 3 88 P21/SIN0_0/INT06_1/BIN1_1
P52/INT02_0/ZIN0_2/SCK3_1/RTO12_0/MADATA02_0 4 87 P22/SOT0_0/TIOB7_1/ZIN1_1
P53/SIN6_0/TIOA1_2/INT07_2/RTO13_0/MADATA03_0 5 86 P23/SCK0_0/TIOA7_1/RTO00_1
P54/SOT6_0/TIOB1_2/RTO14_0/MADATA04_0 6 85 P24/SIN2_1/INT01_2/RTO01_1
P55/SCK6_0/ADTG_1/RTO15_0/MADATA05_0 7 84 P25/SOT2_1/RTO02_1
P56/SIN1_0/INT08_2/DTTI1X_0/MADATA06_0 8 83 P26/SCK2_1/RTO03_1
P57/SOT1_0/MADATA07_0 9 82 P27/TIOA6_2/INT02_2/RTO04_1
P58/SCK1_0/AIN2_0/MADATA08_0 10 81 P28/TIOB6_2/ADTG_4/RTO05_1
P59/SIN7_0/INT09_2/BIN2_0/MADATA09_0 11 80 P1F/AN15/ADTG_5/FRCK0_1/MAD23_0
P5A/SOT7_0/ZIN2_0/MADATA10_0 12 79 P1E/AN14/RTS4_1/DTTI0X_1/MAD22_0
P5B/SCK7_0/MADATA11_0 13 78 P1D/AN13/CTS4_1/IC03_1/MAD21_0
P30/AIN0_0/TIOB0_1/INT03_2/MADATA12_0 14 77 P1C/AN12/SCK4_1/IC02_1/MAD20_0
P31/BIN0_0/TIOB1_1/SCK6_1/INT04_2/MADATA13_0 15 76 P1B/AN11/SOT4_1/IC01_1/MAD19_0
P32/ZIN0_0/TIOB2_1/SOT6_1/INT05_2/MADATA14_0 16 75 P1A/AN10/SIN4_1/INT05_1/IC00_1/MAD18_0
P33/INT04_0/TIOB3_1/SIN6_1/ADTG_6/MADATA15_0 17 74 P19/AN09/SCK2_2/MAD17_0
P34/FRCK0_0/TIOB4_1/MNALE_0 18 73 P18/AN08/SOT2_2/MAD16_0
P35/IC03_0/TIOB5_1/INT08_1/MNCLE_0 19 72 AVSS
P36/IC02_0/SIN5_2/INT09_1/MNWEX_0 20 71 AVRH
P37/IC01_0/SOT5_2/INT10_1/MNREX_0 21 70 AVCC
P38/IC00_0/SCK5_2/INT11_1 22 69 P17/AN07/SIN2_2/INT04_1/MAD15_0
P39/DTTI0X_0/ADTG_2 23 68 P16/AN06/SCK0_1/MAD14_0
P3A/RTO00_0/TIOA0_1/RTCCO_2/SUBOUT_2 24 67 P15/AN05/SOT0_1/IC03_2/MAD13_0
P3B/RTO01_0/TIOA1_1 25 66 P14/AN04/SIN0_1/INT03_1/IC02_2/MAD12_0
P3C/RTO02_0/TIOA2_1 26 65 P13/AN03/SCK1_1/RTCCO_1/SUBOUT_1/IC01_2/MAD11_0
P3D/RTO03_0/TIOA3_1 27 64 P12/AN02/SOT1_1/IC00_2/MAD10_0
P3E/RTO04_0/TIOA4_1 28 63 P11/AN01/SIN1_1/INT02_1/FRCK0_2/MAD09_0
P3F/RTO05_0/TIOA5_1 29 62 P10/AN00
VSS 30 61 VCC
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
VCC
P40/TIOA0_0/RTO10_1/INT12_1
P41/TIOA1_0/RTO11_1/INT13_1
P42/TIOA2_0/RTO12_1
P43/TIOA3_0/RTO13_1/ADTG_7
P44/TIOA4_0/RTO14_1/MAD00_0
P45/TIOA5_0/RTO15_1/MAD01_0
C
VSS
VCC
P46/X0 A
P47/X1 A
INITX
P48/DTTI1X_1/INT14_1/SIN3_2/MAD02_0
P49/TIOB0_0/IC10_1/AIN0_1/SOT3_2/MAD03_0
P4A/TIOB1_0/IC11_1/BIN0_1/SCK3_2/MAD04_0
P4B/TIOB2_0/IC12_1/ZIN0_1/MAD05_0
P4C/TIOB3_0/IC13_1/SCK7_1/AIN1_2/MAD06_0
P4D/TIOB4_0/FRCK1_1/SOT7_1/BIN1_2/MAD07_0
P4E/TIOB5_0/INT06_2/SIN7_1/ZIN1_2/MAD08_0
P70/TIOA4_2
P71/INT13_2/TIOB4_2
P72/SIN2_0/INT14_2/TIOA6_0
P73/SOT2_0/INT15_2/TIOB6_0
P74/SCK2_0
PE0/MD1
MD0
PE2/X0
PE3/X1
VSS
LQFP - 120
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
DS706-00028-1v0-E
11
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
z FPT-100P-M36
(TOP VIEW)
P50/INT00_0/AIN0_2/SIN3_1/RTO10_0/MADATA00_0
VCC
VSS
P81
P80
VCC
P60/SIN5_0/TIOA2_2/INT15_1/MRDY_0
P61/SOT5_0/TIOB2_2
P62/SCK5_0/ADTG_3/MOEX_0
P63/INT03_0/SIN5_1/MWEX_0
P0F/NMIX/CROUT_1/RTCCO_0/DTTI2X_0/DTTI2X_1/SUBOUT_0
P0E/CTS4_0/TIOB3_2/IC13_0/IC23_0/RTO25_1/MDQM1_0
P0D/RTS4_0/TIOA3_2/IC12_0/IC22_0/RTO24_1/MDQM0_0
P0C/SCK4_0/TIOA6_1/IC11_0/IC21_0/RTO23_1/MALE_0
P0B/SOT4_0/TIOB6_1/IC10_0/IC20_0/RTO22_1/MCSX0_0
P0A/SIN4_0/INT00_2/FRCK1_0/FRCK2_0/RTO21_1/MCSX1_0
P09/TRACECLK/TIOB0_2/RTS4_2/RTO20_1/MCSX2_0
P08/TRACED3/TIOA0_2/CTS4_2/ZIN2_1/MCSX3_0
P07/TRACED2/ADTG_0/SCK4_2/BIN2_1/MCLKOUT_0
P06/TRACED1/TIOB5_2/SOT4_2/INT01_1/AIN2_1/MCSX4_0
P05/TRACED0/TIOA5_2/SIN4_2/INT00_1/MCSX5_0
P04/TDO/SWO
P03/TMS/SWDIO
P02/TDI/MCSX6_0
P01/TCK/SWCLK
P00/TRSTX/MCSX7_0
VCC
VSS
P20/INT05_0/CROUT_0/AIN1_1/MAD24_0
P21/SIN0_0/INT06_1/BIN1_1
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P51/INT01_0/BIN0_2/SOT3_1/RTO11_0/MADATA01_0 81 50 P22/SOT0_0/TIOB7_1/ZIN1_1
P52/INT02_0/ZIN0_2/SCK3_1/RTO12_0/MADATA02_0 82 49 P23/SCK0_0/TIOA7_1
P53/SIN6_0/TIOA1_2/INT07_2/RTO13_0/MADATA03_0 83 48 P1F/AN15/ADTG_5/FRCK0_1/MAD23_0
P54/SOT6_0/TIOB1_2/RTO14_0/MADATA04_0 84 47 P1E/AN14/RTS4_1/DTTI0X_1/MAD22_0
P55/SCK6_0/ADTG_1/RTO15_0/MADATA05_0 85 46 P1D/AN13/CTS4_1/IC03_1/MAD21_0
P56/INT08_2/DTTI1X_0/MADATA06_0 86 45 P1C/AN12/SCK4_1/IC02_1/MAD20_0
P30/AIN0_0/TIOB0_1/INT03_2/MADATA07_0 87 44 P1B/AN11/SOT4_1/IC01_1/MAD19_0
P31/BIN0_0/TIOB1_1/SCK6_1/INT04_2/MADATA08_0 88 43 P1A/AN10/SIN4_1/INT05_1/IC00_1/MAD18_0
P32/ZIN0_0/TIOB2_1/SOT6_1/INT05_2/MADATA09_0 89 42 P19/AN09/SCK2_2/MAD17_0
P33/INT04_0/TIOB3_1/SIN6_1/ADTG_6/MADATA10_0 90 41 P18/AN08/SOT2_2/MAD16_0
P34/FRCK0_0/TIOB4_1/MADATA11_0 91 40 AVSS
P35/IC03_0/TIOB5_1/INT08_1/MADATA12_0 92 3 9 AVRH
P36/IC02_0/SIN5_2/INT09_1/MADATA13_0 93 3 8 AVCC
P37/IC01_0/SOT5_2/INT10_1/MADATA14_0 94 37 P17/AN07/SIN2_2/INT04_1/MAD15_0
P38/IC00_0/SCK5_2/INT11_1/MADATA15_0 95 36 P16/AN06/SCK0_1/MAD14_0
P39/DTTI0X_0/ADTG_2 96 35 P15/AN05/SOT0_1/IC03_2/MAD13_0
P3A/RTO00_0/TIOA0_1/RTCCO_2/SUBOUT_2 97 34 P14/AN04/SIN0_1/INT03_1/IC02_2/MAD12_0
P3B/RTO01_0/TIOA1_1 98 33 P13/AN03/SCK1_1/RTCCO_1/SUBOUT_1/IC01_2/MAD11_0
P3C/RTO02_0/TIOA2_1 99 32 P12/AN02/SOT1_1/IC00_2/MAD10_0
P3D/RTO03_0/TIOA3_1 100 31 P11/AN01/SIN1_1/INT02_1/FRCK0_2/MAD09_0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
P3E/RTO04_0/TIOA4_1
P3F/RTO05_0/TIOA5_1
VSS
VCC
P40/TIOA0_0/RTO10_1/INT12_1
P41/TIOA1_0/RTO11_1/INT13_1
P42/TIOA2_0/RTO12_1
P43/TIOA3_0/RTO13_1/ADTG_7
P44/TIOA4_0/RTO14_1/MAD00_0
P45/TIOA5_0/RTO15_1/MAD01_0
C
VSS
VCC
P46/X0A
P47/X1A
INITX
P48/DTTI1X_1/INT14_1/SIN3_2/MAD02_0
P49/TIOB0_0/IC10_1/AIN0_1/SOT3_2/MAD03_0
P4A/TIOB1_0/IC11_1/BIN0_1/SCK3_2/MAD04_0
P4B/TIOB2_0/IC12_1/ZIN0_1/MAD05_0
P4C/TIOB3_0/IC13_1/SCK7_1/AIN1_2/MAD06_0
P4D/TIOB4_0/FRCK1_1/SOT7_1/BIN1_2/MAD07_0
P4E/TIOB5_0/INT06_2/SIN7_1/ZIN1_2/MAD08_0
PE0/MD1
MD0
PE2/X0
PE3/X1
VSS
VCC
P10/AN00
QFP - 100
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
12
DS706-00028-1v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
z BGA-112P-M04
(TOP VIEW)
H
J
11
A
B
C
67
K
L
D
E
F
G
891034512
VSS
VCC
P50
P53
VSS
P4E MD1VSS X1A INITXVCC VSS
VCC
VSS
P20
P23
AN12
AN09
AN06
AN03
P30
P34
P37
P3B
P35
AN01VCC P3F
AN07
AN04
P22
AN13
VSS P40
P81 P80 VCC P0E TRSTX
P4D AN02 VSS
AN14
AN10
P44 P4C AN05 VSS
P0B P07 TMS/
SWDIO
AN08
P52 P61 P0F P0C P08
VSS
P55
P32
P36
P43 P49
P42
P09
P0A
P48 P4B
P56 P63
Index
VSS
VSS
P33
P39
P38
P3C P3E VSS
P3A P3D
VSS
C X0A VSS P41 P45 P4A MD0 X0 X1 VSS
TDI
P21
AN15
AN11
AVRH
AVSS
AVCC
AN00
VCC
TCK/
SWCLK
VSS
P06
TDO/
SWO
P05
VSSP54
P31
P60 P62 P0DP51
<Note>
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
DS706-00028-1v0-E
13
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
PIN DESCRIPTION
The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated
port number. For these pins, there are multiple pins that provide the same function for the same channel.
Use the extended port function register (EPFR) to select the pin.
Pin No
LQFP-100 BGA-112 LQFP-120 QFP-100 Pin Name I/O circuit
type Pin state
type
1 B1 1 79 VCC -
P50
INT00_0
AIN0_2
SIN3_1
RTO10_0
(PPG10_0)
2 C1 2 80
MADATA00_0
E H
P51
INT01_0
BIN0_2
SOT3_1
(SDA3_1)
RTO11_0
(PPG10_0)
3 C2 3 81
MADATA01_0
E H
P52
INT02_0
ZIN0_2
SCK3_1
(SCL3_1)
RTO12_0
(PPG12_0)
4 B3 4 82
MADATA02_0
E H
P53
SIN6_0
TIOA1_2
INT07_2
RTO13_0
(PPG12_0)
5 D1 5 83
MADATA03_0
E H
P54
SOT6_0
(SDA6_0)
TIOB1_2
RTO14_0
(PPG14_0)
6 D2 6 84
MADATA04_0
E I
14
DS706-00028-1v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
Pin No
LQFP-100 BGA-112 LQFP-120 QFP-100 Pin Name I/O circuit
type Pin state
type
P55
SCK6_0
(SCL6_0)
ADTG_1
RTO15_0
(PPG14_0)
7 D3 7 85
MADATA05_0
E I
P56
INT08_2
DTTI1X_0
8 D5 86
MADATA06_0
- -
8
- SIN1_0
(120pin only)
E H
P57
SOT1_0
(SDA1_0)
- - 9 -
MADATA07_0
E I
P58
SCK1_0
(SCL1_0)
AIN2_0
- - 10 -
MADATA08_0
E I
P59
SIN7_0
INT09_2
BIN2_0
- - 11 -
MADATA09_0
E H
P5A
SOT7_0
(SDA7_0)
ZIN2_0
- - 12 -
MADATA10_0
E I
P5B
SCK7_0
(SCL7_0)
- - 13 -
MADATA11_0
E I
DS706-00028-1v0-E
15
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
Pin No
LQFP-100 BGA-112 LQFP-120 QFP-100 Pin Name I/O circuit
type Pin state
type
P30
AIN0_0
TIOB0_1
14
INT03_2
9 E1
-
87
MADATA07_0
(100pin only)
- -
14 - MADATA12_0
(120pin only)
E H
P31
BIN0_0
TIOB1_1
SCK6_1
(SCL6_1)
15
INT04_2
10 E2
-
88
MADATA08_0
(100pin only)
- - 15 -
MADATA13_0
(120pin only)
E H
P32
ZIN0_0
TIOB2_1
SOT6_1
(SDA6_1)
16
INT05_2
11 E3
-
89
MADATA09_0
(100pin only)
- - 16 -
MADATA14_0
(120pin only)
E H
P33
INT04_0
TIOB3_1
SIN6_1
17
ADTG_6
12 E4
-
90
MADATA10_0
(100pin only)
- - 17 -
MADATA15_0
(120pin only)
E H
P34
FRCK0_0
18
TIOB4_1
13 F1
-
91
MADATA11_0
(100pin only)
- - 18 -
MNALE_0
(120pin only)
E I
16
DS706-00028-1v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
Pin No
LQFP-100 BGA-112 LQFP-120 QFP-100 Pin Name I/O circuit
type Pin state
type
P35
IC03_0
TIOB5_1
19
INT08_1
14 F2
-
92
MADATA12_0
(100pin only)
- - 19 -
MNCLE_0
(120pin only)
E H
P36
IC02_0
SIN5_2
20
INT09_1
15 F3
-
93
MADATA13_0
(100pin only)
- - 20 -
MNWEX_0
(120pin only)
E H
P37
IC01_0
SOT5_2
(SDA5_2)
21
INT10_1
16 G1
-
94
MADATA14_0
(100pin only)
- - 21 -
MNREX_0
(120pin only)
E H
P38
IC00_0
SCK5_2
(SCL5_2)
22
INT11_1
17 G2
-
95
MADATA15_0
(100pin only)
E H
P39
DTTI0X_0
18 F4 23 96
ADTG_2
E I
P3A
RTO00_0
(PPG00_0)
TIOA0_1
RTCCO_2
19 G3 24 97
SUBOUT_2
G I
- B2 - - VSS -
DS706-00028-1v0-E
17
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
Pin No
LQFP-100 BGA-112 LQFP-120 QFP-100 Pin Name I/O circuit
type Pin state
type
P3B
RTO01_0
(PPG00_0)
20 H1 25 98
TIOA1_1
G I
P3C
RTO02_0
(PPG02_0)
21 H2 26 99
TIOA2_1
G I
P3D
RTO03_0
(PPG02_0)
22 G4 27 100
TIOA3_1
G I
P3E
RTO04_0
(PPG04_0)
23 H3 28 1
TIOA4_1
G I
P3F
RTO05_0
(PPG04_0)
24 J2 29 2
TIOA5_1
G I
25 L1 30 3 VSS -
26 J1 31 4 VCC -
P40
TIOA0_0
RTO10_1
(PPG10_1)
27 J4 32 5
INT12_1
G H
P41
TIOA1_0
RTO11_1
(PPG10_1)
28 L5 33 6
INT13_1
G H
P42
TIOA2_0
29 K5 34 7 RTO12_1
(PPG12_1)
G I
P43
TIOA3_0
RTO13_1
(PPG12_1)
30 J5 35 8
ADTG_7
G I
- K2 - - VSS -
- J3 - - VSS -
- H4 - - VSS -
18
DS706-00028-1v0-E
FUJITSU SEMICONDUCTOR CONFIDENTIAL r1.0
MB9B110R Series
Pin No
LQFP-100 BGA-112 LQFP-120 QFP-100 Pin Name I/O circuit
type Pin state
type
P44
TIOA4_0
RTO14_1
(PPG14_1)
31 H5 36 9
MAD00_0
G I
P45
TIOA5_0
RTO15_1
(PPG14_1)
32 L6 37 10
MAD01_0
G I
33 L2 38 11 C -
34 L4 39 12 VSS -
35 K1 40 13 VCC -
P46
36 L3 41 14 X0A D M
P47
37 K3 42 15 X1A D N
38 K4 43 16 INITX B C
P48
DTTI1X_1
INT14_1
SIN3_2
39 K6 44 17
MAD02_0
E H
P49
TIOB0_0
IC10_1
AIN0_1
SOT3_2
(SDA3_2)
40 J6 45 18
MAD03_0
E I
P4A
TIOB1_0
IC11_1
BIN0_1
SCK3_2
(SCL3_2)
41 L7 46 19
MAD04_0
E I
P4B
TIOB2_0
IC12_1
ZIN0_1
42 K7 47 20
MAD05_0
E I
DS706-00028-1v0-E
19