a in tel M2716/M2716M 16K (2K x 8) UV ERASABLE PROM Military a Military Temperature Range a Static Standby Mode M2716M: 55C to + 125C (Tc) lecinati M2716: 55C to + 100C (Tc) mw Low Power Dissipation of 165 mW Maximum Standby Power m 5V + 10% Vcc a Inputs and Outputs TTL Compatible g Pin Compatible to Intels M2732A 32K During Read and Program EPROM = Not Recommended for New Designs m Fast Access Time: 450 ns Maximum The Intel M2716M and M2716 are 16,384-bit ultraviolet erasable and electrically programmable read only memories (EPROMs) specified over the military extended temperature range respectively. They operate from a single + 5V power supply, have a static power-down mode, and feature fast, single-address location pro- gramming. It makes designing with EPROMs faster, easier and more economicai. Both products are manufac- tured from the same dice. Except for the operating temperature range, both products have the same electrical and programming specifictions. The M2716/M2716M has a static standby mode which reduces the power dissipation without increasing access time. The active power dissipation is reduced by over 60% in the standby power mode. Both are pin compatible to Intels 32K military EPROM, the M2732A. The M2716/M2716M has the simplest and fastest method devised yet for programming EPROMssingle pulse TTL level programming. No need for high voltage pulsing because all programming controls are handled by TTL signals. Program any focation at any timeeither individually, sequentially or at random, with the M2716s single-address location programming. Total programming time for all 16,384 bits is only 100 seconds. Block Diagram DATA OUTPUTS Vcc o+ 9-07 Pin Configurations me fl i] l l l l | M2716 M2732A PP oe E tE/ecm Min ERaee ano OUTPUT BUFFERS = DECODE R 3 V GATING a = Soak = wweurs = x . 16.384 BIT oy DECODER CELL MATRIX ~17 . ~_ 271006-2 971008-8 271006-1 Mode Selection Pin Names Pins CE/PGM OE Vpp | Voc; Outputs Ag-Aio_ | Addresses Mode (18) (20) _{ (21) | (24) | (9-11, 13-17) CE/PGM | Chip Enable/Program Read Vit Vie +5145 Dout OE Output Enable Standby ViH Dont Care} +5 | +5 High Z Q9-07 Outputs Program Pulsed Vi, to Vin Vin +26| +5 DIN Program Verify Viv Vit +251 +5 Dout Program Inhibit Vig Vin +25) +5 High Z December 1989 7-1 Order Number: 271006-003intel M2716/M2716M ABSOLUTE MAXIMUM RATINGS* NOTICE: This is a production data sheet. The specifi- cations are subject to change without notice. *WARNING: Stressing the device beyond the Absolute Case Temperature Under Bias... 65C to + 135C Storage Temperature .......... 65C to + 150C Maximum Ratings may cause permanent damage. All Input or Output Voltages with These are stress ratings only. Operation beyond the Respect to Ground........:..... +6V to 0.3V Operating Conditions is not recommended and ex- tended exposure beyond the Operating Conditions Vpp Supply Voltagewith Respect may affect device reliability. to Ground During Program ....+26.5V to 0.3V D.C. AND A.C. OPERATING CONDITIONS emperature Caer torn On). Vee VPP M2716M 55C to + 125C 5V +10% Voc M2716 55C to + 100C BV +10% Voc D.C. CHARACTERISTICS Symbol Parameter Limits Units Comments Min Typ(3) Max It Input Load Current 10 pA Vin = 5.5V lLo Output Leakage Current 10 pA Vout = 5.5V Ipp3(2) Vpp Current 6 mA Vpp = 5.5V loci (2) Vec Current (Standby) 10 30 mA CE = Vin, OE = Vit local} Voc Current (Active) 57 115 mA OE = CE = Vit ViL Input Low Voltage 0.1 0.8 Vv Vin Input High Voltage 2.0 Voc + 1 Vv VoL Output Low Voltage 0.45 Vv lo, = 2.1MA Vou Output High Voltage 2.4 Vv loH = ~400 pA NOTES: 1. Voc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. 2. Vpp can be connected directly to Vcc except during programming. The supply current will then be the sum of Ioc and [pp4- _ 3. Typical values are for Tc = 25C and nominal supply voltages. TYPICAL CHARACTERISTICS Icc Current vs. Temperature Access Time vs. Capacitance Access Time vs. Temperature 800 800 700 500 600 z 0 3 500 lecz active oy 3 300 $ a00 = = - 300 200 lees CURRENT 200 aVin = 100 100 9 0 o ~60 -40-20 0 2 40 60 BO 100 120 140 0 100 200 300 400 S00 e060 700 960 -680-40 -20 0 20 40 80 80 100 120 140 TEMPERATURE (C) Cu @F) TEMPERATURE (C) 271006-4 7-2intel M2716/M2716M A.C. CHARACTERISTICS Symbol Parameter Limits Units Comments Min Typ(3) Max tacc Address to Output Delay 450 ns | CE = OF = ViL toe CE to Output Delay 450 ns | OE =Vit toe Output Enable to Output Delay 150 ns | CE = Vit tor Output Enable High to Output Float 130 ns | CE = Vit ton Output Hold from Addresses, CE or ns | CE = OF = ViL OE Whichever Occurred First CAPACITANCE Tg. = 25C, = 1 MHz Symbol Parameter Typ Max Units Conditions Cin Input Capacitance 4 6 pF Vin = OV Cout Output Capacitance 8 12 pF Vout = OV A.C. TEST CONDITIONS Input Pulse Levels ................46- 0.8V to 2.2V Output Load - 1 TTL gate and CL = 100 pF Timing Measurement Reference Level: Input Rise and Fall Times ...............- < 20ns INPUtS ....--- eee eee 1V and 2Vv P Outputs 2.0.0... eee eee ee 0.8V and 2V A.C. TESTING, OUTPUT WAVEFORM A.C. TESTING LOAD CIRCUIT 13 24 2.0 20 wane > TEST POINTS 3.3Kn Xe S wa Device 0.45 UNDER ouT 271006-7 TeSY = A.C. Testing: Inputs are driven at 2.4V for a Logic 1 and 0.45V T* 10 F for a Logic 0. Timing Measurements are made at 2.0V for a = Lagic 1 and 0.8V for a Logic 0. 271006-8 C_ = 100 pF C, Inctudes Jig Capacitanceintel M2716/M2716M A.C. WAVEFORMS() y ADDRESSES 1 AGORESSES q vatlD J cE r veces I aeax OE Leet toe ' IDF (150 MAK) ~~ (130MAX1 tace ie Bt ob ouTPUT = VALID OUTPUT, yee 271006-5 NOTES: 1. Voc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. 2. Vpp ean be connected directly to Voc except during programming. The supply current will then be the sum of Icc and Ippy 3. Typical values are for Tc = 25C and nominal supply voltages. 4. Ail times shown in paraentheses are minimum and are nsec unless otherwise specified. 5. OE may be delayed up to tacctoe after the falling edge of CE without impact on tacc. 6. Output Float is defined as the point where data is no longer driven. DEVICE OPERATION The five modes of operation of the M2716 are listed in Table 1. \t should be noted that all inputs for the five modes are at TTL levels. The power supplies required are a + 5V Vcc and a Vpp. The Vpp power supply must be at 25V during the three programming modes, and must be at 5V in the other two modes. Read Mode The M2716 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power contro! and should be used for device selection. Output En- able (OE) is the output control and should be used to gate data to the output pins, independent of de- Mode Selection Pins CE/PGM OE Vpp | Voc Outputs Mode (18) (20) (21) | (24) | (9-11, 13-17) Read Vit VIL +5 | +5 Dout Standby Vin DontCare| +5 | +5 High Z Program Pulsed Vic to Vin VIH +25 | +5 Din Program Verify ViL VIL +25 | +5 Dout Program Inhibit Vit Vin +25| +5 High Z 74intel M2716/M27 16M vice selection. Assuming that addresses are stable, address access time (tacc) is equal to the delay from CE to output (toe). Data is available at the out- puts 150 ns foe) after the failing edge of OE, as- suming that CE has been low and addresses have been stable for at least tacc toe. Standby Mode The M2716 has a standby mode which reduces the active power dissipation by 75%, from 633 mW to 165 mW. The M2716 is placed in the standby mode by applying a TTL high special to the CE input. When in standby mode, the outputs are in a high imped- ance state, independent of the OE input. Output Or-Tieing Because M27 16s are usually used in larger memory arrays, Intel has provided a 2 line control function that accommodates this use of multiple memory connections. The two line control function allows for a) the lowest possible memory power dissipa- tion, and, b) compiete assurance that output bus conten- tion will nBt occur. To most efficiently use these two control lines, it is recommended that CE (pin 18) be decoded and used as the primary device selecting function, while OE (pin 20) be made a common connection to all devices in the array and connected to the READ line from the system controf bus. This assures that all deselected memory devices are in their low power standby mode and that the output pins are only ac- tive when data is desired from a particular memory device. Programming initially; and after each erasure, all bits of the M2716 are in the 1 state. Data is introduced by selectively programming 0s into the desired bit locations. Al- though only 0s will be programmed, both 1s and 0s can be presented in the data word. The only way to change a 0 to a 1 is by untraviolet light erasure. 7-5 The M2716 is in the programming mode when the Vpp power supply is at 25V and OE is at Viy. The data to be programmed is applied 8 bits in paraliel to the data output pins. The levels required for the ad- dress and data inputs are TTL. When the address and data are stable, a 50 ms, active high, TTL program pulse is applied to the CE input. A program pulse must be applied at each ad- dress location to be programmed. You can program any location at any timeeither individually, sequen- tially or at random. The program pulse has a maxi- mum width of 55 ms. The M2716 must not be pro- grammed with a DC signal applied to the CE input. Programming of multiple M2716s in parallel with the same data can be easily accomplished due to the simplicity of the programming requirements. Like in- puts of the paralleled M2716s may be connected together when they are programmed with the same data. A high level TTL pulse applied to the CE input programs the paralleled M2716s. Program Inhibit Programming of multiple M2716s in parallel with dif- ferent data is also easily accomplished. Except for CE, all like units (including OE) of the paraltel M2716s may be common. A TTL level program pulse applied to a M2716s CE input with Vpp at 25V will program that M2716. A low level CE input inhib- its the other M2716 from being programmed. Program Verify A verify should be performed on the programmed bits to determine that they were correctly pro- grammed. The verify may be performed with Vpp at 25V. Except during programming and program veri- fy, Vpp must be at 5V. DEVICE RELIABILITY The M2716 is built on a proven 2 layer polysilicon NMOS technology. Extensive testing and monitoring has allowed us to achieve failure rates equal to other memory devices.intel M27 16/M27 16M PROGRAMMING CHARACTERISTICS D.C. PROGRAMMING CHARACTERISTICS To = 25C +5C, Volt) = 5V +5%, Vppll.2) = 25V +1V Symbol Parameter Min Typ Max Units Comments lu Input Current (for Any !nput) 10 pA Vin = 5.25V or 0.45V Ippy Vpp Supply Current 5 mA CE = Vit Ippo Vpp Supply Current During 30 mA | CE = Vin Programming Pulse ; loc Voc Supply Current 100 mA VIL Input Low Level 0.1 0.8 Vv Vin Input High Level 2.0 Veo +1 Vv A.C. PROGRAMMING CHARACTERISTICS To = 25C +5C, Voclt) = 5V 5%, Vppll.2) = 25V +1V Symbol Parameter Min Typ Max Units Comments tas Address Setup Time 2 ps toes GE Setup Time 2 BS tos ~Data Setup Time 2 ps tan Address Hold Time 2 ps toEH GE Hold Time 2 ps tou Data Hold Time 2 ps torP Output Enable to Output Float Delay 0 200 ns CE = Vit toe Output Enable to Output Delay 200 ns CE = Vit tpw Program Pulse Width 45 50 55 ms tprT Program Pulse Rise Time 5 ns teeT Program Pulse Fall Time ns NOTES: A.C. CONDITIONS OF TEST Input Rise and Fall Times (10% to 90%)...... 20 ns Input Pulse Levels ..............--506- 0.8 to 2.2V Input Timing Reference Level ......... 0.8V and 2V Output Timing Reference Level........ 0.8V and 2V 1. Voc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. The M2716 must not be inserted into or removed from a board with Vpp at 25 +1V to prevent damage to the device. 2. The maximum ailowable voltage which may be applied to the Vpp pin during programming is + 26V. Care must be taken when switching the Vpp supply to prevent overshoot exceeding this 26V maximum specification.intel M2716/M2716M PROGRAMMING WAVEFORMS PROGRAM VeniFy Te) ADDRESSES x ADDRESS Va X tas t <_ Qo @ View F DATA IN DATA STABLE vit K torr (0.20 Marg P| [*~ Vie y OE / Yin tos te ay} (45 ma) Vig ce je "05S oo woe / Vit J K. teat ae} jwiatert . 271006-6 NOTES: 1. All times shown in parenthesis are minimum times and are ys unless otherwise noted. 2. toe and tprp are characteristics of the device but must be accommodated by the programmer.