EMIF02-MIC03F3 - STMicroelectronics

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MAIN PRODUCT CHARACTERISTICS:

Where EMI filtering in ESD sensitive equipment is

required:

■Mobile phones and communication systems

■Computers, printers and MCU Boards

DESCRIPTION

The EMIF02-MIC02 is a highly integrated devices

designed to suppress EMI/RFI noise in all systems

subjected to electromagnetic interferences. The

EMIF02 flip chip packaging means the package

size is equal to the die size.

This filter includes an ESD protection circuitry

which prevents the device from destruction when

subjected to ESD surges up 15kV.

BENEFITS

■EMI symmetrical (I/O) low-pass filter

■High efficiency in EMI filtering

■Lead free package

■Very low PCB space consuming:

1.07mm x 1.57mm

■Very thin package: 0.65 mm

■High efficiency in ESD suppression

■High reliability offered by monolithic integration

■High reducing of parasitic elements through

integration & wafer level packaging.

COMPLIES WITH THE FOLLOWING STANDARDS:

IEC61000-4-2

Level 4 on input pins 15kV (air discharge)

8kV (contact discharge)

Level 1 on output pins 2kV (air discharge)

2kV (contact discharge)

EMIF02-MIC02F2

2 LINES EMI FILTER

INCLUDING ESD PROTECTION

REV. 1October 2004

Figure 2: Basic Cell Configuration

Input Output

GND GND GND

Low-pass Filter

Ri/o = 470

Cline = 16pF

Ω

IPAD™

Flip-Chip

(6 Bumps)

Figure 1: Pin Configuration (Ball side)

123

GND

TM: IPAD is a trademark of STMicroelectronics.

Table 1: Order Code

Part Number Marking

EMIF02-MIC02F2 FJ

EMIF02-MIC02F2

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Table 2: Absolute Ratings (limiting values)

Table 3: Electrical Characteristics (Tamb = 25°C)

Symbol Parameter and test conditions Value Unit

TjMaximum junction temperature 125 °C

Top Operating temperature range - 40 to + 85 °C

Tstg Storage temperature range - 55 to + 150 °C

Symbol Parameter

VBR Breakdown voltage

IRM Leakage current @ VRM

VRM Stand-off voltage

VCL Clamping voltage

RdDynamic impedance

IPP Peak pulse current

RI/O Series resistance between Input &

Output

Cline Input capacitance per line

Symbol Test conditions Min. Typ. Max. Unit

VBR IR = 1 mA 14 16 V

IRM VRM = 12V per line 500 nA

RI/O 423 470 517 Ω

Cline @ 0V 16 pF

Figure 3: S21 (dB) attenuation measurement

and Aplac simulation

Figure 4: Analog crosstalk measurements

1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G

- 50.00

- 45.00

- 40.00

- 35.00

- 30.00

- 25.00

- 20.00

- 15.00

- 10.00

f/Hz

Measurement

Simulation

1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G

-80.00

-70.00

-60.00

-50.00

-40.00

-30.00

-20.00

f/Hz

I2/O1

EMIF02-MIC02F2

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Figure 5: Digital crosstalk measurement Figure 6: ESD response to IEC61000-4-2

(+15kV air discharge) on one input V(in) and on

one output (Vout)

Figure 7: ESD response to IEC61000-4-2

(+15kV air discharge) on one input V(in) and on

one output (Vout)

Figure 8: Line capacitance versus applied

voltage

0123456789101112

V (V)

F=1MHz

osc

=30mV

RMS

=25°C

C(pF)

EMIF02-MIC02F2

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Figure 9: Aplac model

Figure 10: Aplac parameters

MODEL = D01-gnd

Rsubump

Cox

Rsubump

Cox

Rsubump

Cox

gnd

MODEL = D01-ext

MODEL = D01-int

MODEL = D01-ext

MODEL = D01-int

R_470R

I1 O1

gnd

50pH

50m

Lgnd

Rgnd

Cgnd

50pH

50m

Lgnd

Rgnd

Cgnd

Model D01-ext

BV = 7

CJO = Cz_ext

IBV = 1u

IKF = 1000

IS = 10f

ISR = 100p

N = 1

M = 0.3333

RS = Rs_ext

VJ = 0.6

TT = 50n

Ls 400pH

Rs 100m

R_470R 482.6

Cz_ext 8.73pF

Rs_ext 850m

Cz_int 2.9pF

Rs_int 850m

Cz_gnd 215.61pF

Rs_gnd 470m

Rgnd 10m

Lgnd 48pH

Cgnd 0.15pF

Cox 3.05pF

Rsubump 200m

Model D01-int

BV = 7

CJO = Cz_int

IBV = 1u

IKF = 1000

IS = 10f

ISR = 100p

N = 1

M = 0.3333

RS = Rs_int

VJ = 0.6

TT = 50n

Model D01-gnd

BV = 7

CJO = Cz_gnd

IBV = 1u

IKF = 1000

IS = 10f

ISR = 100p

N = 1

M = 0.3333

RS = Rs_gnd

VJ = 0.6

TT = 50n

EMIF02-MIC02F2

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Figure 11: Ordering Information Scheme

Figure 12: FLIP-CHIP Package Mechanical Data

Figure 13: Foot print recommendations Figure 14: Marking

EMIF yy - xxx zz Fx

EMI Filter

Number of lines

Information

Package

x = resistance value (Ohms)

z = capacitance value / 10(pF)

3 letters = application

2 digits = version

F = Flip-Chip

x = 1: 500µm, Bump = 315µm

= 2: Leadfree Pitch = 500µm, Bump = 315µm

= 3: Leadfree Pitch = 400µm, Bump = 250µm

1.07mm ± 50µm

1.57mm ± 50µm

500µm ± 50

315µm ± 50500µm ± 50 650µm ± 65

Copper pad Diameter :

250µm recommended , 300µm max

Solder stencil opening : 330µm

Solder mask opening recommendation :

340µm min for 300µm copper pad diameter

365

240

220

All dimensions in µm

Dot, ST logo

xx = marking

yww = datecode

(y = year

ww = week)

z = packaging

location

EMIF02-MIC02F2

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Figure 15: FLIP-CHIP Tape and Reel Specification

Dot identifying Pin A1 location

User direction of unreeling

All dimensions in mm

4 +/- 0.1

8 +/- 0.3

4 +/- 0.1

1.75 +/- 0.1 3.5 +/- 0.1

Ø 1.5 +/- 0.1

0.73 +/- 0.05

xxz

yww

xxz

yww

xxz

yww

Table 4: Ordering Information

Note: More informations are available in the application notes:

AN1235: “Flip-Chip: Package description and recommendations for use”

AN1751: "EMI Filters: Recommendations and measurements"

Ordering code Marking Package Weight Base qty Delivery mode

EMIF02-MIC02F2 FJ Flip-Chip 2.3 mg 5000 Tape & reel 7”

Table 5: Revision History

Date Revision Description of Changes

12-Oct-2004 1 First issue

EMIF02-MIC02F2

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

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