HEXFET® Power MOSFET
VDSS = -30V
RDS(on) = 0.60Ω
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
A customized leadframe has been incorporated into the
standard SOT-23 package to produce a HEXFET Power
MOSFET with the industry's smallest footprint. This
package, dubbed the Micro3, is ideal for applications
where printed circuit board space is at a premium. The low
profile (<1.1mm) of the Micro3 allows it to fit easily into
extremely thin application environments such as portable
electronics and PCMCIA cards.
IRLML5103
Description
lGeneration V Technology
lUltra Low On-Resistance
lP-Channel MOSFET
lSOT-23 Footprint
lLow Profile (<1.1mm)
lAvailable in Tape and Reel
lFast Switching
Parameter Max. Units
ID @ TA = 25°C Continuous Drain Current, VGS @ -10V -0.76
ID @ TA = 70°C Continuous Drain Current, VGS @ -10V -0.61 A
IDM Pulsed Drain Current -4.8
PD
@TA = 25°C Power Dissipation 540 mW
Linear Derating Factor 4.3 mW/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
TJ, TSTG Junction and Storage Temperature Range -55 to + 150 °C
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJA Maximum Junction-to-Ambient 230
Thermal Resistance
°C/W
S
G1
2
D3
Micro3™
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12/14/11
PD - 91260F
IRLML5103
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Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -30 V VGS = 0V, ID = -250µA
ΔV(BR)DSS/ΔTJBreakdown Voltage Temp. Coefficient -0.029 V/°C Reference to 25°C, ID = -1mA
0.60 VGS = -10V, ID = -0.60A
1.0 VGS = -4.5V, ID = -0.30A
VGS(th) Gate Threshold Voltage -1.0 V VDS = VGS, ID = -250µA
gfs Forward Transconductance 0.44 S VDS = -10V, ID = -0.30A
-1.0 VDS = -24V, VGS = 0V
-25 VDS = -24V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage -100 VGS = -20V
Gate-to-Source Reverse Leakage 100 VGS = 20V
QgTotal Gate Charge 3.4 5.1 ID = -0.60A
Qgs Gate-to-Source Charge 0.52 0.78 nC VDS = -24V
Qgd Gate-to-Drain ("Miller") Charge 1.1 1.7 VGS = -10V, See Fig. 6 and 9
td(on) Turn-On Delay Time 10 VDD = -15V
trRise Time 8.2 ID = -0.60A
td(off) Turn-Off Delay Time 23 RG = 6.2Ω
tfFall Time 16 RD = 25Ω, See Fig. 10
Ciss Input Capacitance 75 VGS = 0V
Coss Output Capacitance 37 pF VDS = -25V
Crss Reverse Transfer Capacitance 18 = 1.0MHz, See Fig. 5
Ω
µA
nA
ns
IGSS
IDSS Drain-to-Source Leakage Current
RDS(ON) Static Drain-to-Source On-Resistance
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage -1.2 V TJ = 25°C, IS = -0.60A, VGS = 0V
trr Reverse Recovery Time 26 39 ns TJ = 25°C, IF = -0.60A
Qrr Reverse RecoveryCharge 20 30 nC di/dt = 100A/µs
Source-Drain Ratings and Characteristics
A
S
D
G
-0.54
-4.8
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ -0.60A, di/dt ≤ 110A/µs, VDD ≤ V
(BR)DSS,
TJ ≤ 150°C
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Surface mounted on FR-4 board, t ≤ 5sec.
IRLML5103
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 2. Typical Output Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
0.1
1
10
0.1 1 10
D
DS
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
-3.0V
VGS
TOP - 15V
- 10V
- 7.0V
- 5.5V
- 4.5V
- 4.0V
- 3.5V
BOTTOM - 3.0V
20μs PULSE WIDTH
T = 150°C
J
0.1
1
10
3.0 4.0 5.0 6.0 7.0 8.0
T = 25°C
T = 150°C
J
J
GS
D
A
-I , Drain-to-Source Current (A)
-V , Gate-to-Source Voltage (V)
V = -10V
20μs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
-60 -40 -20 0 20 40 60 80 100 120 140 160
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
A
V = -10V
GS
I = -0.60A
D
0.1
1
10
0.1 1 10
D
DS
20μs PULSE WIDTH
T = 25°C
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
J
-3.0V
VGS
TOP - 15V
- 10V
- 7.0V
- 5.5V
- 4.5V
- 4.0V
- 3.5V
BOTTOM - 3.0V
IRLML5103
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Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0
20
40
60
80
100
120
140
1 10 100
C, Capacitance (pF)
A
DS
-V , Drain-to-Source Voltage (V)
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0.0 1.0 2.0 3.0 4.0 5.0
G
GS
A
-V , Gate-to-Source Voltage (V)
Q , Total Gate Charge (nC)
V = -24V
V = -15V
DS
DS
FOR TEST CIRCUIT
SEE FIGURE 9
I = -0.60A
D
0.1
1
10
0.4 0.6 0.8 1.0 1.2 1.4 1.6
T = 25°C
T = 150°C
J
J
V = 0V
GS
SD
SD
A
-I , Reverse Drain Current (A)
-V , Source-to-Drain Voltage (V)
0.1
1
10
1 10 100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
T = 25°C
T = 150°C
Single Pulse
A
-I , Drain Current (A)
-V , Drain-to-Source Voltage (V)
DS
D
A
J
100μs
1ms
10ms
IRLML5103
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
VDS
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
VDD
RG
D.U.T.
Fig 9a. Basic Gate Charge Waveform
Q
G
Q
GS
Q
GD
V
G
Charge
Fig 9b. Gate Charge Test Circuit
-10V
D.U.T. V
DS
I
D
I
G
-3mA
V
GS
.3μF
50KΩ
.2μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
+
-
0.1
1
10
100
1000
0.00001 0.0001 0.001 0.01 0.1 1 10 100
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJA A
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJA
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRLML5103
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Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
RG
VDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
*
VGS*
**
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 13. For P-Channel HEXFETS
IRLML5103
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Micro3 / SOT-23 Package Marking
A YW LC
PART NUMBER
Y = YEAR
W = WEEK
LOT
CODE
HALOGEN FREE
INDICATOR
PART NUMBER CODE REFERENCE:
A = IRLML2402
B =IRLML2803
C = IRLML2402
D = IRLML5103
E = IRLML6402
F = IRLML6401
G = IRLML2502
H = IRLML5203
Note: A line above the work week
(as shown here) indicates Lead-free
Micro3 (SOT-23 / TO-236AB) Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
A2001 A27
W = (1-26) IF PRECEDED BY LAST DIGIT OF CALENDAR YEAR
W = (27-52) IF PRECEDED BY A LETTER
Y
82008
32003
12001
YEAR
2002 2
52005
2004 4
2007
2006
7
6
2010 0
2009 9
YEAR Y
C03
WOR K
WE E K
01
02
A
W
B
04 D
24
26
25
X
Z
Y
WOR K
WE E K W
K
H
G
F
E
D
C
B
2006
2003
2002
2005
2004
2008
2007
2010
2009 J
Y51
29
28
30
C
B
D
50 X
52 Z
0.972
1.900
Recommended Footprint
0.802
0.950 2.742
Micro3 (SOT-23) (Lead-Free) Package Outline
Dimensions are shown in millimeters (inches)
e
E1
E
D
A
B
0.15 [0.006]
e1
12
3
MCBA
5
6
6
5
3X L
c
b
A1 3X
A
A2
ABC
M
0.20 [0.008]
0.10 [0.004] C
C
L2
H4L1
7
0.89 1.12
SYMBOL MAXMIN
A1
b
0.01 0.10
c
0.30 0.50
D
0.08 0.20
E
2.80 3.04
E1
2.10 2.64
e
1.20 1.40
A
0.95 BSC
L 0.40 0.60
08
MILLIMETERS
A2 0.88 1.02
e1 1.90 BSC
REF0.54L1
BSC0.25L2
BSC
REF
%6&
INCHES
80
%6&
0.0004
MIN MAX
DIMENSIONS
NOTES:
1. DIMENSIONING & TOLERANCING PER ANSI Y14.5M-1994
2. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
3. CONTROLLING DIMENSION: MILLIMETER.
4. DATUM PLANE H IS LOCATED AT THE MOLD PARTING LINE.
5. DATUM A AND B TO BE DETERMINED AT DATUM PLANE H.
6. DIMENSIONS D AND E1 ARE MEASURED AT DATUM PLANE H. DIMENSIONS DOES
NOT INCLUDE MOLD PROTRUSIONS OR INTERLEAD FLASH. MOLD PROTRUSIONS
OR INTERLEAD FLASH SHALL NOT EXCEED 0.25 MM [0.010 INCH] PER SIDE.
7. DIMENSION L IS THE LEAD LENGTH FOR SOLDERING TO A SUBSTRATE.
8. OUTLINE CONFORMS TO JEDEC OUTLINE TO-236 AB.
IRLML5103
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Tape & Reel Information
SOT-23
Dimensions are shown in millimeters (inches)
2.05 ( .080 )
1.95 ( .077 )
TR
FEED DIRECTION
4.1 ( .161 )
3.9 ( .154 )
1.6 ( .062 )
1.5 ( .060 ) 1.85 ( .072 )
1.65 ( .065 )
3.55 ( .139 )
3.45 ( .136 )
1.1 ( .043 )
0.9 ( .036 )
4.1 ( .161 )
3.9 ( .154 ) 0.35 ( .013 )
0.25 ( .010 )
8.3 ( .326 )
7.9 ( .312 )
1.32 ( .051 )
1.12 ( .045 )
9.90 ( .390 )
8.40 ( .331 )
178.00
( 7.008 )
MAX.
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 101N.Sepulveda Blvd, El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/2011
