***** * Sandpoint This schematic is provided for reference purposes only. All information is subject to change without notice. No warranty, expressed or applied, is made as to the accuracy of the information contained herein. Contact Motorola Sale/FAEs to obtain the latest information on this product. ** * * * *** * *** * Supporting MPPMC603 - Talos MPPMC740 - Talos MPPMC745 - Talos MPPMC8240 - Unity MPPMC8245 - Unity MPPMC8260 - Cygnus MPPMC750 - Altimus MPPMC755 - Altimus MPPMC7400 - Altimus MPPMC7410 - Altimus MPPMC7450 - Valis ...tbd... *Digital DNA from Motorola GARY MILLIORN Schematic Notes 1. 2. Integrated circuits have default connections to power and ground unless explicitly shown otherwise. Global power connections are: GND VCC_3.3V VCC_5V 3. Part numbers used are for reference only; compatible parts may be used; refer to the bill of materials. 4. Motorola and the Motorola logo are registered trademarks of Motorola. PowerPC is a trademark of IBM. Other trademarks are the respective property of their respective copyright holders. Diane, I am holding in my hand a box of small, chocolate bunnies. All rights reserved. 5. The sheet-to-sheet cross reference format is: Sheet "-" VertZoneLetter HorizZoneNumber Components with the property "no_stuff" are not to be installed by default; they are for test or manufacturing purposes only. 6. Page Unless otherwise specified: All resistors are SMD0603, in ohms, 0.1W, +/-5% All capacitors are SMD0603, in microfarads (uF), +/-20%. All inductances are in microhenries (uH). All ferrites are Z=50 ohms at 100 MHz. All fuses are self-resetting polyswitch (PTC) devices. Board impedance is 50-60 ohms. 7. All buses follow big-endian bit numbering order (bit 0 is the most-significant bit), except where industry standards apply (i.e. PCI). Little-endian numbering is noted at the source component. Team Sandpoint * Sandpoint Cindy Black Ivan Erickson Gary Milliorn Tony Saucedo Joey Tsai Gary Wojcik PCB CAD Program Mgr. Designer Components Documentation Imperial Poobah Contents 01 Cover Page 02 03 General Information Block Diagram 04 05 Routing and Layout Information Power Supply 06 07 Clock Generation Processor PMC Socket 08 09 64-bit PCI PMC Connector PCI/ISA Bridge 10 11 IDE Connectors Super I/O Controller 12 13 Floppy, PC I/O Connectors Serial Ports 14 15 PCI Slots #1, #2 PCI Slots #3, #4 16 17 PCI Boot ROMs, NVRAM SPF100 - Arbiter/Interrupt Controller 18 19 Configuration Switches; Monitor LEDs Pullups CHANGES REV DATE X1 98MAR23 Original X2 X3 98DEC11 00JUL26 Connector orientation; crosspoint tweaks. Many changes PMC Connector 32/64 bit PPMC Extensions 66 MHz Extensions <07-08> Power Supply ATX Chassis Header <05> 32-bit/64-bit 33/66 MHz PCI Bus System Clocks PCI: 33 or 66 MHz PC Clocks. <06> IDE Connectors Southbridge (2) 33/66-MHz ATAPI PCI Slots Winbond W53C55x <10> (2) 32-bit 5V PCI slots (2) 64-bit 5V PCI slots <14,15> <09> Reset Logic Chassis Headers <05> ISA Bus Interrupt Routing Non-Volatile RAM <17> Super I/O Controller 8K bytes APC/RTC Power Supply National 87307 <16> 1) 512KB 2) 8MB <11> Arbitration Routing PC I/O Ports <17> PS/2 Keyboard & Mouse Parallel Port & Floppy Serial Ports Boot Flash Rom <12,13> <16> GARY MILLIORN Layout/Routing Instructions 06 Keep series termination resistors near the output pins. Route all PCI clock lengths to equal the WBCLK trace less 2.5" Use heavy traces for power path through filter: +3.3V => VCCO pins & Rxxx/Rxxx Combo => VCCI Pin. Surround MPC972 with 4-6 0.1uF caps to provide good ground-return paths. Keep XTAL1 pin and jumper insanely close. 07 Place PMC at top side of ATX board. 08 " 09 Use equal-length traces on nets DAK(2:0) from WinBond to 'F138. 10 Place series termination resistors near socket. 11 Use very short traces from 32kHz crystal to SuperI/O and to connected components. Allow no other traces to enter or cross the crystal oscillator area. Use 12 mil traces for VBAT and VSTDBY. 12 Place EMI filtering caps and ferrite beads very close to DIN6 and DB25 connectors. Place series resistors for parallel port near DB25 connector. 13 Keep traces very short between RS232 drivers (U1, U2) and DB9 connectors. Use 12 mil traces for +12V and -12V. 14 Place IDSEL resistor near IDSEL pin. STDBY LED PWR SW SPKR DISK LED ON CHASSIS PWR LED IR Port Use split power planes for 5V and 3.3V power. Place header in lower-left hand corner of the board (I/O connectors would be in the upper right. Allow clearance around header to allow for silkscreen legends. Label pin groups as shown. RESET SWITCH 05 15 Place IDSEL resistor near IDSEL pin. 16 Use 12 mil traces between battery connector and diodes (before and after). 17 No special restrictions. 18 No special restrictions. 19 Recommended placement for status LEDs is under the disk tray area. Place LEDs in order and label with indicated text. Follow ATX chassis specs for ATX mounting hole sizes and plated area allowance. 20 Distribute capacitors as shown, unless otherwise specified. 21 Keep traces as short as possible. Pin swapping within and without of a package is encouraged in order to minimize trace length. i i i i Local Reset Switch ATX Chassis Cable Header Place in lower-left hand corner of board for cable connection. i Local Power Switch ATX Chassis Mounting Holes NVRAM SOURCING Select VSTDBY or battery as available. i TEST CLOCK INPUT Select CLKOFF to select external 50ohm clock source. i CLOCK EQUALIZATION Route indicated clocks to match WBCLK less 2.5 inches per PCI and PMC specifications. i PCI VIO SELECT Select 3.3V or 5V VIO option. Default: 5V i PRIMARY IDE i SECONDARY IDE i 32kHz Oscillator Keep all traces extremely short. Route no traces through that area. i i PS/2 Keyboard i PS/2 Mouse i Floppy connector Parallel Port Right-angle PCB mount i i Serial Port #1 Serial Port #2 i PCI Slot #1 IDSEL AD13 Closest to PMC. i PCI Slot #2 IDSEL AD14 Next-closest to PMC. i PCI Slot #3 IDSEL AD15 Third from PMC. i PCI Slot #4 IDSEL AD16 Furthest from PMC. i Diagnostic LEDs Place in visible area.