AP138 300mA Low-Noise CMOS LDO Features General Descriptions - Very low dropout voltage - Low current consumption: Typ.30A, Max. 35A - Output voltage: 1.8V, 2.5V, 2.8V, 3.0V and 3.3V - High accuracy output voltage: 1.5% - Guaranteed 300mA output - Input range up to 7.0V - Thermal shutdown - Current limiting - Stability with low ESR capacitors - Factory pre-set output voltages - Low temperature coefficient - Pb-free package: SOT23-5L The AP138 is a positive voltage linear regulator utilizing CMOS technology. The features that include low quiescent current (30A typ.), low dropout voltage, and high output voltage accuracy, make it ideal for battery applications. EN input connected to CMOS has low bias current. The space-saving SOT23-5L package is attractive for "Pocket" and "Hand Held" applications. This rugged device has both thermal shutdown, and current limit protections to prevent device failure under the "Worst" operating conditions. In a low noise, regulated supply application, a 1000pF capacitor is necessary to be placed in between Bypass and Ground. Applications - Battery-powered devices - Personal communication devices - Home electric/electronic appliances - PC peripherals The AP138 is stable with a low ESR output capacitor of 1.0F or greater. Pin Assignments Pin Descriptions (Top View) VOUT BYP 5 Pin Name VIN GND EN BYP VOUT 4 AP138 1 VIN 2 Pin No. 1 2 3 4 5 Function Power Supply Ground Enable Pin Bypass Signal Pin Output 3 GND EN SOT23-5 Ordering Information AP138 XX X X Output voltage Package 18: 1.8V 25: 2.5V 28: 2.8V 30: 3.0V 33: 3.3V W : SOT23-5L Packing Blank: Tube A: Taping This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Rev. 1.0 Oct 29, 2004 1/7 AP138 300mA Low-Noise CMOS LDO Block Diagram VIN VOUT Current Limit 1uA Thermal Shutdown R1 EN - BYP AMP + Vref R2 GND Absolute Maximum Ratings Symbol VCC IOUT VOUT TA TJ Parameter Input Voltage Output Current Output Voltage ESD Classification Ambient Temperature Range Junction Temperature Range Rating +7 PD/ (VIN-VO) GND - 0.3 to VIN+ 0.3 B -40 to +85 -40 to +125 Unit V mA V Maximum 160 250 150 300 Unit C/W mW C C C C Thermal Information Symbol jc PD TJ TLead Parameter Thermal Resistance Internal Power Dissipation (T=100 C) Maximum Junction Temperature Maximum Lead Temperature (10 sec) SOT23-5L SOT23-5L Anachip Corp. www.anachip.com.tw Rev. 1.0 2/7 Oct 29, 2004 AP138 300mA Low-Noise CMOS LDO Electrical Characteristics (TA=+25C, unless otherwise noted.) Symbol Parameter Test Conditions VIN Input Voltage VOUT Output Voltage Accuracy IO=1mA to 300mA 1.2V<VO(NOM) 2.0V IO=1mA to 300mA, VDROPOUT Dropout Voltage 2.0V<VO(NOM) VOUT=VO(NOM)-1.5% 2.5V 2.5V<VO(NOM) IOUT Output Current VOUT > 1.2V ILIMIT Current Limit VOUT > 1.2V IQ Quiescent Current IO=0mA IGND Ground Pin Current IO=1mA to 300mA REGLINE Line Regulation IOUT=5mA, VIN=VOUT+1 to VOUT+2 REGLOAD Load Regulation IO=1mA to 300mA Over Temperature OTS Shutdown Over Temperature OTH Hysteresis VOUT Temperature TC Coefficient f=1KHz I =100mA, PSRR Power Supply Rejection O f=10KHz CO=2.2F ceramic f=100KHz f=1KHz IO=100mA, PSRR Power Supply Rejection CO=2.2F ceramic, f=10KHz CBYP=0.01F f=100KHz CO=2.2uF f=10Hz to 100kHz, eN Output Voltage Noise IO=10mA, CBYP=0F CO=100uF CO=2.2uF f=10Hz to 100kHz, eN Output Voltage Noise IO=10mA, CBYP=0.01F CO=100uF Shutdown Supply ISD VIN=5.0V, VOUT=0V, VEN < VEL Current IEH VEN=VIN, VIN=2.6V to 7V EN Input Bias Current IEL VEN=0V, VIN=2.6V to 7V VEH VIN=2.6V to 7V EN Input Threshold VEL VIN=2.6V to 7V Min. Note 1 -1.5 Typ. - Max. 7 1.5 Unit V % - - 1300 - - 800 300 300 -0.1 - 450 30 30 0.02 0.2 300 35 50 0.1 1 - 150 - o C - 30 - o C - 40 - - 60 50 40 75 55 30 30 20 30 20 - - 2.0 3.0 A 2 0 2.0 - 0.1 3.0 VIN 0.4 A A V V mV mA mA A A % % ppm/ oC dB dB Vrms Vrms Note 1. : VIN(MIN)=VOUT+VDROPOUT Typical Application VIN IN VOUT OUT AP138 BYP C1 1uF C2 1nF GND EN C3 1uF Anachip Corp. www.anachip.com.tw Rev. 1.0 3/7 Oct 29, 2004 AP138 300mA Low-Noise CMOS LDO Typical Performance Characteristics Anachip Corp. www.anachip.com.tw Rev. 1.0 4/7 Oct 29, 2004 AP138 300mA Low-Noise CMOS LDO Typical Performance Characteristics (Continued) Anachip Corp. www.anachip.com.tw Rev. 1.0 5/7 Oct 29, 2004 AP138 300mA Low-Noise CMOS LDO Function Description Enable The enable pin normally floats high. When actively, pulled low, the PMOS pass transistor shut off, and all internal circuits are powered down. In this state, the quiescent current is less than 2A. This pin behaves much like an electronic switch. The AP138 of CMOS regulators contain a PMOS pass transistor, voltage reference, error amplifier, over-current protection, thermal shutdown. The P-channel pass transistor receives data from the error amplifier, over-current protection, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and thermal shutdown circuits become active when the junction temperature exceeds 150oC, or the current exceeds 300mA. During thermal shutdown, the output voltage remains low. Normal operation is restored o when the junction temperature drops below 120 C. External Capacitor The AP138 is stable with a low ESR output capacitor to ground of 1.0F or greater. It can keep stable even with higher ESR capacitors. A second capacitor is recommended between the input and ground to stabilize VIN. The input capacitor should be larger than 0.1F to have a beneficial effect. All capacitors should be placed in close proximity to the pins. A "quiet" ground termination is desirable. The AP138 switches from voltage mode to current mode when the load exceeds the rated output current. This prevents over-stress. Marking Information 4 38 XYW 1 Appendix Identification Code D K N P S 7 5 2 3 X : Identification code (See Appendix) Y : Year: 0-9 W : Week: A~Z: 01~26 a~z : 27~52 . : 53 SOT23-5L Anachip Corp. www.anachip.com.tw Output version AP138-1.8V AP138-2.5V AP138-2.8V AP138-3.0V AP138-3.3V Rev. 1.0 6/7 Oct 29, 2004 AP138 300mA Low-Noise CMOS LDO Package Information Package Type: SOT23-5L D e1 1(4x) 4 5 E1 A E 0.10 C 5x A2 Seating Plane A1 1 2 2(4x) 3 b e With Plating b1 C C1 Gauge Plane 0.25 mm Base Metal L b Symbol L1 Dimensions In Millimeters Dimensions In Inches Min. Nom. Max. Min. Nom. Max. A 1.05 1.20 1.35 0.041 0.047 0.053 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 1.00 1.10 1.20 0.039 0.043 0.047 b 0.25 - 0.55 0.010 - 0.022 b1 0.25 0.40 0.45 0.010 0.016 0.018 c 0.08 - 0.20 0.003 - 0.008 c1 0.08 0.11 0.15 0.003 0.004 0.006 D 2.70 2.85 3.00 0.106 0.112 0.118 E 2.60 2.80 3.00 0.102 0.110 0.118 E1 1.50 1.60 1.70 0.059 0.063 0.067 L 0.35 0.45 0.55 0.014 0.018 0.022 L1 0.60 Ref. 0.024 Ref. e 0.95 Bsc. 0.037 Bsc. e1 1.90 Bsc. 0.075 Bsc. 0o 5o 10o 0o 5o 10o 1 3o 5o 7o 3o 5o 7o 2 o o o o 6 8 o 10 Anachip Corp. www.anachip.com.tw 6 8 10o Rev. 1.0 7/7 Oct 29, 2004