10/01/10
www.irf.com 1
HEXFET® Power MOSFET
VDSS = 55V
RDS(on) = 13.5m
ID = 51A
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features combine
to make this design an extremely efficient and
reliable device for use in a wide variety of
applications.
S
D
G
Description
l
Logic Level
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
175°C Operating Temperature
l
Fast Switching
l
Repetitive Avalanche Allowed up to Tjmax
l
Lead-Free
Features
IRLZ44ZPbF
IRLZ44ZSPbF
IRLZ44ZLPbF
D2Pak
IRLZ44ZSPbF
TO-220AB
IRLZ44ZPbF
TO-262
IRLZ44ZLPbF
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 10C Continuous Drain Current, VGS @ 10V A
IDM
P
u
l
se
d D
ra
i
n
C
urren
t
c
PD @TC = 25°C Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Volta
g
e V
EAS (Thermally limited)
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy
d
mJ
EAS (Tested )
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy T
es
t
e
d V
a
l
ue
h
IAR
A
va
l
anc
h
e
C
urren
t
c
A
EAR
R
epe
titi
ve
A
va
l
anc
h
e
E
ner
gy
g
mJ
TJ Operatin
Junction and
TSTG Stora
g
e Temperature Ran
g
C
Soldering Temperature, for 10 seconds
Mountin
g
Tor
q
ue, 6-32 or M3 screw
i
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case
k
––– 1.87 °C/W
RθCS Case-to-Sink, Flat Greased Surface
ik
0.50 ––
RθJA Junction-to-Ambient
ik
––– 62
RθJA Junction-to-Ambient (PCB Mount)
jk
––– 40
-55 to + 175
300 (1.6mm from case )
10 lbf
y
in (1.1N
y
m)
80
0.53
± 16
Max.
51
36
204
110
78
See Fig.12a, 12b, 15, 16
PD - 95539A
IRLZ44Z/S/LPbF
2www.irf.com
S
D
G
El
ectr
i
ca
l Ch
aracter
i
st
i
cs
@ T
J
=
2
5
°C (
un
l
ess
ot
h
erw
i
se
spec
ifi
e
d)
Parameter Min. T
y
p. Max. Units
V(BR)DSS Drain-to-Source Breakdown Volta
g
e55V
V(BR)DSS
/
TJ Breakdown Volta
g
e Temp. Coefficient ––– 0.05 ––– VC
RDS(on) Static Drain-to-Source On-Resistance –– 11 13.5 m
––– –– 20 m
––– ––– 22.5 m
VGS(th) Gate Threshold Volta
g
e 1.0 –– 3.0 V
g
fs Forward Transconductance 27 ––– ––– V
IDSS Drain-to-Source Leaka
g
e Current ––– ––– 20 µA
––– –– 250
IGSS Gate-to-Source Forward Leaka
g
e ––– –– 200 nA
Gate-to-Source Reverse Leaka
g
e ––– ––– -200
QgTotal Gate Char
g
e ––– 24 36
Qgs Gate-to-Source Char
g
e ––– 7.5 –– nC
Qgd Gate-to-Drain ("Miller") Char
g
e–12
td(on) Turn-On Dela
y
Time –– 14 ––
trRise Time ––– 160 –––
td(off) Turn-Off Dela
y
Time ––– 25 ––– ns
tfFall Time ––– 42 –––
LDInternal Drain Inductance ––– 4.5 –– Between lead,
nH 6mm (0.25in.)
LSInternal Source Inductance ––– 7.5 –– from packa
g
e
and center of die contact
Ciss Input Capacitance ––– 1620 ––
Coss Output Capacitance ––– 230 ––
Crss Reverse Transfer Capacitance ––– 130 ––– pF
Coss Output Capacitance ––– 860 ––
Coss Output Capacitance ––– 180 ––
Coss eff. Effective Output Capacitance ––– 280 –––
Source-Drain Ratin
g
s and Characteristics
Parameter Min. T
y
p. Max. Units
ISContinuous Source Current ––– ––– 51
(Body Diode) A
ISM Pulsed Source Current ––– –– 204
(
Bod
y
Diode
)
c
VSD Diode Forward Volta
g
e–1.3V
trr Reverse Recover
y
Time 2132ns
Qrr Reverse Recover
y
Char
g
e ––– 16 24 nC
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
VGS = 5.0V
e
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 2C, IS = 31A, VGS = 0V
e
TJ = 2C, IF = 31A, VDD = 28V
di/dt = 100As
e
Conditions
VGS = 0V, ID = 250µA
Reference to 2C, ID = 1mA
VGS = 10V, ID = 31A
e
VDS = VGS, ID = 250µA
VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 125°C
VGS = 0V, VDS = 0V to 44V
f
VGS = 5.0V
e
VDD = 50V
ID = 31A
RG = 7.5
VGS = 5.0V, ID = 30A
e
VGS = 4.5V, ID = 15A
e
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VDS = 25V, ID = 31A
ID = 31A
VDS = 44V
VGS = 16V
VGS = -16V
IRLZ44Z/S/LPbF
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Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
Vs. Drain Current
0 1020304050
ID, Drain-to-Source Current (A)
0
20
40
60
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 10V
380µs PULSE WIDTH
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
60µs PULSE WIDTH
Tj = 25°C
3.0V
VGS
TOP 15V
10V
8.0V
5.0V
4.5V
4.0V
3.5V
BOTTOM 3.0V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
60µs PULSE WIDTH
Tj = 175°C
3.0V
VGS
TOP 15V
10V
8.0V
5.0V
4.5V
4.0V
3.5V
BOTTOM 3.0V
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VGS, Gate-to-Source Voltage (V)
1.0
10.0
100.0
1000.0
ID, Drain-to-Source Current (Α)
VDS = 20V
60µs PULSE WIDTH
TJ = 25°C
TJ = 175°C
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
0
500
1000
1500
2000
2500
C, Capacitance (pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
0 1020304050
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
VDS= 11V
ID= 31A
0.2 0.6 1.0 1.4 1.8
VSD, Source-to-Drain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10. Normalized On-Resistance
Vs. Temperature
25 50 75 100 125 150 175
TJ , Junction Temperature (°C)
0
10
20
30
40
50
60
ID , Drain Current (A)
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.736 0.000345
0.687 0.00147
0.449 0.007058
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
τ
τC
Ci i/Ri
Ci= τi/Ri
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 30A
VGS = 5.0V
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Q
G
Q
GS
Q
GD
V
G
Charge
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
1K
VCC
DUT
0
L
25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
0
80
160
240
320
EAS, Single Pulse Avalanche Energy (mJ)
I D
TOP 3.7A
5.7A
BOTTOM 31A
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
3.0
VGS(th) Gate threshold Voltage (V)
ID = 250µA
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Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1% Duty Cycle
ID = 31A
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
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VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Inductor Current
IRLZ44Z/S/LPbF
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TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
Note: "P" inass embly line position
indicates "Lead - Free"
LINE C
WE E K 19
PART NUMBER
DAT E CODE
YE AR 7 = 1997
AS S EMBLED ON WW 19, 1997
THIS IS AN IRF1010 EXAMPLE:
IN THE ASSEMBLY LINE "C"
LOT CODE 1789 INTERNATIONAL
AS S E MB L Y
LOT CODE
RECTIFIER
LOGO
TO-220AB packages are not recommended for Surface Mount Application.
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRLZ44Z/S/LPbF
10 www.irf.com
D2Pak Part Marking Information
DAT E CODE
YE AR 0 = 2000
WEE K 02
A = AS S E MB L Y S I T E COD E
RECTIF IER
INT ERNAT IONAL PART NUMBER
P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
F530S
IN THE ASSEMBLY LINE "L"
AS S EMB LE D ON WW 02, 2000
THIS IS AN IRF530S WITH
LOT CODE 8024 INTERNATIONAL
LOGO
RECTIFIER
LOT CODE
ASSEMBLY YEAR 0 = 2000
PART NUMBER
DAT E CODE
LINE L
WEEK 02
OR
F530S
LOGO
AS S E MB L Y
LOT CODE
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRLZ44Z/S/LPbF
www.irf.com 11
TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
LOGO
RECT IFIER
INTE RNAT IONAL
LOT CODE
ASSEMBLY
LOGO
RECTIFIER
INT ERNATIONAL
DAT E CODE
WEE K 19
YE AR 7 = 1997
PART NUMBE R
A = ASSEMBLY SITE CODE
OR
PRODUCT (OPTIONAL)
P = D E S I GNAT E S L E AD-F R E E
E XAMPLE : T HIS IS AN IRL3103L
LOT CODE 1789
AS S E MB L Y
PART NUMBER
DATE CODE
WEEK 19
LINE C
LOT CODE
YEAR 7 = 1997
AS S EMBL E D ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
IRLZ44Z/S/LPbF
12 www.irf.com
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/2010
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.166mH
RG = 25, IAS = 31A, VGS =10V. Part not
recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
Notes:
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is only applied to TO-220AB pakcage.
This is applied to D2Pak, when mounted on 1" square PCB (FR-
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
D2Pak Tape & Reel Infomation