Low-power MCUs with segment LCD Kinetis(R) K30 Family The Kinetis Based on the ARM(R) Cortex(R)-M4 core, the K30 MCU family offers high-precision analog integration, flexible low-power and peripheral options. TARGET APPLICATIONS -- IAR Embedded Workbench(R) }} Thermostats -- ARM(R) Keil(R) MDK }} Smart meters -- Kinetis Design Studio IDE }} Heart rate monitors }} Runtime software and RTOS }} Blood gas analyzers -- Math, DSP and encryption libraries Families are built from innovative 90 nm thin-film storage (TFS) flash technology with unique FlexMemory (EEPROM) capability, and offer industry-leading low power and mixed signal analog integration. -- Motor control libraries The K30 MCU family is pin, peripheral and software compatible with the K10 MCU family and adds a flexible low-power segment LCD controller with support for up to 320 segments. Devices start from 64 KB of flash in 64 LQFN packages extending up to 512 KB in a 144 MAPBGA package with a rich suite of analog, communication, timing and control peripherals. ONE-STOP ENABLEMENT OFFERING--MCU + IDE + RTOS }} Tower(R) System development board platform }} Integrated development environments -- Eclipse-based CodeWarrior(R) V10.x IDE and Processor Expert(R) -- Complimentary bootloaders (USB, Ethernet, RF, serial) -- Complimentary embedded GUI -- MQXTM RTOS -- Micrium(R) C/OS-III -- Express Logic ThreadX -- SEGGER embOS -- FreeRTOS }} Full ARM(R) ecosystem Features Benefits * ARM(R) Cortex(R)-M4 core with DSP instruction support * Up to 100 MHz core supporting a broad range of processing bandwidth needs * Up to 16-channel DMA; crossbar switch * Concurrent multi-master bus accesses for increased bus bandwidth * Peripheral and memory servicing with reduced CPU loading * Flexible, low-power LCD controller with support for up to 320 segments (40 x 8 or 44 x 4) * LCD blink mode enables low average power while remaining in low-power mode * Segment-fail detect guards against erroneous readouts and reduces LCD test costs * Frontplane/backplane reassignment provides pin-out flexibility, easing PCB design and allows LCD configuration changes via firmware with no hardware re-work * Supports multiple 3 V and 5 V LCD panel sizes with fewer segments (pins) than competitive controllers and no external components * Unused LCD pins can be configured as other GPIO functions * Low-power capacitive touch-sensing interface * Provides a modern upgrade from mechanical to touch keypad, rotary and slider user interfaces and operates in all low-power modes with minimal current added; supports up to 16 inputs * 10 ultra-low-power modes with flash programming and analog operation down to 1.71 V * Peripheral activity and wake-up times can be optimized to suit application requirements, enabling extended battery life (Stop currents of <500 nA, run currents of <200 A/MHz, 4 s wake-up from Stop) * Continual device operation in reduced power states with flexible wake-up options * Low-power timer, low-power RTC, low-leakage wake-up unit * Memory protection unit * Provides memory protection for all cross bar switch masters, increasing software reliability * Hardware cyclic redundancy check engine * Validates memory contents and communication data, increasing system reliability * Prevents code runaway in fail-safe applications; drives output pin to safe state external components if watchdog event occurs * Independent-clocked COP; external watchdog monitor * 64-512 KB flash; up to to 128 KB of SRAM * High reliability, fast access program memory with four levels of security protection. Independent flash banks allow concurrent code execution and firmware updating * 32-256 KB FlexMemory * FlexMemory provides 32 bytes-4 KB of user-segmentable byte write/erase EEPROM * FlexNVM 32-256 KB for extra program code, data or EEPROM backup KINETIS K30 FAMILY BLOCK DIAGRAM KINETIS K30 FAMILY Core System ARM Cortex -M4 core 72/100 MHz Internal and External Watchdogs (R) Debug Interfaces (R) DSP Interrupt Controller Memory Protection Unit (MPU) DMA Memories Clocks Program Flash (64 to 512 KB) SRAM (16 to 128 KB) Phase-Locked Loop FlexMemory (32 to 256 KB) (2 to 4 KB EE) External Bus Interface (FlexBus) FrequencyLocked Loop Serial Programming Interface (EZPort) Internal Reference Clocks Low-Leakage Wake-Up Unit Security and Integrity Cyclic Redundancy Check (CRC) Analog Timers 16-bit ADC FlexTimer PGA Analog Comparator 6-bit DAC 12-bit DAC Voltage Reference Optional Low-/HighFrequency Oscillators Communication Interfaces HMI I 2C I2S GPIO Carrier Modulator Transmitter UART (ISO 7816) Secure Digital Host Controller (SDHC) Low-Power Touch-Sensing Interface Programmable Delay Block SPI Periodic Interrupt Timers CAN Low-Power Timer Independent Real-Time Clock (RTC) Segment LCD Controller KINETIS K30 FAMILY OPTIONS MK30DX64Vyy7 72 64 32 16 MK30DX128Vyy7 72 128 32 MK30DX256Vyy7 72 256 MK30DX128yy10 100 MK30DX256yy10 100 MD 144 BGA (13 x 13) 5 V Tolerant I/O LQ 144 LQFP (20 x 20) Prog. Gain Amplifier * MC 121 BGA (8 x 8) 12-bit DAC 512 LL 100 LQFP (14 x 14) External Bus Interface 100 LK 80 LQFP (12 x 12) Secure Digital Host Controller MK30DN512Vyy10 LH 64 LQFP (10 x 10) CAN 128 Part Number Flash (KB) Memory Protection Unit Packages SRAM (KB) Feature Options CPU (MHz) Flex NVM (KB) Memory Segment LCD (up to 40 x 8/44 x 4) Segment LCD (up to 40 x 8/44 x 4) Other Segment LCD (up to 40 x 8/44 x 4) Segment LCD (up to 24 x 8/28 x 4) 32 Segment LCD (up to 38 x 8/42 x 4) 32 64 Segment LCD (up to 38 x 8/42 x 4) 128 128 32 256 256 64 yy = Package designator *144pin only www.nxp.com/Kinetis NXP, the NXP logo, CodeWarrior, the Energy Efficient Solutions logo, Kinetis, Processor Expert and Tower are trademarks of NXP B.V. All other product or service names are the property of their respective owners. ARM and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved. (c) 2015-2016 NXP B.V. Document Number: KNTSK30FMLYFS REV 9