MCP6471/2/4 2 MHz, Low-Input Bias Current Op Amps Features Description * Low-Input Bias Current - 150 pA (typical, TA = +125C) * Low Quiescent Current - 100 A/amplifier (typical) * Low-Input Offset Voltage - 1.5 mV (maximum) * Supply Voltage Range: 2.0V to 5.5V * Rail-to-Rail Input/Output * Gain Bandwidth Product: 2 MHz (typical) * Slew Rate: 1.1 V/s (typical) * Unity Gain Stable * No Phase Reversal * Small Packages - Singles in SC70-5, SOT-23-5 * Extended Temperature Range - -40C to +125C The Microchip MCP6471/2/4 family of operational amplifiers (op amps) has low-input bias current (150 pA, typical at 125C) and rail-to-rail input and output operation. This family is unity gain stable and has a gain bandwidth product of 2 MHz (typical). These devices operate with a single-supply voltage as low as 2.0V, while only drawing 100 A/amplifier (typical) of quiescent current. These features make the family of op amps well suited for photodiode amplifier, pH electrode amplifier, low leakage amplifier, and batterypowered signal conditioning applications, etc. The MCP6471/2/4 family is offered in single (MCP6471), dual (MCP6472), quad (MCP6474) packages. All devices are designed using an advanced CMOS process and fully specified in extended temperature range from -40C to +125C. Related Parts * MCP6481/2/4: 4 MHz, Low-Input Bias Current Op Amps * MCP6491/2/4: 7.5 MHz, Low-Input Bias Current Op Amps Applications * * * * * * Photodiode Amplifier pH Electrode Amplifier Low Leakage Amplifier Piezoelectric Transducer Amplifier Active Analog Filter Battery-Powered Signal Conditioning Design Aids * * * * * SPICE Macro Models FilterLab(R) Software MAPS (Microchip Advanced Part Selector) Analog Demonstration and Evaluation Boards Application Notes Package Types MCP6471 SC70, SOT-23 VOUT 1 VSS 2 VIN+ 3 5 VDD 4 VIN- MCP6472 SOIC, MSOP VOUTA 1 VINA- 2 VINA+ 3 VSS 4 8 VDD VOUTA 1 7 VOUTB VINA- 2 6 VINB- VINA+ 3 VSS 4 5 VINB+ * Includes Exposed Thermal Pad (EP); see Table 3-1. 2012-2013 Microchip Technology Inc. MCP6472 2x3 TDFN* MCP6474 SOIC, TSSOP VOUTA 1 7 VOUTB VINA- 2 VINA+ 3 6 VINB- 8 VDD EP 9 5 VINB+ VDD 4 VINB+ 5 VINB- 6 VOUTB 7 14 VOUTD 13 VIND- 12 VIND+ 11 VSS 10 VINC+ 9 VINC- 8 VOUTC DS20002324C-page 1 MCP6471/2/4 Typical Application C2 R2 VOUT ID1 VDD - D1 Light MCP647X + Photodiode Amplifier DS20002324C-page 2 2012-2013 Microchip Technology Inc. MCP6471/2/4 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings VDD - VSS ................................................................................................................................... ......................................................6.5V Current at Input Pins ................................................................................................................ ......................................................2 mA Analog Inputs (VIN+, VIN-) (Note 1) .................................................................................................................VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs ...........................................................................................................................VSS - 0.3V to VDD + 0.3V Difference Input Voltage...........................................................................................................................................................VDD - VSS Output Short-Circuit Current ................................................................................................................ ...................................continuous Current at Output and Supply Pins ............................................................................................................... ..............................50 mA Storage Temperature ................................................................................................................ .....................................-65C to +150C Maximum Junction Temperature (TJ) ................................................................................................................ ...........................+150C ESD protection on all pins (HBM) 4 kV Note 1: See Section 4.1.2, Input Voltage Limits. Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1.2 Specifications TABLE 1-1: DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +2.0V to +5.5V, VSS = GND, TA = +25C, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 10 kto VL. (Refer to Figure 1-1). Parameters Sym. Min. Typ. Max. Units Conditions Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio VOS -1.5 -- +1.5 VOS/TA -- 2.5 -- PSRR 75 91 -- dB IB -- 1 -- pA -- 8 -- pA TA = +85C TA = +125C mV VDD = 3.0V, VCM = VDD/4 V/C TA = -40C to +125C VCM = VDD/4 Input Bias Current and Impedance Input Bias Current -- 150 350 pA Input Offset Current IOS -- 0.1 -- pA Common Mode Input Impedance ZCM -- 1013||6 -- ||pF Differential Input Impedance ZDIFF -- 1013||6 -- ||pF Common Mode Input Voltage Range VCMR VSS - 0.3 -- VDD + 0.3 V Common Mode Rejection Ratio CMRR 65 83 -- dB VCM = -0.3V to 2.3V, VDD = 2.0V 70 88 -- dB VCM = -0.3V to 5.8V, VDD = 5.5V 95 115 -- dB 0.2V < VOUT < (VDD - 0.2V) VDD = 5.5V, VCM = VSS Common Mode Open-Loop Gain DC Open-Loop Gain (Large Signal) 2012-2013 Microchip Technology Inc. AOL DS20002324C-page 3 MCP6471/2/4 TABLE 1-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = +2.0V to +5.5V, VSS = GND, TA = +25C, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 10 kto VL. (Refer to Figure 1-1). Parameters Sym. Min. Typ. Max. Units Conditions VOH 1.980 1.996 -- V VDD = 2.0V 0.5V input overdrive 5.480 5.493 -- V VDD = 5.5V 0.5V input overdrive -- 0.004 0.020 V VDD = 2.0V 0.5 V input overdrive -- 0.007 0.020 V VDD = 5.5V 0.5 V input overdrive -- 10 -- mA VDD = 2.0V -- 32 -- mA VDD = 5.5V VDD 2.0 -- 5.5 V IQ 50 100 200 A Output High-Level Output Voltage Low-Level Output Voltage Output Short-Circuit Current VOL ISC Power Supply Supply Voltage Quiescent Current per Amplifier TABLE 1-2: IO = 0, VCM = VDD/4 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. (Refer to Figure 1-1). Parameters Sym. Min. Typ. Max. Units Conditions GBWP -- 2 -- MHz Phase Margin PM -- 65 -- Slew Rate SR -- 1.1 -- V/s Input Noise Voltage Eni -- 7 -- Vp-p f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni -- 27 -- nV/Hz f = 1 kHz -- 23 -- nV/Hz f = 10 kHz -- 0.6 -- fA/Hz f = 1 kHz AC Response Gain Bandwidth Product G = +1V/V Noise Input Noise Current Density TABLE 1-3: ini TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +2.0V to +5.5V and VSS = GND. Parameters Sym. Min. Typ. Max. Units Operating Temperature Range TA -40 -- +125 C Storage Temperature Range TA -65 -- +150 C Conditions Temperature Ranges Note 1 Thermal Package Resistances Thermal Resistance, 5L-SC-70 JA -- 331 -- C/W Thermal Resistance, 5L-SOT-23 JA -- 220.7 -- C/W Thermal Resistance, 8L-2x3 TDFN JA -- 52.5 -- C/W Thermal Resistance, 8L-MSOP JA -- 211 -- C/W Thermal Resistance, 8L-SOIC JA -- 149.5 -- C/W Thermal Resistance, 14L-SOIC JA -- 95.3 -- C/W Thermal Resistance, 14L-TSSOP JA -- 100 -- C/W Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150C. DS20002324C-page 4 2012-2013 Microchip Technology Inc. MCP6471/2/4 1.3 Test Circuits The circuit used for most DC and AC tests is shown in Figure 1-1. This circuit can independently set VCM and VOUT (refer to Equation 1-1). Note that VCM is not the circuit's common mode voltage ((VP + VM)/2), and that VOST includes VOS plus the effects (on the input offset error, VOST) of temperature, CMRR, PSRR and AOL. CF 6.8 pF RG 100 k RF 100 k VP VDD VIN+ EQUATION 1-1: G DM = RF R G CB1 100 nF MCP647X VCM = VP + V DD 2 2 V OUT = VDD 2 + VP - V M + V OST 1 + G DM Where: GDM = Differential Mode Gain (V/V) VCM = Op Amp's Common Mode Input Voltage (V) 2012-2013 Microchip Technology Inc. CB2 1 F VIN- VOST = V IN+ - VIN- VOST = Op Amp's Total Input Offset Voltage VDD/2 (mV) VM RG 100 k RL 10 k RF 100 k CF 6.8 pF VOUT CL 20 pF VL FIGURE 1-1: AC and DC Test Circuit for Most Specifications. DS20002324C-page 5 MCP6471/2/4 NOTES: DS20002324C-page 6 2012-2013 Microchip Technology Inc. MCP6471/2/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 6.0 5.5 5.0 4.5 4.0 Common Mode Input Voltage (V) Input Offset Voltage (V) FIGURE 2-1: 3.5 -0.5 1200 1000 800 600 400 200 0 -200 -400 -600 -800 -1000 0% +125C +85C +25C -40C VDD = 5.5V 5 5V Representative Part 3.0 3% 2.5 6% 2.0 9% 1.5 12% 1.0 15% 1000 800 600 400 200 0 -200 -400 -600 600 -800 -1000 0.5 270 Samples VDD = 3.0V VCM = VDD/4 18% 0.0 ut Offset Voltage (V) Inpu 21% -1200 Perc centage of Occurrences Note: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. Input Offset Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. Input Offset Voltage Drift. 5.5 5.0 4.5 4.0 3.5 Output Voltage (V) Input Offset Voltage Drift (V/C) FIGURE 2-2: 3.0 0.0 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 0% 2.5 3% VDD = 2.0V 2.0 6% VDD = 5.5V 1.5 9% Representative Part 1.0 12% 1000 800 600 400 200 0 -200 -400 600 -600 -800 -1000 0.5 270 Samples VDD = 3.0V VCM = VDD/4 TA = -40C to +125C 15% Input Offset Voltage (V) age of Occurrences Percenta 18% FIGURE 2-5: Output Voltage. Input Offset Voltage vs. Common Mode Input Voltage (V) FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. 2012-2013 Microchip Technology Inc. 6.5 6.0 5.5 5.0 4.5 Representative Part 4.0 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 -1000 +125C +85C +25C -40C 3.5 -800 +125C +85C +25C -40C 3.0 -600 VDD = 2.0V Representative Part 2.5 -400 400 2.0 0 -200 1.5 200 1.0 400 0.0 600 1000 800 600 400 200 0 -200 -400 600 -600 -800 -1000 0.5 800 Input Offset Voltage (V) ut Offset Voltage (V) Inpu 1000 Power Supply Voltage (V) FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. DS20002324C-page 7 MCP6471/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. 105 100 CMRR, PSRR (dB) C 100 PSRR 95 90 85 80 CMRR @ VDD = 5.5V @ VDD = 2.0V 2 0V 75 70 65 Input Bias Current 10 10p 1p1 01 0 10.1 0.1p Input Offset Current 125 Ambient Temperature (C) Common Mode Input Voltage (V) FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. 100 250 PSRR- 50 40 30 100 50 TA = +85C 0 TA = +25C FIGURE 2-9: Frequency. DS20002324C-page 8 1.00E+05 100k CMRR, PSRR vs. 1.00E+06 1M 3.5 1.00E+03 1.00E+04 1k 10k Frequency (Hz) 3.0 100 2.5 1.00E+02 2.0 10 1.0 1.00E+01 0.5 20 0.0 -50 5.5 60 TA = +125C 150 5.0 CMRR 70 VDD = 5.5 V 200 4.5 80 4.0 Representative Part ut Bias Current (pA) Inpu PSRR+ 90 CM MRR, PSRR (dB) 115 0.01 0.01p 105 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 0 VDD = 5.5 V 100 100p 95 f = 10 kHz VDD = 5 5.5 5V 5 1n 85 10 125 1000 75 15 100 CMRR, PSRR vs. Ambient 65 20 FIGURE 2-10: Temperature. 25 50 75 Temperature (C) 45 25 0 1.5 Input Voltage Noise Density (nV/Hz) 30 -25 35 Input Noise Voltage Density as and Offset Currents Input Bia (A) FIGURE 2-7: vs. Frequency. -50 55 10 0.1 1.E+0 1 1.E+1 10 1.E+2 100 1.E+3 1k 1.E+4 10k 1.E+5 100k 1.E+6 1M 1.E-1 Frequency (Hz) 25 Input N Noise Voltage Density (nV/Hz) 1,000 Common Mode Input Voltage (V) FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. 140 140 Q Quiescent Current (A/Amplifier) VDD = 5.5V 125 110 95 VDD = 2.0V 80 VCM = VDD/4 65 120 100 80 60 20 6.5 Power Supply Voltage (V) FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. 145 120 Ope en-Loop Gain (dB) 130 115 100 85 70 VDD = 2.0V 40 0 Open-Loop Gain 100 80 -60 Open-Loop Phase 60 -120 20 -150 150 0 -180 -20 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 -90 40 1.0E+00 1 1.0E+01 10 Common Mode Input Voltage (V) FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. -30 Ope en-Loop Phase () FIGURE 2-13: Quiescent Current vs. Ambient Temperature. 55 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 125 1.5 0 25 50 75 100 Ambient Temperature (C) 1.0 -25 0.0 -50 -210 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 100 1k 10k 100k 1M 10M Frequency (Hz) 1.0E+02 FIGURE 2-17: Frequency. Open-Loop Gain, Phase vs. 150 DC Open-Loop Gain (dB) 145 Quiescent Current (A/Amplifier) VCM = VDD/4 0 50 uiescent Current Qu (A/Amplifier) +125C +85C +25C -40C 40 0.5 Q Quiescent Current (A/Amplifier) 155 130 115 100 85 70 VDD = 5.5V 55 Common Mode Input Voltage (V) FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. 2012-2013 Microchip Technology Inc. 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 40 VDD = 5.5V 140 130 120 VDD = 2.0V 110 100 90 -50 -25 0 25 50 75 Temperature (C) 100 125 FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. DS20002324C-page 9 MCP6471/2/4 70 3.0 60 Phase Margin 2.5 50 2.0 40 1.5 30 Gain Bandwidth Product 1.0 20 10 VDD = 2.0V 0.0 0 -50 -25 60 Phase Margin 2.5 50 2.0 40 1.5 30 Gain Bandwidth Product 1.0 20 0.5 Phase Margin () P Gain n Bandwidth Product (MHz) 70 3.0 10 VDD = 5.5V 0.0 0 -50 -25 100 1000 Power Supply Voltage (V) FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. 10000 1k 100000 10k 100k Frequency (Hz) 1000000 1M 10000000 10M Output Voltage Swing vs. 1000 VDD = 2.0V VDD - VOH 100 10 VOL - VSS 1 0.1 0.01 0.1 1 Output Current (mA) 10 FIGURE 2-23: Output Voltage Headroom vs. Output Current. Output Vo oltage Headroom (mV) 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 +125C +85C +25C -40C 0.0 Short Circuit Current Output S (mA) -40C +25C +85C +125C DS20002324C-page 10 1 FIGURE 2-22: Frequency. 0 25 50 75 100 125 Ambient Temperature (C) FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. 60 50 40 30 20 10 0 -10 -20 -30 30 -40 -50 -60 VDD = 2.0V 100 FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. 3.5 VDD = 5.5V 0.1 0 25 50 75 100 125 Ambient Temperature (C) Output Vo oltage Headroom (mV) 0.5 10 Outputt Voltage Swing (VP-P) 3.5 Phase Margin () P Gain n Bandwidth Product (MHz) Note: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. 1000 VDD = 5.5V 100 10 VDD - VOH VOL - VSS 1 0.1 0.01 0.1 1 10 Output Current (mA) 100 FIGURE 2-24: Output Voltage Headroom vs. Output Current. 2012-2013 Microchip Technology Inc. MCP6471/2/4 7 Output Voltage (10 mV/div) Output Voltage Headroom (mV) Note: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. 6 VDD - VOH 5 4 3 VOL - VSS 2 VDD = 2.0V 1 0 -50 -25 0 25 50 75 Temperature (C) 100 125 Time (2 s/div) VDD - VOH VOL - VSS VDD = 5.5V 5 5V -50 -25 0 25 50 75 Temperature (C) FIGURE 2-28: Pulse Response. Output Voltage (10 mV/div) Output Voltage Headroom (mV) FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. 10 9 8 7 6 5 4 3 2 1 0 100 Small Signal Non-Inverting VDD = 5 V G = -1 V/V 125 Time (2 s/div) FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Response. Small Signal Inverting Pulse 5.0 1.8 Falling Edge, VDD = 5.5V Rising Edge, VDD = 5.5V 1.6 4.5 1.4 Ou utput Voltage (V) Slew Rate (V/s) VDD = 5 V G = +1 V/V 1.2 1.0 0.8 0.6 Falling F lli Edge, Ed VDD = 2.0V 2 0V Rising Edge, VDD = 2.0V 0.4 0.2 4.0 3.5 3.0 2.5 2.0 15 1.5 1.0 VDD = 5 V G = +1 V/V 0.5 0.0 -50 -25 FIGURE 2-27: Temperature. 0 25 50 75 100 Ambient Temperature (C) Slew Rate vs. Ambient 2012-2013 Microchip Technology Inc. 125 0.0 Time (5 s/div) FIGURE 2-30: Pulse Response. Large Signal Non-Inverting DS20002324C-page 11 MCP6471/2/4 1m 5.0 1.0E+09 4.5 1.0E+08 100 VDD = 5 V G = -1 V/V 4.0 10 1.0E+07 3.5 1 1.0E+06 3.0 -IIN (pA) 2.5 2.0 1.0E+05 100n 1n 1 0E+03 1.0E+03 15 1.5 100p 1.0E+02 1.0 10p -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 VIN (V) 0.5 1.0E+01 0.0 Time (5 s/div) FIGURE 2-31: Response. Large Signal Inverting Pulse FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). 100 5 Channel to Channel Separation (dB) S 6 VOUT 4 VIN 3 2 VDD = 5 V G = +2 V/V 1 0 90 80 70 60 50 Input Referred 40 FIGURE 2-32: The MCP6471/2/4 Shows No Phase Reversal. 1k 10k Frequency (Hz) 100k 1.0E+06 100 1.0E+05 20 Time (1 ms/div) 1.0E+04 30 -1 1.0E+03 Input, O Output Voltages (V) +125C +85C +25C -40C -40 C 10n 1.0E+04 1.0E+02 Ou utput Voltage (V) Note: Unless otherwise indicated, TA = +25C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF. 1M FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6472/4 only). Clo osed Loop Output Impedance (:) 1000 100 10 GN: 101 V/V 11 V/V 1 V/V 1 1.0E+01 10 1.0E+02 100 1.0E+03 1.0E+04 1.0E+05 1k 10k 100k Frequency (Hz) 1.0E+06 1M 1.0E+07 10M FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. DS20002324C-page 12 2012-2013 Microchip Technology Inc. MCP6471/2/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MCP6471 MCP6472 MCP6474 Symbol Description 1 VOUT, VOUTA Analog Output (op amp A) 2 VIN-, VINA- Inverting Input (op amp A) Non-inverting Input (op amp A) SC70, SOT-23 SOIC, MSOP 2x3 TDFN SOIC, TSSOP 1 1 1 4 2 2 3.1 3 3 3 3 VIN+, VINA+ 5 8 8 4 VDD Positive Power Supply -- 5 5 5 VINB+ Non-inverting Input (op amp B) -- 6 6 6 VINB- Inverting Input (op amp B) -- 7 7 7 VOUTB Analog Output (op amp B) -- -- -- 8 VOUTC Analog Output (op amp C) -- -- -- 9 VINC- Inverting Input (op amp C) -- -- -- 10 VINC+ Non-Inverting Input (op amp C) 2 4 4 11 VSS Negative Power Supply -- -- -- 12 VIND+ Non-Inverting Input (op amp D) -- -- -- 13 VIND- Inverting Input (op amp D) -- -- -- 14 VOUTD Analog Output (op amp D) -- -- 9 -- EP Exposed Thermal Pad (EP); must be connected to VSS. Analog Outputs The output pins are low-impedance voltage sources. 3.2 Analog Inputs The non-inverting and inverting inputs are high-impedance CMOS inputs with low bias currents. 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) There is an internal electrical connection between the Exposed Thermal Pad (EP) and the VSS pin; they must be connected to the same potential on the Printed Circuit Board (PCB). This pad can be connected to a PCB ground plane to provide a larger heat sink. This improves the package thermal resistance (JA). The positive power supply (VDD) is 2.0V to 5.5V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in single-supply operation. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors. 2012-2013 Microchip Technology Inc. DS20002324C-page 13 MCP6471/2/4 NOTES: DS20002324C-page 14 2012-2013 Microchip Technology Inc. MCP6471/2/4 4.0 APPLICATION INFORMATION The MCP6471/2/4 family of op amps is manufactured using Microchip's state-of-the-art CMOS process and is specifically designed for low-power, high-precision applications. 4.1 VDD D1 D2 V1 VOUT Inputs 4.1.1 MCP647X V2 PHASE REVERSAL The MCP6471/2/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 2-32 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 INPUT VOLTAGE LIMITS In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see Section 1.1 "Absolute Maximum Ratings "). The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors against many (but not all) overvoltage conditions, and to minimize the input bias current (IB). FIGURE 4-2: Inputs. Protecting the Analog A significant amount of current can flow out of the inputs when the Common mode voltage (VCM) is below ground (VSS), as shown in Figure 2-34. 4.1.3 INPUT CURRENT LIMITS In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the currents into the input pins (see Section 1.1 "Absolute Maximum Ratings "). Figure 4-3 shows one approach to protect these inputs. The R1 and R2 resistors limit the possible currents in or out of the input pins (and the ESD diodes, D1 and D2). The diode currents will go through either VDD or VSS. VDD VDD Bond Pad D1 D2 V1 VIN+ Bond Pad Input Stage Bond VIN- Pad R1 MCP647X VOUT V2 R2 VSS Bond Pad FIGURE 4-1: Structures. R3 Simplified Analog Input ESD The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go well above VDD. Their breakdown voltage is high enough to allow normal operation, but not low enough to protect against slow overvoltage (beyond VDD) events. Very fast ESD events (that meet the specification) are limited so that damage does not occur. min (R1,R2) > min (R1,R2) > FIGURE 4-3: Inputs. VSS - min(V1,V2) 2 mA max(V1,V2) - VDD 2 mA Protecting the Analog In some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs; Figure 4-2 shows one approach to protect these inputs. 2012-2013 Microchip Technology Inc. DS20002324C-page 15 MCP6471/2/4 4.1.4 NORMAL OPERATION The inputs of the MCP6471/2/4 op amps use two differential input stages in parallel. One operates at a low Common mode input voltage (VCM), while the other operates at a high VCM. With this topology, the device operates with a VCM up to 0.3V above VDD and 0.3V below VSS (refer to Figures 2-3 and 2-4). The input offset voltage is measured at VCM = VSS - 0.3V and VDD + 0.3V to ensure proper operation. The transition between the input stages occurs when VCM is near VDD - 1.1V (refer to Figures 2-3 and 2-4). For the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. Figure 4-5 gives the recommended RISO values for different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN), where GN is the circuit's noise gain. For non-inverting gains, GN and the Signal Gain are equal. For inverting gains, GN is 1 + |Signal Gain| (e.g., -1V/V gives GN = +2V/V). After selecting RISO for your circuit, double check the resulting frequency response peaking and step response overshoot. Modify RISO's value until the response is reasonable. Bench evaluation and simulations with the MCP6471/2/4 SPICE macro model are helpful. 4.2 Rail-to-Rail Output The output voltage range of the MCP6471/2/4 op amps is 0.007V (typical) and 5.493V (typical) when RL = 10 k is connected to VDD/2 and VDD = 5.5V. Refer to Figures 2-23 and 2-24 for more information. 4.3 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity-gain buffer (G = +1V/V) is the most sensitive to capacitive loads, all gains show the same general behavior. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = + 1V/V), a small series resistor at the output (RISO in Figure 4-4) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will generally be lower than the bandwidth with no capacitance load. - VIN MCP647X + Reco ommended R ISO (:) 1000 VDD = 5.5 V RL = 10 k 100 GN: 1 V/V 2 V/V t 5 V/V 10 1 10p 1.E-11 100p 1n 10n 0.1 1.E-06 1 1.E-10 1.E-09 1.E-08 1.E-07 Normalized Load Capacitance; CL/GN (F) FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass With this family of operational amplifiers, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good high-frequency performance. It can use a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. RISO VOUT CL FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. DS20002324C-page 16 2012-2013 Microchip Technology Inc. MCP6471/2/4 4.5 Unused Op Amps 4.6 An unused op amp in a quad package (MCP6474) should be configured as shown in Figure 4-6. These circuits prevent the output from toggling and causing crosstalk. Circuit A sets the op amp at its minimum noise gain. The resistor divider produces any desired reference voltage within the output voltage range of the op amp, and the op amp buffers that reference voltage. Circuit B uses the minimum number of components and operates as a comparator, but it may draw more current. 1/4 MCP6474 (A) 1/4 MCP6474 (B) VDD R1 VDD PCB Surface Leakage In applications where low-input bias current is critical, PCB surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low-humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow, which is greater than the MCP6471/2/4 family's bias current at +25C (1 pA, typical). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-7. VDD R2 Guard Ring VIN- VIN+ VSS VREF R2 V REF = V DD -------------------R1 + R2 FIGURE 4-6: Unused Op Amps. FIGURE 4-7: for Inverting Gain. 1. 2. 2012-2013 Microchip Technology Inc. Example Guard Ring Layout Non-Inverting Gain and Unity-Gain Buffer: a.Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b.Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the Common mode input voltage. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a.Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b.Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. DS20002324C-page 17 MCP6471/2/4 4.7 4.7.1 4.7.2 Application Circuits PHOTO DETECTION The MCP6471/2/4 op amps can be used to easily convert the signal from a sensor that produces an output current (such as a photo diode) into a voltage (a transimpedance amplifier). This is implemented with a single resistor (R2) in the feedback loop of the amplifiers shown in Figure 4-8 and Figure 4-9. The optional capacitor (C2) sometimes provides stability for these circuits. A photodiode configured in the Photovoltaic mode has zero voltage potential placed across it (Figure 4-8). In this mode, the light sensitivity and linearity is maximized, making it best suited for precision applications. The key amplifier specifications for this application are: low-input bias current, Common mode input voltage range (including ground), and rail-to-rail output. ACTIVE LOW PASS FILTER The MCP6471/2/4 op amps' low-input bias current makes it possible for the designer to use larger resistors and smaller capacitors for active low-pass filter applications. However, as the resistance increases, the noise generated also increases. Parasitic capacitances and the large value resistors could also modify the frequency response. These trade-offs need to be considered when selecting circuit elements. Usually, the op amp bandwidth is 100x the filter cutoff frequency (or higher) for good performance. It is possible to have the op amp bandwidth 10x higher than the cutoff frequency, thus having a design that is more sensitive to component tolerances. Figure 4-10 and Figure 4-11 show low-pass, secondorder, Butterworth filters with a cutoff frequency of 10 Hz. The filter in Figure 4-10 has a non-inverting gain of +1 V/V, and the filter in Figure 4-11 has an inverting gain of -1 V/V. C2 C1 47 nF R2 ID1 VDD D1 Light VOUT R2 R1 768 k 1.27 M - MCP647X VIN + C2 22 nF + VOUT = ID1*R2 FIGURE 4-8: VOUT - Photovoltaic Mode Detector. In contrast, a photodiode that is configured in the Photoconductive mode has a reverse bias voltage across the photo-sensing element (Figure 4-9). This decreases the diode capacitance, which facilitates high-speed operation (e.g., high-speed digital communications). However, the reverse bias voltage also increased diode leakage current and caused linearity errors. fP = 10 Hz, G = +1 V/V FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. R2 618 k VIN R2 ID1 D1 VBIAS - VDD VOUT DS20002324C-page 18 - VDD/2 VOUT = ID1*R2 VBIAS < 0V FIGURE 4-9: Detector. VOUT C2 47 nF MCP647X MCP647X + C1 8.2 nF R3 R1 618 k 1.00 M C2 Light MCP647X Photoconductive Mode + fP = 10 Hz, G = -1 V/V FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. 2012-2013 Microchip Technology Inc. MCP6471/2/4 4.7.3 PH ELECTRODE AMPLIFIER The MCP6471/2/4 op amps can be used for sensing applications where the sensor has high output impedance, such as a pH electrode sensor; its output impedance is in the range of 1 M to 1G. The key op amp specifications for these kinds of applications are low-input bias current and high-input impedance. A typical sensing circuit is shown in Figure 4-12, it is implemented with a non-inverting amplifier which has a gain of 1+R2/R1. The input voltage error due to input bias current is equal to IB*ROUT, which is amplified by 1+R2/R1 at the output. To minimize the voltage error and get the VOUT with better accuracy, the IB must be small enough. R2 R1 - VIN MCP647X VOUT + ROUT pH electrode VSEN + - VSEN is the sensed voltage by pH electrode ROUT is the pH electrode's output impedance FIGURE 4-12: pH Electrode Amplifier. 2012-2013 Microchip Technology Inc. DS20002324C-page 19 MCP6471/2/4 NOTES: DS20002324C-page 20 2012-2013 Microchip Technology Inc. MCP6471/2/4 5.0 DESIGN AIDS Microchip Technology Inc. provides the basic design tools needed for the MCP6471/2/4 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6471/2/4 op amps is available on the Microchip web site at www.microchip.com. The model was written and tested in PSpice, owned by Orcad (Cadence(R)). For other simulators, translation may be required. The model covers a wide aspect of the op amp's electrical specifications. Not only does the model cover voltage, current and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. The model has not been verified outside the specification range listed in the op amp data sheet. The model behaviors under these conditions cannot be guaranteed to match the actual op amp performance. Moreover, the model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 FilterLab Software Microchip's FilterLab software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. 5.3 MAPS (Microchip Advanced Part Selector) MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost, MAPS is an overall selection tool for Microchip's product portfolio that includes analog, memory, MCUs and DSCs. Using this tool, you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. Helpful links are also provided for data sheets, purchases and sampling of Microchip parts. The web site is available at www.microchip.com/maps. 2012-2013 Microchip Technology Inc. 5.4 Analog Demonstration and Evaluation Boards Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit the Microchip web site: www.microchip.com/analogtools. Some boards that are especially useful include: * * * * * * MCP6XXX Amplifier Evaluation Board 1 MCP6XXX Amplifier Evaluation Board 2 MCP6XXX Amplifier Evaluation Board 3 MCP6XXX Amplifier Evaluation Board 4 Active Filter Demo Board Kit 5/6-Pin SOT-23 Evaluation Board, part number VSUPEV2 * 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, part number SOIC8EV 5.5 Application Notes The following Microchip analog design note and application notes are available on the Microchip web site at www.microchip.com/appnotes, and are recommended as supplemental reference resources. * ADN003: "Select the Right Operational Amplifier for your Filtering Circuits", DS21821 * AN722: "Operational Amplifier Topologies and DC Specifications", DS00722 * AN723: "Operational Amplifier AC Specifications and Applications", DS00723 * AN884: "Driving Capacitive Loads With Op Amps", DS00884 * AN990: "Analog Sensor Conditioning Circuits - An Overview", DS00990 * AN1177: "Op Amp Precision Design: DC Errors", DS01177 * AN1228: "Op Amp Precision Design: Random Noise", DS01228 * AN1297: "Microchip's Op Amp SPICE Macro Models"' DS01297 * AN1332: "Current Sensing Circuit Concepts and Fundamentals"' DS01332 * AN1494: "Using MCP6491 Op Amps for Photodetection Applications" DS01494 These application notes and others are listed in: * "Signal Chain Design Guide", DS21825 DS20002324C-page 21 MCP6471/2/4 NOTES: DS20002324C-page 22 2012-2013 Microchip Technology Inc. MCP6471/2/4 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Example 5-Lead SOT-23 (MCP6471 only) Part Number MCP6471T-E/OT Code 3ENN 5-Lead SC-70 (MCP6471 only) Part Number MCP6471T-E/LTY 8-Lead MSOP (3x3 mm) (MCP6472 only) 3E25 Example Code DPNN DP25 Example 6472E 1320256 8-Lead SOIC (3.90 mm) (MCP6472 only) Example MCP6472 E/SN1320 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2012-2013 Microchip Technology Inc. DS20002324C-page 23 MCP6471/2/4 8-Lead TDFN (2x3x0.75 mm) (MCP6472 only) Example Part Number Code MCP6472T-E/MNY ABY 14-Lead SOIC (3.90 mm) (MCP6474 only) ABY 320 25 Example MCP6474 E/SL 1320256 14-Lead TSSOP (4.4 mm) (MCP6474 only) XXXXXXXX YYWW NNN DS20002324C-page 24 Example 6474E/ST 1320 256 2012-2013 Microchip Technology Inc. MCP6471/2/4 5-Lead Plastic Small Outine Transistor (LTY) [SC70] For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: D b 3 1 2 E1 E 4 5 e A e A2 c A1 L ) + -0 1 *++*%, *- -. - / ! 1 .' 3 4 5 1 6 %6 4 5 5 2! "# .' 7 4 1 6 7 ! ! 8! .' + 4 ! 9 2 + + + %6 4 5 2 + 7 0 ! 5 ! "#$ " % & ' ( ( Technology Drawing Microchip % & ( # C04-083B :2" 2012-2013 Microchip Technology Inc. DS20002324C-page 25 MCP6471/2/4 5-Lead Plastic Small Outine Transistor (LTY) [SC70] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 26 2012-2013 Microchip Technology Inc. MCP6471/2/4 9 6 ( < $==((( = 6 1 6 b N E E1 3 2 1 e e1 D A2 A c A1 L L1 ) + -0 1 + 1 . + 1 *++*%, *- -. - ! ;! "# / ; "# .' 3 ; 5 1 6 %6 4; 5 8 5 ! .' 7 5 8 1 6 7 8 5 4 .' + 5 8 ! 9 + + 5 2 9 + 8! 5 4 9 > 5 8> 4 5 2 + %6 + 7 0 5 ! ! "#$ " % & ' ( ( % & ( # :;" 2012-2013 Microchip Technology Inc. DS20002324C-page 27 MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 28 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 29 MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 30 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 31 MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 32 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 33 MCP6471/2/4 !" #$% & ' () 9 6 ( < $==((( = 6 DS20002324C-page 34 1 6 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 35 MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 36 2012-2013 Microchip Technology Inc. MCP6471/2/4 * + " , - . 9 6 ( < $==((( = 6 2012-2013 Microchip Technology Inc. //%#0 & ' *+ 1 6 DS20002324C-page 37 MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 38 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 39 MCP6471/2/4 9 6 ( < $==((( = 6 DS20002324C-page 40 1 6 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 41 MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002324C-page 42 2012-2013 Microchip Technology Inc. MCP6471/2/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2013 Microchip Technology Inc. DS20002324C-page 43 MCP6471/2/4 NOTES: DS20002324C-page 44 2012-2013 Microchip Technology Inc. MCP6471/2/4 APPENDIX A: REVISION HISTORY Revision C (June 2013) The following is the list of modifications: 1. 2. 3. 4. 5. 6. 7. 8. Added new devices to the family (MCP6472 and MCP6474) and related information throughout the document. Updated thermal package resistance information in Table 1-3. Added Figure 2-35 in Section 2.0, Typical Performance Curves. Updated Section 3.0, Pin Descriptions. Added new Section 4.5, Unused Op Amps. Updated the list of reference documents in Section 5.5, Application Notes. Added package markings and drawings for the MCP6472 and MCP6474 devices. Updated Product Identification System. Revision B (October 2012) The following is the list of modifications: 1. 2. Updated the maximum low input offset voltage value in the Features. Updated the minimum and maximum input offset voltage in TABLE 1-1: "DC Electrical Specifications". Revision A (September 2012) * Original Release of this Document. 2012-2013 Microchip Technology Inc. DS20002324C-page 45 MCP6471/2/4 NOTES: DS20002324C-page 46 2012-2013 Microchip Technology Inc. MCP6471/2/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX Device Temperature Range Package Device: MCP6471T: MCP6472: MCP6472T: MCP6474: MCP6474T: Temperature Range: E Package: LTY OT Single Op Amp (Tape and Reel) (SC70, SOT-23) Dual Op Amp (SOIC and MSOP only) Dual Op Amp (Tape and Reel) (SOIC, MSOP and 2x3 TDFN) Quad Op Amp Quad Op Amp (Tape and Reel) (SOIC and TSSOP) = -40C to +125C (Extended) = Plastic Package (SC70), 5-lead = Plastic Small Outline Transistor, (SOT-23), 5-lead MNY* = Plastic Dual Flat, No Lead, (2x3 TDFN), 8-lead (TDFN) SN = Lead Plastic Small Outline (150 mil body), 8-lead (SOIC) MS = Plastic MSOP, 8-lead SL = Plastic Small Outline, (150 mil body), 14-lead (SOIC) ST = Plastic Thin Shrink Small Outline (150 mil body), 14-lead (TSSOP) * Y = Nickel palladium gold manufacturing designator. Only available on the TDFN package. 2012-2013 Microchip Technology Inc. Examples: a) MCP6471T-E/LTY: b) MCP6471T-E/OT: c) MCP6472-E/MS: d) MCP6472T-E/MS: e) MCP6472-E/SN: f) MCP6472T-E/SN: g) MCP6472T-E/MNY: h) MCP6474-E/SL: i) MCP6474T-E/SL: j) MCP6474-E/ST: k) MCP6474T-E/ST: Tape and Reel, Extended Temp., 5LD SC70 package Tape and Reel, Extended Temp., 5LD SOT-23 package Extended Temp., 8LD MSOP package Tape and Reel, Extended Temp., 8LD MSOP package Extended Temp., 8LD SOIC package Tape and Reel, Extended Temp., 8LD SOIC package Tape and Reel, Extended Temp., 8LD 2x3 TDFN package Extended Temp., 14LD SOIC package Tape and Reel, Extended Temp., 14LD SOIC package Extended Temp., 14LD TSSOP package Tape and Reel, Extended Temp., 14LD TSSOP package DS20002324C-page 47 MCP6471/2/4 NOTES: DS20002324C-page 48 2012-2013 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. 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Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2012-2013, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-62077-245-4 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2012-2013 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. DS20002324C-page 49 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 China - Hangzhou Tel: 86-571-2819-3187 Fax: 86-571-2819-3189 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 Taiwan - Kaohsiung Tel: 886-7-213-7828 Fax: 886-7-330-9305 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 DS20002324C-page 50 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 11/29/12 2012-2013 Microchip Technology Inc.