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FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OE1
1B1
1B2
GND
1B3
1B4
VCC
1A
2B1
2B2
GND
2B3
2B4
2A
3A
3B1
3B2
GND
3B3
3B4
4A
VCC
4B1
4B2
GND
4B3
4B4
OE2
OE4
8B1
8B2
GND
8B3
8B4
VCC
8A
7B1
7B2
GND
7B3
7B4
7A
6A
6B1
6B2
GND
6B3
6B4
5A
VCC
5B1
5B2
GND
5B3
5B4
OE3
SN74ALVCH1623441-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
•Member of the Texas Instruments Widebus™Family
•Operates From 1.65 V to 3.6 V•Max t
pd
of 4.4 ns at 3.3 V• ± 12-mA Output Drive at 3.3 V•Output Ports Have Equivalent 26- ΩSeriesResistors, So No External Resistors AreRequired
•Bus Hold on Data Inputs Eliminates the Needfor External Pullup/Pulldown Resistors•Latch-Up Performance Exceeds 250 mA PerJESD 17
This 1-bit to 4-bit address driver is designed for1.65-V to 3.6-V V
CC
operation.
The SN74ALVCH162344 is used in applications inwhich four separate memory locations must beaddressed by a single address.
The outputs, which are designed to sink up to 12 mA,include equivalent 26- Ωresistors to reduce overshootand undershoot.
To ensure the high-impedance state during power upor power down, the output-enable ( OE) inputs shouldbe tied to V
CC
through a pullup resistor; the minimumvalue of the resistor is determined by thecurrent-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriveninputs at a valid logic state. Use of pullup or pulldownresistors with the bus-hold circuitry is notrecommended.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
Tube SN74ALVCH162344DLSSOP - DL ALVCH162344Tape and reel SN74ALVCH162344DLR-40 °C to 85 °C
TSSOP - DGG Tape and reel SN74ALVCH162344GR ALVCH162344TVSOP - DGV Tape and reel SN74ALVCH162344VR VH2344
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1996–2004, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
SN74ALVCH162344
1-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
A-TO-B FUNCTION TABLE
INPUTS
OUTPUT
BnOE A
L H HL L LH X Z
2
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56
29
28
1
21B1
31B2
51B3
61B4
8
OE4
OE3
OE2
OE1
1A
92B1
10 2B2
12 2B3
13 2B4
14
2A
16 3B1
17 3B2
19 3B3
20 3B4
15
3A
23 4B1
24 4B2
26 4B3
27 4B4
21
4A
34 5B1
33 5B2
31 5B3
30 5B4
36
5A
41 6B1
40 6B2
38 6B3
37 6B4
42
6A
48 7B1
47 7B2
45 7B3
44 7B4
43
7A
55 8B1
54 8B2
52 8B3
51 8B4
49
8A
SN74ALVCH1623441-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
LOGIC DIAGRAM (POSITIVE LOGIC)
3
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ABSOLUTE MAXIMUM RATINGS
(1)
RECOMMENDED OPERATING CONDITIONS
(1)
SN74ALVCH162344
1-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range -0.5 4.6 VV
I
Input voltage range
(2)
-0.5 4.6 VV
O
Output voltage range
(2) (3)
-0.5 V
CC
+ 0.5 VI
IK
Input clamp current V
I
< 0 -50 mAI
OK
Output clamp current V
O
< 0 -50 mAI
O
Continuous output current ±50 mAContinuous current through each V
CC
or GND ±100 mADGG package 64θ
JA
Package thermal impedance
(4)
DGV package 48 °C/WDL package 56T
stg
Storage temperature range -65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.(3) This value is limited to 4.6 V maximum.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
MIN MAX UNIT
V
CC
Supply voltage 1.65 3.6 VV
CC
= 1.65 V to 1.95 V 0.65 ×V
CC
V
IH
High-level input voltage V
CC
= 2.3 V to 2.7 V 1.7 VV
CC
= 2.7 V to 3.6 V 2V
CC
= 1.65 V to 1.95 V 0.35 ×V
CC
V
IL
Low-level input voltage V
CC
= 2.3 V to 2.7 V 0.7 VV
CC
= 2.7 V to 3.6 V 0.8V
I
Input voltage 0 V
CC
VV
O
Output voltage 0 V
CC
VV
CC
= 1.65 V -2V
CC
= 2.3 V -6I
OH
High-level output current mAV
CC
= 2.7 V -8V
CC
= 3 V -12V
CC
= 1.65 V 2V
CC
= 2.3 V 6I
OL
Low-level output current mAV
CC
= 2.7 V 8V
CC
= 3 V 12∆t/ ∆v Input transition rise or fall rate 10 ns/VT
A
Operating free-air temperature -40 85 °C
(1) All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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ELECTRICAL CHARACTERISTICS
SWITCHING CHARACTERISTICS
SN74ALVCH1623441-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
(1)
MAX UNIT
I
OH
= -100 µA 1.65 V to 3.6 V V
CC
- 0.2I
OH
= -2 mA 1.65 V 1.2I
OH
= -4 mA 2.3 V 1.9V
OH
2.3 V 1.7 VI
OH
= -6 mA
3 V 2.4I
OH
= -8 mA 2.7 V 2I
OH
= -12 mA 3 V 2I
OL
= 100 µA 1.65 V to 3.6 V 0.2I
OL
= 2 mA 1.65 V 0.45I
OL
= 4 mA 2.3 V 0.4V
OL
2.3 V 0.55 VI
OL
= 6 mA
3 V 0.55I
OL
= 8 mA 2.7 V 0.6I
OL
= 12 mA 3 V 0.8I
I
V
I
= V
CC
or GND 3.6 V ±5µAV
I
= 0.58 V 1.65 V 25V
I
= 1.07 V 1.65 V -25V
I
= 0.7 V 2.3 V 45I
I(hold)
V
I
= 1.7 V 2.3 V -45 µAV
I
= 0.8 V 3 V 75V
I
= 2 V 3 V -75V
I
= 0 to 3.6 V
(2)
3.6 V ±500I
OZ
V
O
= V
CC
or GND 3.6 V ±10 µAI
CC
V
I
= V
CC
or GND, I
O
= 0 3.6 V 40 µA∆I
CC
One input at V
CC
- 0.6 V, Other inputs at V
CC
or GND 3 V to 3.6 V 750 µAControl inputs 2.5C
i
V
I
= V
CC
or GND 3.3 V pFData inputs 3.5C
o
Outputs V
O
= V
CC
or GND 3.3 V 4 pF
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25 °C.(2) This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state toanother.
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
V
CC
= 2.5 V V
CC
= 3.3 VV
CC
= 1.8 V V
CC
= 2.7 VFROM TO
±0.2 V ±0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
TYP MIN MAX MIN MAX MIN MAX
t
pd
A B
(1)
1 4.9 5.1 1.4 4.4 nst
en
OE B
(1)
1 6.4 6.6 1.2 5.7 nst
dis
OE B
(1)
1 5.4 4.7 1.2 4.5 nst
sk(o)
(2)
0.35 nst
sk(o)
(3)
0.5 ns
(1) This information was not available at the time of publication.(2) Skew between outputs of the same bank and same package (same transition)(3) Skew between outputs of all banks of same package (A1–A8 tied together)
5
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OPERATING CHARACTERISTICS
SN74ALVCH162344
1-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
T
A
= 25 °C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 VPARAMETER TEST CONDITIONS UNITTYP TYP TYP
Outputs enabled
(1)
68 82Power dissipationC
pd
C
L
= 0 pF, f = 10 MHz pFcapacitance
Outputs disabled
(1)
12 14
(1) This information was not available at the time of publication.
6
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PARAMETER MEASUREMENT INFORMATION
VM
VM
VM
VM
VM
VM
VM
VM
VOH
VOL
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 Open
GND
RL
RL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
0 V
VOL + V∆
VOH − V∆
0 V
VI
0 V
0 V
tw
VIVI
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
0 V
VI
VM
tPHL
VMVM
VI
0 V
VOH
VOL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VMVM
tPLH
VLOAD
VLOAD/2
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 kΩ
500 Ω
500 Ω
500 Ω
VCC RL
2 × VCC
2 × VCC
6 V
6 V
VLOAD CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V∆
VCC
VCC
2.7 V
2.7 V
VI
VCC/2
VCC/2
1.5 V
1.5 V
VM
tr/tf
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
INPUT
SN74ALVCH1623441-BIT TO 4-BIT ADDRESS DRIVERWITH 3-STATE OUTPUTS
SCES085I – AUGUST 1996 – REVISED OCTOBER 2004
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
74ALVCH162344DLG4 ACTIVE SSOP DL 56 20 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74ALVCH162344GRE4 ACTIVE TSSOP DGG 56 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74ALVCH162344GRG4 ACTIVE TSSOP DGG 56 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74ALVCH162344VRE4 ACTIVE TVSOP DGV 56 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74ALVCH162344VRG4 ACTIVE TVSOP DGV 56 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALVCH162344DGGR OBSOLETE TSSOP DGG 56 TBD Call TI Call TI
SN74ALVCH162344DL ACTIVE SSOP DL 56 20 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALVCH162344GR ACTIVE TSSOP DGG 56 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALVCH162344VR ACTIVE TVSOP DGV 56 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Nov-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ALVCH162344GR TSSOP DGG 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 Q1
SN74ALVCH162344VR TVSOP DGV 56 2000 330.0 24.4 6.8 11.7 1.6 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ALVCH162344GR TSSOP DGG 56 2000 346.0 346.0 41.0
SN74ALVCH162344VR TVSOP DGV 56 2000 346.0 346.0 41.0
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 2
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040048/E 12/01
48 PINS SHOWN
56
0.730
(18,54)
0.720
(18,29)
4828
0.370
(9,40)
(9,65)
0.380
Gage Plane
DIM
0.420 (10,67)
0.395 (10,03)
A MIN
A MAX
0.010 (0,25)
PINS **
0.630
(16,00)
(15,75)
0.620
0.010 (0,25)
Seating Plane
0.020 (0,51)
0.040 (1,02)
25
24
0.008 (0,203)
0.0135 (0,343)
48
1
0.008 (0,20) MIN
A
0.110 (2,79) MAX
0.299 (7,59)
0.291 (7,39)
0.004 (0,10)
M
0.005 (0,13)
0.025 (0,635)
0°–ā8°
0.005 (0,13)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUAR Y 1998
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040078/F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20 8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0°–8°
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
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