INTEGRATED CIRCUITS DIVISION
DS-IX2120-R02 www.ixysic.com 1
Driver Characteristics
Features
•Floating Channel f or Bootst rap Operation to +1200V
•Outputs Capab le of Sourcing and Sinking 2A
•Gate Drive Supply Range From 15V to 20V
•Enhanced Robustness due to SOI Process
•Tolerant to Negativ e Voltage Transients:
dV/dt Immune
•3.3V Logic Compatible
•Undervolt age Lockout for Both High-Side and
Low-Side Outputs
Description
The IX2120 is a high volt age integrated circuit that can
drive high speed MOSFETs and IGBTs that operate at
up to +1200V. The IX2120 is configured wit h
independent high-side and low-side r ef erenced output
channels, both of which can source and sink 2A. The
floating high-side channel can drive an N-channel
pow er MOSFET o r IGBT 1200V from t he common
reference.
Manufactured on IXYS Integ rated Circuits Division's
proprietary high-voltage BCDMOS o n SOI (silicon on
insulator) process, the IX2120 is extremely robust, and
is virtually immune to negative transients. The UVLO
circuit prev ents tu rn-on of the MOSFET or IGBT until
there is sufficient VBS or VCC supply voltage.
The IX2120 is a vailab l e in a 28-pin SOIC package .
Ordering Information
IX2120 Functional Block Diagram
Parameter Rating Units
VOFFSET 1200 V
IO +/- (Source/Sink) 2/2 A
VOUT 15-20 V
ton/toff 250/210 ns
Part Description
IX2120B 28-Pin SOIC (28/Tube)
IX2120BTR 28-Pin SOIC (1000/Reel)
Level
Shift
VDD / VCC
VSS / COM
LS Delay
Control
Level
Shift
VDD / VCC
VSS / COM
UVLO
High
Voltage
Level
Shift
UVLO
Pulse
Generator
C
R
S
QBuffer
VDD
HIN
SD
LIN
VSS
VB
HO
VS
VCC
LO
COM
Input Control Logic
&
Cycle-by-Cycle
Edge-Triggered
Shutdown
Buffer
Mid
Voltage
Level
Shift
VBM
VSM
IX2120
1200V High and Low Side
Gate Driver
INTEGRATED CIRCUITS DIVISION
IX2120
2www.ixysic.com R02
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Package Pinout: 28-Pin SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin Description: 28-Pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.6 Dynamic Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.7 Static Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.8 Test Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.9 IX2120 Typical Application. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2. Typical Performance Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
INTEGRATED CIRCUITS DIVISION
IX2120
R02 www.ixysic.com 3
1 Specifications
Typical values are char acteristic of the de vice at +25°C, and are the result of engineering evaluations. They are
provided for inf ormation purposes only, and are not part of the manufacturing testing requirements.
1.1 Package Pinout: 28-Pi n SOIC Package 1.2 Pin Description: 28-Pin SOIC Package
VS - 1
8
VB - 2
3
6
7
HO - 4
5
28
9
27
VSS - 14
HIN - 11
VDD - 10
LIN - 13
SD - 12
15 - LO
16
17 - COM
18
19 - VCC
20
21
22 - VSM
23 - VBM
24 - VSM
25
26
Pin# Name Description
1VSHigh-Side Floating Supply Return
2VBHigh-Side Floating Supply
3-
No Connection
4HO
High-Side Gate Drive Output
5-
No Connection
6-
No Connection
7-
Internal Connection, Do Not Use
8-
No Connection
9-
Internal Connection, Do Not Use
10 VDD Logic Supply
11 HINLogic Input for High-Side Gate Drive
Output (HO), In-Phase
12 SD Logic Input for Shutdown
13 LINLogic Input for Low-Side Gate Driver
Output (LO), In-Phase
14 VSS Logic Ground
15 LO Low-Side Gate Drive Output
16 - No Connection
17 COM Low-Side Return
18 - No Connection
19 VCC Low-Side Supply
20 - Internal Connection, Do Not Use
21 - No Connection
22 VSM Middle Floating Return
23 VBM Middle Floating Supply
24 VSM Middle Floating Return
25 - No Connection
26 - No Connection
27 - No Connection
28 - No Connection
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IX2120
1.3 Absolut e Max imum Rating s
Absolute maximum ra tings indicat e sustained limit s beyond which damage to t he device may occur. All voltage
parameters are absolut e voltages ref ere nced to COM.
1.4 Thermal Characteristics
1.5 Recommended Operating Conditions
F or proper oper ation, the device should be used within the recommended conditions. The VS, VSM, and VSS offset
ratings are tested wit h all supplies b iased at a 15V differential.
Parameter Symbol Min Max Units
High-Side Floating Supply Voltage VB-0.3 1400 V
High-Side Floating Supply Offset Voltage VSVB-20 VB+0.3 V
High-Side Floating Output Voltage VHO VS-0.3 VB+0.3 V
Middle Floating Supply Voltage VBM -0.3 700 V
Middle Floating Supply Offset Voltage VSM VBM-20 VBM+0.3 V
Low-Side Fixed Supply Voltage VCC -0.3 20 V
Low-Side Output Voltage VLO -0.3 VCC+0.3 V
Logic Supply Voltage VDD -0.3 VSS+20 V
Logic Supply Offset Voltage VSS VCC-20 VCC+0.3 V
Logic Input Voltage (HIN, LIN, SD) VINVSS-0.3 VDD+0.3 V
Allowable Offset Supply Voltage Transient dVS/dt -50V/ns
Package Power Dissipation @25°C PD-1.3W
Junction Temperature TJ-40 +150 °C
Storage Temperature TS-55 +150 °C
Parameter Symbol Rating Units
Thermal Impedance, Junction to Ambient JA 74 °C/W
Parameter Symbol Min Max Units
High-Side Floating Supply Absolute Voltage VBVS+15 VS+20
V
High-Side Floating Supply Offset Voltage VS- 1200
High-Side Floating Output Voltage VHO VSVB
Middle Floating Supply Absolute Voltage VBM VSM+15 VSM+20
Middle Floating Supply Offset Voltage VSM -600
Low-Side Fixed Supply Voltage VCC 15 20
Low-Side Output Voltage VLO 0VCC
Logic Supply Voltage VDD VSS+3 VSS+20
Logic Supply Offset Voltage VSS -5 +5
Logic Input Voltage (HIN, LIN, SD) VINVSS VDD
INTEGRATED CIRCUITS DIVISION
IX2120
R02 www.ixysic.com 5
1.6 Dynamic Electrical Characteristics
VCC, VDD=15V; VBS, V BMSM=13.5V; CL=1000 pF; and VSS=COM unless otherwise specified. See “Test
Waveforms” on page 6.
1.7 Static Electrical Characteristics
VCC, VBMSM, VBS, VDD=15V, and VSS=COM unless otherwise specified. The V IN, V TH, and IIN parameter s ar e
referenced to VSS and are applicable to all three logic input leads: HIN, LIN, and SD. The VO and IO parameters are
ref erenced to COM and are applicab le to the respectiv e output leads: HO or LO.
Parameter Conditions Symbol Min Typ Max Units
Turn-On propagation Delay VS=0Vton -254-
ns
Turn-Off propagation Delay VSM=600V
VS=1200V
toff -213-
Shutdown propagation Delay tSD -207-
Turn-On Rise Time - tr-9.4-
Turn-Off Fall Time - tf-9.7-
Delay Matching, HS & LS Turn-On/Off - MT - - 60
Parameter Conditions Symbol Min Typ Max Units
Logic “1” Input Voltage VDD=15VVIH 9.5 - - V
Logic “0” Input Voltage VIL --6
Logic “1” Input Voltage VDD=3VVIH 2.5 - - V
Logic “0” Input Voltage VIL --0.8
High-Level Output Voltage, VBIAS-VOIO=0A VOH -1.62.5
V
Low-Level Output Voltage, VOIO=20mA VOL - - 0.15
High Offset Supply Leakage Current VB=VS=600VIHLK -3260
A
Middle Offset Supply Leakage Current VBM=VSM=600VIMLK -3260
Quiescent VBS Supply Current VIN=0V or VDD IQBS -187310
Quiescent VBMSM Supply Current VIN=0V or VDD IQBMSM -487730
Quiescent VCC Supply Current VIN=0V or VDD IQCC -300420
Quiescent VDD Supply Current VIN=0V or VDD IQDD --1
Logic “1” Input Bias Current VIN=VDD IIN+ -2240
A
Logic “0” Input Bias Current VIN=0VIIN- --5
VBS Supply Undervoltage Positive Going Threshold -VBSUV+ 7.5 8.4 9.7
V
VBS Supply Undervoltage Negative Going Threshold -VBSUV- 77.89.4
VCC Supply Undervoltage Positive Going Threshold -VCCUV+ 7.4 8.4 9.6
VCC Supply Undervoltage Negative Going Threshold -VCCUV- 77.89.4
Output High Short Circuit Pulsed Current VO=0V, VIN=VDD , PW10sIO+ 2--
A
Output Low Short Circuit Pulsed Current VO=15V, VIN=0V, PW10sIO- 2--
INTEGRATED CIRCUITS DIVISION
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IX2120
1.8 Test Waveforms
1.8.1 Switching Time Test Circuit
1.8.2 Input/Output Timing Waveform
1.8.3 Switching Time Waveform Definition
1.8.4 Shutdown Waveform Definitions
1.8.5 Delay Matching Waveform Definitions
HIN
SD
LIN
VCC=15V
10µF 0.1µF10µF0.1µF
10µF
CL
CL
HO
LO
(0 to 1000V/1200V)
VB
VS
13.5V
+
-
15
4
1
21910
11
12
13
14 17
10µF0.1µF
10µF(0 to 500V/600V)
VBM
VSM
13.5V
+
-
23
22
24
VB
VDD VCC
VSS COM
VS
VBM
VSM
VSM
HIN
LIN
SD
HO
LO
HIN
LIN
HO
LO
50% 50%
90% 90%
10% 10%
t
on
t
r
t
off
t
f
SD
HO
LO
50%
90%
tsd
HIN
LIN
LO HO
50% 50%
10%
90%
MT
LO HO
MT
INTEGRATED CIRCUITS DIVISION
IX2120
R02 www.ixysic.com 7
1.9 IX2120 Typical Application
The IX2120 is a 1200V half bridge gate driver for high
v olt age IGBTs and MOSFETs. Three input signals
(HIN, LIN, and SD) determine the state of the gate
driver outputs ( HO and LO). HI N controls HO via a
high v oltage int erface. The high v oltage int erface is
integrated in to the bootstrap supply b y using two 600V
diodes (DD1 and DD2).
A two-stage bootstrap supplies current to the high side
and mid level circuitry. The two bootstrap cir cuits are
identical, and careful board layout and positioning of
the bootstrap components are required. Resistors
RD1 and RD2 form a resistive divider to keep the mid
supply v ery near the center of the high voltage supply
range . High value resisters (5M) are recommended
to minimize power dissipation. The tw o-stage
bootstrap supply reduces the high side gate drive
v olt age ( VB-VS) b y t w o diode forward voltage drops
(2VF). Theref ore, the VCC supply range for the
application circuit shown is:
Where VCE(sat)M2 is the saturation v oltage of I GBT,
M2.
The high side bootstrap capacit or se lection is a
function of the switching frequency and the on-time
(tONTIME) of t he high side source driver . The quiescent
VBS current (IQBS) is supplied by bootstrap capacitor
CB2, and the quiescent VBMSM supply curr ent
(IQBMSM) is supplied by bootstr ap capacit or CB1. To
insure adequate supply current:
and:
V
DD
V
SS
VHV
COM
M1
1200V
M2
1200V
DR2
1200V
DR1
1200V
RB1
5
RB2
5
R12
4.7
R22
4.7
R11
47
R21
47
V
S
1
V
B
2
N/C
3
HO
4
N/C
5
N/C
6
N/C
7
N/C
8
N/C
9
V
DD
10
HIN
11
SD
12
LIN
13
V
SS
14 LO 15
N/C 16
COM 17
N/C 18
V
CC
19
N/C 20
N/C 21
V
SM
22
V
BM
23
V
SM
24
N/C 25
N/C 26
N/C 27
N/C 28
IX2120
DG2
25V
DG1
25V
DB1
DB2
DD2
600V
DD1
600V
600V
600V
C1
1µF
V
CC
HIN
SD
LIN
25V
CB1
0.33µF
25V
CB2
0.33µF
25V
C3
1µF
25V
RD2
5M
RD1
5M
20VV
CC VBSUV+2VFVCE sat
M2++
CB1IQBS tONTIME
VCC VBSUV+2VF VCE sat
M2++–
---------------------------------------------------------------------------------------------
CB2IQBMSM tONTIME
VCC VBSUV+2VF VCE sat
M2++–
---------------------------------------------------------------------------------------------
INTEGRATED CIRCUITS DIVISION
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IX2120
2 Typical Performance Data
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Turn-Off Delay Time (ns)
0
100
200
300
400
500 Turn-Off Delay Time vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Turn-On Delay Time (ns)
0
100
200
300
400
500
Turn-On Delay Time
vs. Temperature
Supply V oltage (V)
10 12 14 16 1820
Turn-On Delay Time (ns)
0
50
100
150
200
250
300
350
Turn-On Delay Time
vs. Supply Voltage
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Shutdown Delay Time (ns)
0
50
100
150
200
250
300
350
Shutdown Delay Time
vs. Temperature
Supply V oltage (V)
10 12 14 16 1820
Turn-Off Delay Time (ns)
0
100
200
300
400
500
Turn-Off Delay Time
vs. Supply Voltage
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Turn-On Rise Time (ns)
0
10
20
30
40
50 Turn-On Rise Time vs. Temperature
Supply V oltage (V)
0 5 10 15 20
Shutdown Delay Time (ns)
0
50
100
150
200
250
300
350
Shutdown Delay Time
vs. VDD Supply Voltage
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Turn-Off Fall Time (ns)
0
10
20
30
40
50 Turn-Off Fall Time vs. Temperature
Supply V oltage (V)
10 12 14 16 1820
Turn-Off Fall Time (ns)
0
5
10
15
20
25
30
35 Turn-Off Fall Time vs. Voltage
Supply V oltage (V)
10 12 14 16 1820
Turn-On Rise Time (ns)
0
5
10
15
20
25
30
35
Turn-On Rise Time vs. Voltage
VDD (V)
0 3 6 9 12 15 1821
Logic “0” Input Threshold (V)
0
2
4
6
8
10
12 Logic “0” Input Threshold vs. VDD
VDD (V)
0 3 6 9 12 15 1821
Logic “1” Input Threshold (V)
0
2
4
6
8
10
12 Logic “1” Input Threshold vs. VDD
INTEGRATED CIRCUITS DIVISION
IX2120
R02 www.ixysic.com 9
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Logic "0" Input Threshold (V)
0
3
6
9
12
15
Logic "0" Input Threshold
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Logic "1" Input Threshold (V)
0
3
6
9
12
15
Logic "1" Input Threshold
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Logic "1" Input Current (µA)
0
20
40
60
80
100
Logic "1" Input Current
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Logic "0" Input Current (µA)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Logic "0" Input Current
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VDD Supply Current (µA)
0
5
10
15
20 VDD Supply Current vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VBS Supply Current (µA)
0
100
200
300
400
500 VBS Supply Current vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VCC Supply Current (µA)
0
100
200
300
400
500
600 VCC Supply Current vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VBMSM Supply Current (µA)
0
50
100
150
200
250
300
350
400
450
500
550
VBMSM Supply Current
vs. Temperature
VCC Supply Voltage (V)
10 12 14 16 1820
VCC Supply Current (µA)
0
100
200
300
400
500 VCC Supply Current vs. Voltage
VDD Supply Voltage (V)
0 5 10 15 20
VDD Supply Current (µA)
0.0
0.2
0.4
0.6
0.8
1.0 VDD Supply Current vs. Voltage
V
BS
Floating Supply Voltage (V)
10 12 14 16 1820
V
BS
Supply Current (µA)
0
100
200
300
400
500
VBS Supply Current vs. Voltage
VBMSM Supply Voltage (V)
10 12 14 16 1820
VBMSM Supply Current (µA)
0
100
200
300
400
500
600 VBMSM Supply Current vs. Voltage
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IX2120
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Leakage Current (µA)
0
10
20
30
40
50
High/Middle Supply Leakage Current
vs. Temperature
Boost V oltage (V)
0 100 200 300 400 600
Leakage Current (µA)
0
100
200
300
400
500
High/Middle Supply Leakage Current
vs. VB / VBM V oltage
500
Temperature (ºC)
-50 -25 0 25 50 75 100 125
6
7
8
9
10
11
VCCUV-
vs. Temperature
VCCUV- (V)
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VCCUV+ (V)
6
7
8
9
10
11
VCCUV+
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VBSUV+ (V)
6
7
8
9
10
11
VBSUV+
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
High Level Output Voltage (V)
0
1
2
3
4
5
High Level Output Voltage
vs. Temperature
(IO=0mA)
Temperature (ºC)
-50 -25 0 25 50 75 100 125
VBSUV- (V)
6
7
8
9
10
11
VBSUV-
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Low Level Output Voltage (V)
0.0
0.2
0.4
0.6
0.8
1.0
Low Level Output Voltage
vs. Temperature
(IO=20mA)
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Output Sink Current (A)
0
1
2
3
4
5
Output Sink Current
vs. Temperature
Temperature (ºC)
-50 -25 0 25 50 75 100 125
Output Source Current (A)
0
1
2
3
4
5
Output Source Current
vs. Temperature
Supply V oltage (V)
10 12 14 16 1820
Output Source Current (A)
0
1
2
3
4
5
Output Source Current vs. Voltage
Supply V oltage (V)
10 12 14 16 1820
Output Sink Current (A)
0
1
2
3
4
5
Output Sink Current vs. Voltage
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R02 www.ixysic.com 11
Supply V oltage (V)
10 12 14 16 1820
High Level Output Voltage (V)
0
1
2
3
4
5
High Level Output Voltage
vs. Supply Voltage
V
CC
Supply Voltage (V)
10 12 14 16 1820
Low Level Output Voltage (mV)
0
40
80
120
160
200
Low Level Output Voltage
vs. Supply Voltage
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IX2120
3 Manufacturing Information
3.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moistur e ing r ession. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the
latest v ersion of t he joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
e v alu ation. W e test all of our products to the maxim um conditions set forth in the standard, and guarantee
proper operation of our devices when handled according to the limitations and inf ormation in that standard as well as
to any limit ations set forth in the information or standards ref erenced below.
Failure to adhere to the warnings or limitations as established b y t he listed specifications could result in reduced
product performance, reduction of operab le life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
3.2 ESD Sensitivi ty
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
3.3 Soldering Profile
Provided in the table below is the Classification Temperature ( TC) of this product and the maximum dwell time the
body temperature of t his device may be abov e (T C - 5)ºC . The classification temperature sets the Maxim um Body
Temperature allowed for this device during lead-free reflo w processes. For through hole devices, and an y other
processes, the guidelines of J-STD-020 m ust be observed.
3.4 Board Wa s h
IXYS Integr ated Circu it s Division recommends t he use of no-clean f lux formulations. Boar d washing to reduce or
remove flux residue following the solder reflow process is accep table prov ided proper precaut ions ar e taken to
pre vent damage to the device. These pr ecaut ions include, but are not limited to: using a low pressure wash and
providing a follow up bak e cycle suff icien t to remove any moistur e trapped within the device due to the washing
process. Due to the v ariability of the wash par ameters used to clean the board, determination of the bake temperature
and duration necessary to remove the moisture trapped within the package is the responsibility of the user
(assembler) . Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be
used. Additionally, the device must n ot be exposed to flux or solvents tha t are Chlorine- or Fluorine-based.
Device Moisture Sensitivity Level (MSL) Classification
IX2120B MSL 1
Device Classification Temperature (TC)Dwell Time (tp)Max Reflow Cycles
IX2120B 260°C 30 seconds 3
INTEGRATED CIRCUITS DIVISION
IX2120
R02 www.ixysic.com 13
3.5 Mechanical D ime ns io n s
3.5.1 IX2120: 28-Pin SOIC Package
3.5.2 IX2120 Tape & Reel Information
For additional information please visit our website at: www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, I XYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-IX2120-R02
©Copyright 2016, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
2/3/2016
Dimensions
mm
(inches)
Top Cover
Tape Thickness
0.102 MAX
(0.004 MAX)
330.2 DIA.
(13.00 DIA)
Embossed Carrier
Embossment
A0=10.90
(0.429)
B0=18.30
(0.720)
W=24.00+0.03/-0.01
(0.945+0.001/-0.0004)
K1=2.70
(0.106)
K0=3.20
(0.126)
P=12.00
(0.472)
Notes:
1. Unless otherwise specified, all dimensional tolerances per EIA standard 481
2. Unless otherwise specified, all dimensions ±0.10 (0.004)