General Description
The MAX9375 is a fully differential, high-speed, any-
thing-to-LVPECL translator designed for signal rates up
to 2GHz. The MAX9375’s extremely low propagation
delay and high speed make it ideal for various high-
speed network routing and backplane applications.
The MAX9375 accepts any differential input signal within
the supply rails and with minimum amplitude of 100mV.
Inputs are fully compatible with the LVDS, LVPECL,
HSTL, and CML differential signaling standards. Outputs
are LVPECL and have sufficient current to drive 50Ω
transmission lines.
The MAX9375 is available in an 8-pin µMAX package
and operates from a single +3.3V supply over the -40°C
to +85°C temperature range.
Applications
Backplane Logic Standard Translation
LAN
WAN
DSLAM
DLC
Features
♦Guaranteed 2GHz Switching Frequency
♦Accepts LVDS/LVPECL/Anything Inputs
♦421ps (typ) Propagation Delays
♦30ps (max) Pulse Skew
♦2psRMS (max) Random Jitter
♦Minimum 100mV Differential Input to Guarantee
AC Specifications
♦Temperature-Compensated LVPECL Output
♦+3.0V to +3.6V Power-Supply Operating Range
♦>2kV ESD Protection (Human Body Model)
MAX9375
Single LVDS/Anything-to-LVPECL Translator
________________________________________________________________ Maxim Integrated Products 1
1
2
3
4
8
7
6
5
VCC
OUT
OUT
GND
GND
IN
IN
VCC MAX9375
µMAX
TOP VIEW
Pin Configuration
Ordering Information
19-2808; Rev 0; 4/03
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX9375EUA -40°C to +85°C 8 µMAX
LVDS/ANY
SINGLE TRANSLATOR
LVPECL
Functional Diagram
MAX9375
Single LVDS/Anything-to-LVPECL Translator
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND...........................................................-0.3V to +4.1V
Inputs (IN, IN).............................................-0.3V to (VCC + 0.3V)
IN to IN................................................................................±3.0V
Continuous Output Current .................................................50mA
Surge Output Current .......................................................100mA
Continuous Power Dissipation (TA= +70°C)
8-Pin µMAX (derate 5.9mW/°C above +70°C) ..........470.6mW
θJA in Still Air............................................................+170°C/W
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (IN, IN, OUT, OUT) .........................≥2kV
Soldering Temperature (10s) ...........................................+300°C
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 3.0V, input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage
VCM = 0.05V to (VCC - 0.05V), LVPECL outputs terminated with 50Ω±1% to VCC - 2.0V, TA= -40°C to +85°C. Typical values are at
VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA= +25°C, unless otherwise noted.) (Notes 1, 2, 3)
-40°C +25°C +85°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
DIFFERENTIAL INPUTS (IN, IN)
Differential Input
Threshold VTHD -100 +100 -100 +100 -100 +100 mV
Input Current IIN, I IN VIN, V IN = VCC or 0V -20 +20 -20 +20 -20 +20 µA
Input Common-
Mode Voltage VCM Figure 1 0.05 VCC -
0.05 0.05 VCC -
0.05 0.05 VCC -
0.05 V
LVPECL OUTPUTS (OUT, OUT)
Single-Ended
Output High
Voltage
VOH VCC -
1.085
VCC -
1.017
VCC -
0.880
VCC -
1.025
VCC -
0.983
VCC -
0.880
VCC -
1.025
VCC -
0.966
VCC -
0.880 V
Single-Ended
Output Low
Voltage
VOL VCC -
1.830
VCC -
1.753
VCC -
1.620
VCC -
1.810
VCC -
1.710
VCC -
1.620
VCC -
1.810
VCC -
1.692
VCC -
1.620 V
Differential Output
Voltage V
OH
- V
OL 595 725 595 725 595 725 mV
POWER SUPPLY
Supply Current ICC All pins open except
V
CC, G N D 10 18 12 18 14 18 mA
MAX9375
Single LVDS/Anything-to-LVPECL Translator
_______________________________________________________________________________________ 3
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency ≤1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (VIN, V IN) = 0 to VCC, input common-mode voltage VCM = 0.05V to (VCC - 0.05V), outputs termi-
nated with 50Ω±1% to VCC - 2.0V, TA= -40°C to +85°C. Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode volt-
age VCM = 1.2V, TA= +25°C, unless otherwise noted.) (Note 4)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Switching Frequency fMAX VOH - VOL ≥ 250mV 2.0 2.5 GHz
Propagation Delay Low to High tPLH Figure 2 250 421 600 ps
Propagation Delay High to Low tPHL Figure 2 250 421 600 ps
Pulse Skew |tPLH -tPHL|t
SKEW Figure 2 (Note 5) 6 30 ps
Output Low-to-High Transition
Time (20% to 80%) tRFigure 2 116 220 ps
Output High-to-Low Transition
Time (20% to 80%) tFFigure 2 116 220 ps
Added Random Jitter tRJ fIN = 1.34GHz (Note 6) 0.7 2 ps
(
RMS
)
Note 1: Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except VTHD and VID.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at TA= +25°C and guaranteed by design and characterization over the full operating
temperature range.
Note 4: Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma.
Note 5: tSKEW is the magnitude difference of differential propagation delays for the same output under the same conditions; tSKEW =
|tPHL - tPLH|.
Note 6: Device jitter added to the input signal.
Typical Operating Characteristics
(VCC = +3.3V, differential input voltage |VID| = 0.2V, VCM = 1.2V, input frequency = 500MHz, outputs terminated with 50Ω±1% to
VCC - 2.0V, TA= +25°C, unless otherwise noted.)
0
10
5
20
15
25
30
0 1000500 1500 2000
NO LOAD
SUPPLY CURRENT vs. FREQUENCY
MAX9375 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
300
500
400
700
600
800
900
0 1000500 1500 2000
OUTPUT AMPLITUDE vs. FREQUENCY
MAX9375 toc02
FREQUENCY (MHz)
OUTPUT AMPLITUDE (mV)
MAX9375
Single LVDS/Anything-to-LVPECL Translator
4 _______________________________________________________________________________________
100
110
105
120
115
125
130
-40 10-15 35 60 85
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9375 toc04
TEMPERATURE (°C)
OUTPUT RISE/FALL TIME (ps)
tF
tR
Typical Operating Characteristics (continued)
(VCC = +3.3V, differential input voltage |VID| = 0.2V, VCM = 1.2V, input frequency = 500MHz, outputs terminated with 50Ω±1% to
VCC - 2.0V, TA= +25°C, unless otherwise noted.)
Detailed Description
The MAX9375 is a fully differential, high-speed, any-
thing-to-LVPECL translator designed for signal rates up
to 2GHz. The MAX9375’s extremely low propagation
delay and high speed make it ideal for various high-
speed network routing and backplane applications.
The MAX9375 accepts any differential input signals
within the supply rails and with a minimum amplitude of
100mV. Inputs are fully compatible with the LVDS,
LVPECL, HSTL, and CML differential signaling stan-
dards. Outputs are LVPECL and have sufficient current
to drive 50Ωtransmission lines.
Inputs
Inputs have a wide common-mode range of 0.05V to
(VCC - 0.05V), which accommodates any differential
signals within rails, and requires a minimum of 100mV
to switch the outputs. This allows the MAX9375 inputs
to support virtually any differential signaling standard.
LVPECL Outputs
The MAX9375 outputs are emitter followers that require
external resistive paths to a voltage source (VT= VCC
- 2.0V typ) more negative than worst-case VOL for proper
static and dynamic operation. When properly terminat-
ed, the outputs generate steady-state voltage levels,
VOL or VOH with fast transition edges between state
levels. Output current always flows into the termination
during proper operation.
Pin Description
PIN NAME FUNCTION
1, 8 VCC
Positive Supply. Bypass from VCC to
GND with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as
close to the device as possible with the
smaller value capacitor closest to the
device.
2 IN LVDS/Anything Noninverting Input
3IN LVDS/Anything Inverting Input
4, 5 GND Power Supply Ground Connection
6OUT Differential LVPECL Inverting Output.
Terminate with 50Ω ±1% to VCC - 2V.
7 OUT Differential LVPECL Noninverting Output.
Terminate with 50Ω ±1% to VCC - 2V.
390
410
400
430
420
440
450
-40 10-15 35 60 85
PROPAGATION DELAY
vs. TEMPERATURE
MAX9375 toc03
TEMPERATURE (°C)
PROPAGATION DELAY (ps)
tPLH
tPHL
Applications Information
Output Termination
Terminate the outputs with 50Ωto (VCC - 2V) or use
equivalent Thevenin terminations. Terminate OUT and
OUT with identical termination on each for low-output
distortion. When a single-ended signal is taken from the
differential output, terminate both OUT and OUT. Ensure
that output currents do not exceed the current limits as
specified in the Absolute Maximum Ratings. Under all
operating conditions, the device’s total thermal limits
should be observed.
Supply Bypassing
Bypass VCC to ground with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors. Place the
capacitors as close to the device as possible with the
0.01µF capacitor closest to the device pins.
Traces
Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ωcharacteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
MAX9375
Single LVDS/Anything-to-LVPECL Translator
_______________________________________________________________________________________ 5
VCM (MAX) = VCC - 0.05V
VCC
GND
VID
VCM (MIN) = 0.05V
VID
Figure 1. Input Definitions
Chip Information
TRANSISTOR COUNT: 614
PROCESS: Bipolar
80%
OUT - OUT
20% 20%
80%
0V DIFFERENTIAL
tF
tR
VID 0V DIFFERENTIAL
tPLH
tPHL VOH
VOL
VOH - VOL
VOH - VOL
VOH - VOL
DIFFERENTIAL OUTPUT
WAVEFORM
IN
OUT
IN
OUT
Figure 2. Differential Input-to-Output Propagation Delay Timing
Diagram
MAX9375
Single LVDS/Anything-to-LVPECL Translator
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
6_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
8LUMAXD.EPS
PACKAGE OUTLINE, 8L uMAX/uSOP
1
1
21-0036 J
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
MAX
0.043
0.006
0.014
0.120
0.120
0.198
0.026
0.007
0.037
0.0207 BSC
0.0256 BSC
A2 A1
c
eb
A
L
FRONT VIEW SIDE VIEW
E H
0.6±0.1
0.6±0.1
ÿ 0.50±0.1
1
TOP VIEW
D
8
A2 0.030
BOTTOM VIEW
16∞
S
b
L
H
E
D
e
c
0∞
0.010
0.116
0.116
0.188
0.016
0.005
8
4X S
INCHES
-
A1
A
MIN
0.002
0.950.75
0.5250 BSC
0.25 0.36
2.95 3.05
2.95 3.05
4.78
0.41
0.65 BSC
5.03
0.66
6∞0∞
0.13 0.18
MAX
MIN
MILLIMETERS
- 1.10
0.05 0.15
α
α
DIM
