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Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semic onduct or Corp. All ri ghts res erved.
Parameter Conditions Minimum Typical Maximum Units
Operation Frequency1 DC 3000 MHz
Insertion Loss 1000 MHz
2000 MHz 0.60
0.60 0.75
0.75 dB
dB
Isolation – RFC to RF1/RF2 1000 MHz
2000 MHz 37
27 39
29 dB
dB
Isolation – RF1 to RF2 1000 MHz
2000 MHz 34
26 36
28 dB
dB
Return Loss 1000 MHz
2000 MHz 19
22 20
25 dB
dB
‘ON’ Switching Time CTRL to 0.1 dB final value, 2 GHz 200 ns
‘OFF’ Switching Time CTRL to 25 dB isolation, 2 GHz 90 ns
Video Feedthrough2 15 mVpp
Input 1 dB Compression 2000 MHz 26 27 dBm
Input IP3 2000 MHz, 14dBm 43 45 dBm
8-lead MSOP
RFC
RF1 RF2
CMOS
Control
Driver
CTRL
The PE4244 UltraCMOS™ RF Switch is designed to cover a
broad range of applications from DC to 3.0 GHz. This switch
integrates on-board CMOS control logic with a low voltage
CMOS compatible control input. Using a +3-volt nominal power
supply voltage, a 1 dB compression point of +27 dBm can be
achieved. The PE4244 also exhibits excellent isolation of 39 dB
at 1.0 GHz and is offered in a small 8-lead MSOP package.
The PE4244 UltraCMOS™ RF Switch is manufactured in
Peregrine ’s patented Ultra Thin Silicon (UTSi®) CMOS
process, offering the performance of GaAs with the economy
and integration of conventional CMOS.
Product Specification
SPDT UltraCMOS™ RF Switch
Product Description
Figure 1. Functional Diagram
PE4244
Features
• Single +3.0-volt Power Supply
• Low Insertion loss: 0.60 dB up to
2.0 GHz
• High isolation of 39 dB at 1.0 GHz,
29 dB at 2.0 GHz
• Typical 1 dB compression of +27 dBm
• Single-pin CMOS logic contr ol
• Packaged in 8-lead MSOP
Notes: 1. Device linearity will begi n to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50
test set-up, m easured with 1ns risetime pulses and 500 MHz bandwidth.
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )
Figure 2. Package Type
Product Specific ation
PE4244
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©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0103-03 UltraCMOS™ RFIC Solutions
Table 2. Pin Descriptions
Note 1: All RF pins must be DC blocked with an external
series capaci tor or held at 0 VDC.
Figure 3. Pin Configuration (Top View) Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMO S™
devices are immune to latch-up.
Table 4. DC Electrical Specifications
4244
1
2
3
4
8
7
6
5
CTRL
RFC
GND
RF1
GND
VDD
GND
RF2
Pin
No. Pin
Name Description
1 VDD Nominal 3 V supply connection. A by-
pass capacit or (100 pF) to the ground
plane should be placed as close as pos-
2 CTRL CMOS logic level:
High = RFC to RF1 signal path
3 GND Ground connection. Traces should be
physically short and connected to
4 RFC Common RF port for switch (Note 1)
5 RF2 RF2 port (Note 1)
6 GND Ground Connection. Traces should be
physically short and connected to
7 GND Ground Connection. Traces should be
physically short and connected to
8 RF1 RF1 port (Note 1)
Symbol Parameter/Conditions Min Max Units
VDD Power supply voltage -0.3 4.0 V
VI Voltage on any input -0.3 VDD+ V
TST Storage temperature range -65 150 °C
TOP Operating temperature -40 85 °C
PIN Input power (50) 30 dBm
VESD ESD voltage (Human Body 1500 V
Parameter Min Typ Max Units
VDD Power Supply Voltage 2.7 3.0 3.3 V
IDD Power Supply Current
VDD = 3V, VCNTL = 3V 250 500 nA
Control Voltage Hi gh 0.7xVDD V
Control Voltage Low 0.3xVDD V
Control Voltage Signal Path
CTRL = CMOS High RFC to RF1
CTRL = CMOS Low RFC to RF2
Table 5. Control Logic Truth Table
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in th e DC Electrical Specif ications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Product Specific ation
PE4244
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Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semic onduct or Corp. All ri ghts res erved.
Evaluation Kit
The SPDT Swit ch Evalu ation Kit board was
designed t o ease customer evaluation of t he
PE4244 SPDT swit ch. The RF common port is
connected through a 50 transmission line to the
top left SMA c onnector, J1. Port 1 and Port 2 are
connected through 50 t r ansmission lines t o t he top
two SMA connectors on the right si de of the board,
J3 and J4. A t hrough t r ansmission line connects
SMA conn ect ors J6 and J8. This transmissio n line
can be used to est i mat e t he loss of the PCB over the
environme n t al conditions being evaluated.
The board is const r ucted of a two metal layer FR4
material with a t ot al t hi ckness of 0.031”. The bott om
layer provides ground for the RF transmiss ion lines.
The transm ission lines were desi gned using a
coplanar waveguide with ground plane model using
a trace width of 0.030”, trace gaps of 0.007”,
dielectri c t hickness of 0.028”, met al t hickness of
0.0014” and r of 4.4.
J2 provides a means for controlling DC and digit al
inputs t o t he devi ce. Starting from the lower left pin,
the second pin to the right (J2-3) is connected to the
device CT RL input. The fourth pin to t he ri ght (J2-7)
is connected to the device VDD inp ut . A decoupling
capacitor (100 pF) is provided on both CTRL and
VDD traces. It is the responsibility of the customer to
determine proper supply decoupling for their des ign
applic at ion. Removing these components from the
evaluation board has not been shown to degrade RF
performance.
Figure 4. Evaluation Board Layout
Figure 5. Evaluation Board Schematic
Peregrine specification 101/0037
Peregrine specification 101/0147
Product Specific ation
PE4244
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©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0103-03 UltraCMOS™ RFIC Solutions
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)
Figure 7. Input 1 dB Compression Point & IIP3
Figure 9. Isolation – RFC to RF1 Figure 8. Insertion Loss – RFC to RF2
Figure 6. Insertion Loss – RFC to RF1
-1.5
-1.2
-0.9
-0.6
-0.3
0
0 500 1000 1500 2000 2500 3000
Insertion Loss (dB)
Frequency (MHz)
-40°C
25°C85°C
20
30
40
50
60
20
30
40
50
60
0 500 1000 1500 2000 2500 3000
IIP3 (dBm)
1dB Compression Point (dBm)
Frequency (MHz)
-1.5
-1.2
-0.9
-0.6
-0.3
0
0 500 1000 1500 2000 2500 3000
Insertion Loss (dB)
Frequency (MHz)
-40°C
25°C85°C
-100
-80
-60
-40
-20
0
0 500 1000 1500 2000 2500 3000
Isolation (dB)
Frequency (MHz)
Product Specific ation
PE4244
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Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semic onduct or Corp. All ri ghts res erved.
Figure 11. Isolation – RF1 to RF2, RF2 to RF1
Figure 13. Return Loss – RF1, RF2 Figure 12. Return Loss – RFC to RF1, RF2
Figure 10. Isolation – RFC to RF2
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)
-100
-80
-60
-40
-20
0
0 500 1000 1500 2000 2500 3000
Isolation (dB)
Frequency (MHz)
-100
-75
-50
-25
0
0 500 1000 1500 2000 2500 3000
Isolation (dB)
Frequency (MHz)
-40
-30
-20
-10
0
0 500 1000 1500 2000 2500 3000
Return Loss (dB)
Frequency (MHz)
RF2
RF1
-40
-30
-20
-10
0
0 500 1000 1500 2000 2500 3000
Return Loss (dB)
Frequency (MHz)
RF2
RF1
Product Specific ation
PE4244
Page 6 of 7
©2005 Peregrine Semic onduct or Corp. All ri ghts res erved. Document No. 70-0103-03 UltraCMOS™ RFIC Solutions
8-lead MSOP
Figure 14. Package Drawing
Table 6. Ordering Information
FRONT VIEW
2.95±0.10
0.08 A B C
0.33 +0.07
-0.08
0.10 A0.10±0.05
3.00±0.10
0.86±0.08
1.10 MAX
- C -
- A -
1
0.65BSC
0.51±0.13
2.45±0.10
0.51±0.13
2X
8
3.00±0.10
.25 A B C
234
- B -
.525BSC
TOP VIEW
567
4.90±0.15
3.00±0.10
SIDE VIEW
2.95±0.10
Order Code Part Marking Description Package Shipping Method
4244-01 4244 P E4244-08MSOP-50A 8-lead MSOP 50 uni ts / Tube
4244-02 4244 P E4244-08MSOP-2000C 8-lead MSOP 2000 units / T&R
4244-00 PE4244-EK PE4244-08MSOP-EK Evaluation Kit 1 / Box
4244-52 4244 P E4244G-08MSOP-2000C Green 8-lead MSOP 2000 units / T&R
4244-51 4244 P E4244G-08MSOP-50A Green 8-lead MSOP 50 units / Tube
Product Specific ation
PE4244
Page 7 of 7
Document No. 70-0103-03 www.psemi.com ©2005 Peregrine Semic onduct or Corp. All ri ghts res erved.
Sales Offices
The Americas
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Tel 858-731-9400
Fax 858-731-9499
North Asia Pacifi c
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
Space and Defense Products:
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Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possibl e product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the spec ifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended fo r use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
South Asia Pacific
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
