FSPYC264R, FSPYC264F Data Sheet June 2001 (c)2001 Fairchild Semiconductor Corporation Radiation Hardened, SEGR Resistant N-Channel Power MOSFETs itle PY 64R PY 64F bjec diat den GR ista Cha l wer SF ) tho yw s diat den GR ista Cha l wer SF , rchi Fairchild Star*PowerTM Rad Hard MOSFETs have been specifically developed for high performance applications in a commercial or military space environment. Star*Power MOSFETs offer the system designer both extremely low r DS(ON) and Gate Charge allowing the development of low loss Power Subsystems. Star*Power FETs combine this electrical capability with total dose radiation hardness up to 300K RADs while maintaining the guaranteed performance for Single Event Effects (SEE) which the Fairchild FS families have always featured. TM The Fairchild portfolio of Star*Power FETs includes a family of devices in various voltage, current and package styles. The Star*Power family consists of Star*Power and Star*Power Gold products. Star*Power FETs are optimized for total dose and r DS(ON) performance while exhibiting SEE capability at full rated voltage up to an LET of 37. Star*Power Gold FETs have been optimized for SEE and Gate Charge providing SEE performance to 80% of the rated voltage for an LET of 82 with extremely low gate charge characteristics. This MOSFET is an enhancement-mode silicon-gate power field effect transistor of the vertical DMOS (VDMOS) structure. It is specifically designed and processed to be radiation tolerant. The MOSFET is well suited for applications exposed to radiation environments such as switching regulation, switching converters, power distribution, motor drives and relay drivers as well as other power control and conditioning applications. As with conventional MOSFETs these Radiation Hardened MOSFETs offer ease of voltage control, fast switching speeds and ability to parallel switching devices. File Number 4886 Features * 45A, 250V, rDS(ON) = 0.046 * UIS Rated * Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) - Rated to 300K RAD (Si) * Single Event - Safe Operating Area Curve for Single Event Effects - SEE Immunity for LET of 36MeV/mg/cm2 with VDS up to 100% of Rated Breakdown and VGS of 10V Off-Bias * Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IAS * Photo Current - 21nA Per-RAD (Si)/s Typically * Neutron - Maintain Pre-RAD Specifications for 1E13 Neutrons/cm2 - Usable to 1E14 Neutrons/cm2 Symbol D G S Packaging SMD2 Reliability screening is available as either TXV or Space equivalent of MIL-S-19500. Formerly available as type TA45217W. Ordering Information RAD LEVEL 10K SCREENING LEVEL PART NUMBER/BRAND Engineering Samples FSPYC264D1 100K TXV FSPYC264R3 100K Space FSPYC264R4 300K TXV FSPYC264F3 300K Space FSPYC264F4 (c)2001 Fairchild Semiconductor Corporation FSPYC264R, FSPYC264F Rev. A2 FSPYC264R, FSPYC264F Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified FSPYC264R, FSPYC264F UNITS Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 250 V Drain to Gate Voltage (RGS = 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 250 V TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 45 A TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 29 A Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 160 A Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS 30 V TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT 208 W TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT 83 W Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.67 W/ oC A Continuous Drain Current Maximum Power Dissipation Single Pulsed Avalanche Current, L = 100H (See Test Figure). . . . . . . . . . . . . . . . . . . . . . . . . IAS 85 Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS 45 A Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM 160 A Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (Distance >0.063in (1.6mm) from Case, 10s Max) 300 oC 3.3(Typical) g Weight (Typical) CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS Drain to Source Breakdown Voltage BVDSS ID = 1mA, VGS = 0V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 1mA Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On-State Voltage Drain to Source On Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge IDSS IGSS VDS(ON) rDS(ON)12 td(ON) tr td(OFF) VDS = 200V, VGS = 0V VGS = 30V Gate Charge Source Qgs Gate Charge Drain Qgd UNITS - - V - - 5.5 V TC = 25oC 2.0 - 4.5 V TC = 125oC 1.0 - - V TC = 25oC TC = 125oC TC = 25oC TC = 125oC - - 25 A - - 250 A - - 100 nA - - 200 nA - - 2.21 V TC = 25oC - 0.040 0.046 TC = 125oC VDD = 125V, ID = 45A, RL = 2.8, VGS = 12V, RGS = 2.35 VGS = 0V to 12V MAX 250 tf Qg(12) TYP TC = -55oC VGS = 12V, ID = 45A ID = 29A, VGS = 12V MIN 125V < VDD < 200 VID = 45A - - 0.087 - - 35 ns - - 70 ns - - 70 ns - - 15 ns - 115 140 nC - 35 45 nC - 35 45 nC Gate Charge at 20V Qg(20) VGS = 0V to 20V - 195 - nC Threshold Gate Charge Qg(TH) VGS = 0V to 2V - 12 - nC Plateau Voltage V(PLATEAU) Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Thermal Resistance Junction to Case (c)2001 Fairchild Semiconductor Corporation RJC ID = 45A, VDS = 15V - 7 - V VDS = 25V, VGS = 0V, f = 1MHz - 6100 - pF - 875 - pF - 35 - pF 0.60 oC/W - - FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F Source to Drain Diode Specifications PARAMETER SYMBOL Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge MIN TYP MAX ISD = 45A TEST CONDITIONS - - 1.2 V ISD = 45A, dISD/dt = 100A/s - - 590 ns - 6.8 - C QRR TC = 25oC, Unless Otherwise Specified Electrical Specifications up to 300K RAD MIN PARAMETER UNITS SYMBOL TEST CONDITIONS MAX MIN 100K RAD MAX 300K RAD UNITS Drain to Source Breakdown Volts (Note 3) BV DSS VGS = 0, ID = 1mA 250 - 250 - V Gate to Source Threshold Volts (Note 3) VGS(TH) VGS = VDS, ID = 1mA 2.0 4.5 1.5 4.5 V Gate to Body Leakage (Notes 2, 3) IGSS VGS = 30V, VDS = 0V - 100 - 100 nA Zero Gate Leakage (Note 3) IDSS VGS = 0, VDS = 200V - 25 - 50 A Drain to Source On-State Volts (Notes 1, 3) VDS(ON) VGS = 12V, ID = 45A - 2.21 Drain to Source On Resistance (Notes 1, 3) rDS(ON)12 VGS = 12V, ID = 29A - 0.046 - 2.70 V 0.055 NOTES: 1. Pulse test, 300s Max. 2. Absolute value. 3. Insitu Gamma bias must be sampled for both V GS = 12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS . Single Event Effects (SEB, SEGR) Note 4 ENVIRONMENT (NOTE 5) TEST Single Event Effects Safe Operating Area TYPICAL RANGE () APPLIED VGS BIAS (V) (NOTE 7) MAXIMUM VDS BIAS (V) 37 36 -10 250 37 36 -15 200 60 32 -2 200 60 32 -8 150 82 28 0 150 82 28 -5 100 SYMBOL (NOTE 6) TYPICAL LET (MeV/mg/cm) SEESOA NOTES: 4. 5. 6. 7. Testing conducted at Brookhaven National Labs or Texas A&M. Fluence = 1E5 ions/cm2 (typical), T = 25oC. Ion Species: LET = 37, Br or Kr; LET = 60, I or Xe; LET = 82, Au. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR). Performance Curves Unless Otherwise Specified LET = 37MeV/mg/cm2, RANGE = 36 LET = 60MeV/mg/cm2, RANGE = 32 LET = 82MeV/mg/cm2, RANGE = 28 280 LET = 37 BROMINE FLUENCE = 1E5 IONS/cm2 (TYPICAL) 280 240 TEMP = 25oC 240 200 VDS (V) VDS (V) 200 160 120 160 120 80 80 40 40 0 0 LET = 82 GOLD LET = 60 IODINE 0 -4 -8 -12 -16 -20 VGS (V) FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA (c)2001 Fairchild Semiconductor Corporation 0 -5 -10 -15 -20 -25 -30 VGS (V) FIGURE 2. TYPICAL SEE SIGNATURE CURVE FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F Performance Curves Unless Otherwise Specified (Continued) 50 1E-4 40 ILM = 10A ID , DRAIN (A) LIMITING INDUCTANCE (HENRY) 1E-3 30A 1E-5 100A 300A 30 20 1E-6 10 1E-7 10 100 30 0 -50 1000 300 0 50 150 100 TC , CASE TEMPERATURE (oC) DRAIN SUPPLY (V) FIGURE 3. TYPICAL DRAIN INDUCTANCE REQUIRED TO LIMIT GAMMA DOT CURRENT TO I AS FIGURE 4. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE 500 TC = 25oC ID , DRAIN CURRENT (A) 100 12V QG 10 100s QGS QGD 1ms 1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 0.1 1 VG 10ms 10 100 1000 VDS , DRAIN TO SOURCE VOLTAGE (V) CHARGE FIGURE 5. FORWARD BIAS SAFE OPERATING AREA FIGURE 6. BASIC GATE CHARGE WAVEFORM 2.5 200 ID, DRAIN TO SOURCE CURRENT (A) PULSE DURATION = 250ms, VGS = 12V, ID = 29A NORMALIZED rDS(ON) 2.0 1.5 1.0 0.5 0.0 -80 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 7. TYPICAL NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE (c)2001 Fairchild Semiconductor Corporation DESCENDING ORDER VGS VGS VGS VGS VGS 160 120 = 14V = 12V = 10V = 8V = 6V 80 VGS = 6 VOLTS 40 0 0 2 4 6 8 10 12 14 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 8. TYPICAL OUTPUT CHARACTERISTICS FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F NORMALIZED THERMAL RESPONSE (ZqJC) Performance Curves Unless Otherwise Specified (Continued) 101 100 0.5 10-1 0.2 0.1 0.05 0.02 0.01 SINGLE PULSE 10-2 PDM NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-3 10-5 10-4 10-3 10-2 10-1 t1 t2 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 9. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE I AS , AVALANCHE CURRENT (A) 300 STARTING TJ = 25oC 100 STARTING TJ = 150oC 10 IF R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) IF R 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 1 0.001 0.01 0.1 1 10 tAV, TIME IN AVALANCHE (ms) FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING Test Circuits and Waveforms ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDS L BVDSS + CURRENT I TRANSFORMER AS tP - VARY tP TO OBTAIN REQUIRED PEAK I AS VDD DUT tP VDD + 50 VGS 20V 0V VDS I AS 50V-150V 50 tAV FIGURE 11. UNCLAMPED ENERGY TEST CIRCUIT (c)2001 Fairchild Semiconductor Corporation FIGURE 12. UNCLAMPED ENERGY WAVEFORMS FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F Test Circuits and Waveforms (Continued) tON VDD tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% VDS VGS = 12V 10% DUT 10% 0V 90% R GS 50% VGS 50% PULSE WIDTH 10% FIGURE 13. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 14. RESISTIVE SWITCHING WAVEFORMS Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified PARAMETER Gate to Source Leakage Current SYMBOL IGSS Zero Gate Voltage Drain Current IDSS TEST CONDITIONS VGS = 30V MAX 20 (Note 7) 25 (Note 7) VDS = 80% Rated Value Drain to Source On Resistance rDS(ON) TC = 25oC at Rated ID Gate Threshold Voltage VGS(TH) ID = 1.0mA UNITS nA A 20% (Note 8) 20% (Note 8) V NOTES: 8. Or 100% of Initial Reading (whichever is greater). 9. Of Initial Reading. Screening Information TEST Unclamped Inductive Switching JANTXV EQUIVALENT VGS(PEAK) = 20V, L = 0.1mH; Limit = 85A JANS EQUIVALENT VGS(PEAK) = 20V, L = 0.1mH; Limit = 85A Thermal Response tH = 10ms; VH = 25V; IH = 4A; LIMIT = 55mV tH = 10ms; VH = 25V; IH = 4A; LIMIT = 55mV Gate Stress VGS = 45V, t = 250s VGS = 45V, t = 250s Pind Optional Required Pre Burn-In Tests (Note 9) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) Steady State Gate Bias (Gate Stress) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours Interim Electrical Tests (Note 9) All Delta Parameters Listed in the Delta Tests and Limits Table All Delta Parameters Listed in the Delta Tests and Limits Table Steady State Reverse Bias (Drain Stress) MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 160 hours MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 240 hours PDA 10% 5% Final Electrical Tests (Note 9) MIL-S-19500, Group A, Subgroup 2 MIL-S-19500, Group A, Subgroups 2 and 3 NOTE: 10. Test limits are identical pre and post burn-in. Additional Tests PARAMETER Safe Operating Area Thermal Impedance (c)2001 Fairchild Semiconductor Corporation SYMBOL SOA TEST CONDITIONS VDS = 200V, t = 10ms MAX 1.0 UNITS A VSD tH = 500ms; V H =20V; IH = 4A HEAT SINK REQUIRED 115 mV FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F Rad Hard Data Packages - Fairchild Power Transistors TXV Equivalent Class S - Equivalents 1. RAD HARD TXV EQUIVALENT - STANDARD DATA PACKAGE 1. RAD HARD "S" EQUIVALENT - STANDARD DATA PACKAGE A. Certificate of Compliance A. Certificate of Compliance B. Assembly Flow Chart B. Serialization Records C. Preconditioning - Attributes Data Sheet C. Assembly Flow Chart D. Group A - Attributes Data Sheet D. SEM Photos and Report E. Group B - Attributes Data Sheet F. Group C - Attributes Data Sheet G. Group D - Attributes Data Sheet E. Preconditioning - Attributes Data Sheet - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data 2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA PACKAGE A. Certificate of Compliance B. Assembly Flow Chart C. Preconditioning - Attributes Data Sheet - Pre and Post Burn-In Read and Record Data D. Group A - Attributes Data Sheet E. Group B - Attributes Data Sheet - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup B3) - Bond Strength Data (Subgroup B3) - Pre and Post High Temperature Operating Life Read and Record Data (Subgroup B6) F. Group C - Attributes Data Sheet - Pre and Post Read and Record Data for Intermittent Operating Life (Subgroup C6) - Bond Strength Data (Subgroup C6) G. Group D - Attributes Data Sheet - Pre and Post RAD Read and Record Data F. Group A G. Group B - Attributes Data Sheet H. Group C - Attributes Data Sheet I. Group D - Attributes Data Sheet 2. RAD HARD MAX. "S" EQUIVALENT - OPTIONAL DATA PACKAGE A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - X-Ray and X-Ray Report F. Group A - Attributes Data Sheet - Subgroups A2, A3, A4, A5 and A7 Data G. Group B - Attributes Data Sheet - Subgroups B1, B3, B4, B5 and B6 Data H. Group C - Attributes Data Sheet - Subgroups C1, C2, C3 and C6 Data I. Group D (c)2001 Fairchild Semiconductor Corporation - Attributes Data Sheet - Attributes Data Sheet - Pre and Post Radiation Data FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F SMD2 3 PAD CERAMIC LEADLESS CHIP CARRIER INCHES E D MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.130 0.142 3.30 3.60 3 b 0.135 0.145 3.43 3.68 - D 0.520 0.530 13.20 13.46 - D1 0.435 0.445 11.05 11.30 - D2 0.115 0.125 2.92 3.17 - E 0.685 0.695 17.40 17.65 - E1 0.470 0.480 11.94 12.19 - E2 0.152 0.162 3.86 4.11 - NOTES: A 1. No current JEDEC outline for this package. 2. Controlling dimension: INCH. 3. Measurement prior to pre-solder coating the mounting pads. E1 4. Revision 3 dated 5-00. E2 2 D1 D2 3 1 b 1 - GATE 2 - SOURCE 3 - DRAIN (c)2001 Fairchild Semiconductor Corporation FSPYC264R, FSPYC264F Rev. A1 FSPYC264R, FSPYC264F TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSigna FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM PowerTrenchTM QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER(R) SMART STARTTM Star* PowerTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM UltraFET(R) VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. (c)2001 Fairchild Semiconductor Corporation FSPYC264R, FSPYC264F Rev. A1