1
FN6298.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2011. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
5962-0620705, 5962-0620706,
5962-0620707, 5962-0620708
±15kV ESD Protected, +5.0V 1Microamp,
250kbps, RS-232 Transmitters/Receivers
The Intersil 5962-062070xQxA devices are 5.0V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications. Additionally, they provide ±15kV
ESD protection (IEC61000-4-2 Air Gap and MIL-STD 883
Human Body Model) on transmitter outputs and receiver
inputs (RS-232 pins). Targeted applications include
ruggedized portable products and remotely deployed
devices exposed to extreme temperature and humidity
where the low operational and even lower standby, power
consumption is critical. Efficient on-chip charge pumps,
coupled with manual and automatic power-down functions
(except for the 5962-0620707Q2A), reduce the standby
supply current to a 1µA trickle. Small footprint packaging and
the use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. This family is fully
compatible with 5.0V-only systems.
Specifications for QML devices are controlled by the
Defense Logistics Agency Land and Maritime (DLA). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-06207. A “hot-link” is provided
on our website for downloading.
Features
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 5V
• Electrically Screened to DLA SMD#5962-06207
• QML Qualified per MIL-PRF-38535 Requirements
• SMD Compliance
• Military Temperature Range
• Latch-up Free
• Hermetic Package
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Guaranteed Mouse Driveability (ICL3243E)
• Requires Single +5.0V ±10% Power Supply
• Receiver Hysteresis for Improved Noise Immunity
• Low Power Automatic Power-down Modes
(Except for ICL3232E) . . . . . . . . . . . . . . . . . . . . . . . . .1µA
• Guaranteed Minimum 250kbps Data Rate
• Manual and Automatic Power-down Features
• Multiple Drivers/Receivers
• On-Chip Voltage Converters Require Only Four External
Capacitors
• Regulated Dual Charge Pumps
Applications
• Any Military or High-Rel System Requiring RS-232
Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Ruggedized Handheld GPS, Laptop Computers,
Notebooks, Palmtops
- Industrial Control/Shop Floor Communications
- Field Deployed Sensors/Devices Exposed to Extreme
Temperature/Humidity
- Ruggedized Cellular/Mobile Phones
Ordering Information
DESC P/N CONFIGURATION TEMP (°C) PACKAGE
5962-0620705Q3A ICL3243E 3D/5R -55 to +125 28 Ld CLCC
5962-0620706Q3A ICL3238E 5D/3R -55 to +125 28 Ld CLCC
5962-0620707Q2A ICL3232E 2D/2R -55 to +125 20 Ld CLCC
5962-0620708Q2A ICL3221E 1D/1R -55 to +125 20 Ld CLCC
Data Sheet November 3, 2011
2FN6298.1
November 3, 2011
Pinouts
ICL3221E (CLCC)
TOP VIEW
ICL3232E (CLCC)
TOP VIEW
ICL3243E (CLCC)
TOP VIEW
ICL3238E (CLCC)
TOP VIEW
EN
C1+
C1-
C2+
C2-
V-
R1IN
R1OUT
FORCEOFF
GND
T1OUT
NC
FORCEON
INVALID
VCC
T1IN
3
4
5
6
7
9101112
220119
8
15
14
18
17
16
13
NC
NC
NC
V+
C1+
V+
C1-
C2+
C2-
V-
T2OUT
R2IN
VCC
T1OUT
R1IN
R1OUT
T1IN
R2OUT
GND
T2IN
3
4
5
6
7
9101112
220119
8
15
14
18
17
16
13
NC
NC
NC
NC
23
24
25
22
21
20
19
11
3 2 14
14 15 16 17 1812 13
28 27 26
10
5
6
7
8
9
R1 IN
V-
C2-
C1+
V+
VCC
C2+
T3 IN
T2 IN
T1 IN
R4 OUT
R3 OUT
R2 OUT
R5 OUT
R1 OUT
R2OUTB
INVALID
FORCEON
C1-
GND
FORCEOFF
T3 OUT
T2 OUT
T1 OUT
R4 IN
R3 IN
R2 IN
R5 IN
23
24
25
22
21
20
19
11
3 2 14
14 15 16 17 1812 13
28 27 26
10
5
6
7
8
9
V-
GND
C1+
V+
VCC
C2+
T5 IN
T4 IN
T3 IN
R3 OUT
R2 OUT
R1 OUT
R1OUTB
INVALID
FORCEON
FORCEOFF
T3 OUT
T2 OUT
T1 OUT
R1 IN
R3 IN
R2 IN
C2-
T4 OUT
T5 OUT
T2 IN
T1 IN
C1-
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
3FN6298.1
November 3, 2011
Pin Descriptions
PIN FUNCTION
VCC System power supply input (4.5V to 5.5V).
V+ Internally generated positive transmitter supply.
V- Internally generated negative transmitter supply.
GND Ground connection.
C1+ External capacitor (voltage doubler) is connected to this lead.
C1- External capacitor (voltage doubler) is connected to this lead.
C2+ External capacitor (voltage inverter) is connected to this lead.
C2- External capacitor (voltage inverter) is connected to this lead.
TIN TTL/CMOS compatible transmitter Inputs. (Note 1)
TOUT ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
RIN ±15kV ESD Protected, RS-232 compatible receiver inputs.
ROUT TTL/CMOS level receiver outputs.
ROUTB TTL/CMOS level, noninverting, always enabled receiver outputs.
INVALID Active low output that indicates if no valid RS-232 levels are present on any receiver input.
EN Active low receiver enable control.
FORCEOFF Active low control to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON
(See Tables 1 & 2, Note 1).
FORCEON Active high input to override automatic power-down circuitry thereby keeping transmitters active. (FORCEOFF must be high,
Note 1).
NOTE:
1. The ICL3238E input pins incorporate positive feedback resistors. Once the input is driven to a valid logic level, the feedback resistor maintains
that logic level until VCC is removed. Unused transmitter inputs may be left unconnected by the user.
TABLE 1. POWER-DOWN LOGIC TRUTH TABLE
RCVR OR
XMTR
EDGE
WITHIN 30
SEC?
FORCEOFF
INPUT
FORCEON
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS
ROUTB
OUTPUT
RS-232
LEVEL
PRESENT
AT
RECEIVER
INPUT?
INVALID
OUTPUT MODE OF OPERATION
ICL3238E
No H H Active Active Active No L Normal Operation (Enhanced
Auto Power-down Disabled)
No H H Active Active Active Yes H
Yes H L Active Active Active No L Normal Operation (Enhanced
Auto Power-down Enabled)
Yes H L Active Active Active Yes H
No H L High-Z Active Active No L Power-down Due to Enhanced
Auto Power-down Logic
No H L High-Z Active Active Yes H
X L X High-Z High-Z Active No L Manual Power-down
X L X High-Z High-Z Active Yes H
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
4FN6298.1
November 3, 2011
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWER-DOWN)
X Note 2 Note 2 Active Active Active Yes H Normal Operation
X Note 2 Note 2 High-Z High-Z Active No L Forced Auto Power-down
NOTE:
2. Input is connected to INVALID Output.
TABLE 1. POWER-DOWN LOGIC TRUTH TABLE (Continued)
RCVR OR
XMTR
EDGE
WITHIN 30
SEC?
FORCEOFF
INPUT
FORCEON
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS
ROUTB
OUTPUT
RS-232
LEVEL
PRESENT
AT
RECEIVER
INPUT?
INVALID
OUTPUT MODE OF OPERATION
TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE
RS-232
SIGNAL
PRESENT
AT
RECEIVER
INPUT?
FORCEOFF
INPUT
FORCEON
INPUT
EN
INPUT
TRANSMITTER
OUTPUTS
RECEIVER
OUTPUTS
(NOTE 3)
ROUTB
OUTPUTS
INVALID
OUTPUT MODE OF OPERATION
ICL3221E
No H H L Active Active N.A. L Normal Operation
(Auto Power-down Disabled)
No H H H Active High-Z N.A. L
Yes H L L Active Active N.A. H Normal Operation
(Auto Power-down Enabled)
Yes H L H Active High-Z N.A. H
No H L L High-Z Active N.A. L Power-down Due to Auto Power-down
Logic
No H L H High-Z High-Z N.A. L
Yes L X L High-Z Active N.A. H Manual Power-down
Yes L X H High-Z High-Z N.A. H Manual Power-down w/Rcvr. Disabled
No L X L High-Z Active N.A. L Manual Power-down
No L X H High-Z High-Z N.A. L Manual Power-down w/Rcvr. Disabled
ICL3243E
No H H N.A. Active Active Active L Normal Operation
(Auto Power-down Disabled)
Yes H L N.A. Active Active Active H Normal Operation
(Auto Power-down Enabled)
No H L N.A. High-Z Active Active L Power-down Due to Auto Power-down
Logic
Yes L X N.A. High-Z High-Z Active H Manual Power-down
No L X N.A. High-Z High-Z Active L Manual Power-down
NOTE:
3. Applies only to the ICL3243E.
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
5FN6298.1
November 3, 2011
Absolute Maximum Ratings Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON, EN . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT
, INVALID . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating (Receiver Input and Transmitter Output Pins) . . .±15kV
Thermal Resistance (Typical) θJA (°C/W)
20 Ld CLCC Package . . . . . . . . . . . . . . . . . . . . . . . 90
28 Ld CLCC Package . . . . . . . . . . . . . . . . . . . . . . . 70
Maximum Junction Temperature (Ceramic Package) . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
Operating Conditions
Temperature Range
ICL32XXE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications ICL3221E, ICL3232E, ICL3243E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF; Unless
Otherwise Specified. Typicals are at TA = 25°C, VCC = 5.0V
PARAMETER TEST CONDITIONS
TEMP
(°C) MIN TYP MAX UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Power-down
All RIN Open, FORCEON = GND, FORCEOFF =V
CC
(ICL3221E, ICL3243E Only)
Full - 1 10 μA
Supply Current, Power-down FORCEOFF = GND (Except ICL3232E) Full - 1 10 μA
Supply Current, Power-up All Outputs Unloaded, FORCEON = FORCEOFF =V
CC Full - 0.3 1.8 mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low TIN, FORCEON, FORCEOFF, EN Full - - 0.8 V
Input Logic Threshold High TIN, FORCEON, FORCEOFF, EN Full 2.2 - - V
Input Leakage Current TIN, FORCEON, FORCEOFF, EN Full - ±0.01 ±10 μA
Output Leakage Current
(Except ICL3232E)
FORCEOFF =GND or EN=V
CC Full - ±0.05 ±10 μA
Output Voltage Low IOUT = 1.6mA Full - - 0.4 V
Output Voltage High IOUT = -1.0mA Full VCC -0.9 VCC -0.3 - V
AUTOMATIC POWER-DOWN (ICL3221E, ICL3243E Only, FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
Enable Transmitters
Powers Up Full -2.7 - 2.7 V
Receiver Input Thresholds to
Disable Transmitters
Powers Down Full -0.3 - 0.3 V
INVALID Output Voltage Low IOUT = 1.6mA Full - - 0.4 V
INVALID Output Voltage High IOUT = -1.0mA Full VCC-0.9 - - V
RECEIVER INPUTS
Input Voltage Range Full -25 - 25 V
Input Threshold Low Full 0.6 1.2 - V
Input Threshold High Full - 1.5 2.4 V
Input Resistance Full 3 5 7 kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing All Transmitter Outputs Loaded with 3kW to Ground Full ±5.0 ±5.4 - V
Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω
Output Short-Circuit Current Full - ±35 ±60 mA
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
6FN6298.1
November 3, 2011
Output Leakage Current VOUT = ±12V, VCC = 0V or 4.5V to 5.5V
(ICL3232E,VCC = 0V only)
Automatic Power-down or FORCEOFF =GND
Full - - ±25 μA
MOUSE DRIVEABILITY (ICL3243 Only)
Transmitter Output Voltage T1IN =T2
IN =GND, T3
IN =V
CC, T3OUT Loaded with 3kW to
GND, T1OUT and T2OUT Loaded with 2.5mA Each
Full ±5 - - V
TIMING CHARACTERISTICS
Maximum Data Rate RL=3kW, C
L= 1000pF, One Transmitter Switching Full 250 500 - kbps
Transmitter Skew tPHL - tPLH Full - 200 1000 ns
Receiver Skew tPHL - tPLH Full - 100 1000 ns
Transition Region Slew Rate VCC =5.0V,
RL= 3kW to 7kW,
Measured From 3V to -3V or -3V
to 3V
CL = 200pF to 2500pF Full 4 8.0 50 V/μs
CL = 200pF to 1000pF Full 6 - 50 V/μs
ESD PERFORMANCE
RS-232 Pins (TOUT
, RIN) Human Body Model (MIL-STD 883 Method 3015) 25 - ±15 - kV
IEC61000-4-2 Contact Discharge 25 - ±8 - kV
IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV
All Other Pins Human Body Model (MIL-STD 883 Method 3015) 25 - ±2 - kV
Electrical Specifications ICL3221E, ICL3232E, ICL3243E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF; Unless
Otherwise Specified. Typicals are at TA = 25°C, VCC = 5.0V (Continued)
PARAMETER TEST CONDITIONS
TEMP
(°C) MIN TYP MAX UNITS
Electrical Specifications ICL3238E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF, Unless Otherwise Specified.
Typicals are at TA = 25°C, VCC = 5.0V
PARAMETER TEST CONDITIONS
TEMP
(°C) MIN TYP MAX UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Power-down
All RIN Open, FORCEON = GND, FORCEOFF = VCC Full - 1 10 μA
Supply Current, Power-down FORCEOFF = GND Full - 1 10 μA
Supply Current, Power-up All Outputs Unloaded, FORCEON = FORCEOFF = VCC Full - 0.3 1.8 mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low TIN, FORCEON, FORCEOFF Wake up Threshold Full - - 0.8 V
Input Logic Threshold High TIN, FORCEON, FORCEOFF Wake up Threshold Full 2.4 - - V
Input Leakage Current TIN, FORCEON, FORCEOFF, VIN = 0V or VCC (Note 4) Full - ±0.01 ±10 µA
Output Leakage Current FORCEOFF = GND Full - ±0.05 ±10 µA
Output Voltage Low IOUT = 1.0mA Full - - 0.4 V
Output Voltage High IOUT = -1.0mA Full VCC -0.9 VCC -0.3 - V
RECEIVER INPUTS
Input Voltage Range Full -25 - 25 V
Input Threshold Low Full 0.8 1.5 - V
Input Threshold High Full - 1.8 2.4 V
Input Resistance Full357kΩ
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
7
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6298.1
November 3, 2011
Die Characteristics
INTERFACE MATERIALS:
Glassivation:
Type: PSG (Phosphorous Silicon Glass)
Thickness: 13.0kÅ ± 1.0kÅ
Top Metallization:
Type: AlSiCu
Thickness: 10.0kÅ ± 1kÅ
ASSEMBLY RELATED INFORMATION:
Substrate Potential:
GND
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2.0 x 105 A/cm2
Transistor Count:
ICL3221E: 286
ICL3232E: 296
ICL3243E: 464
ICL3238E: 1235
Process:
Si Gate CMOS
ENHANCED AUTOMATIC POWER-DOWN (FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
INVALID High
Powered Up Full -2.7 - 2.7 V
Receiver Input Thresholds to
INVALID Low
Powered Down Full -0.3 - 0.3 V
INVALID Output Voltage Low IOUT = 1.0mA Full - - 0.4 V
INVALID Output Voltage High IOUT = -1.0mA Full VCC-0.9 - - V
TRANSMITTER OUTPUTS
Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V
Output Short-Circuit Current Full - ±35 ±60 mA
Output Leakage Current VOUT = ±12V, VCC = 0V or 4.5V to 5.5V,
Automatic Power-down or FORCEOFF = GND
Full - - ±25 µA
TIMING CHARACTERISTICS
Maximum Data Rate RL = 3kΩ, CL = 1000pF, One Transmitter Switching Full 250 500 - kbps
Transmitter Skew tPHL - tPLH Full - 200 1000 ns
Receiver Skew tPHL - tPLH Full - 100 1000 ns
Transition Region Slew Rate VCC = 5.0V,
RL = 3kΩ to 7kΩ,
Measured From 3V to -3V or -3V
to 3V
CL = 150pF to 1000pF Full 6 15 50 V/µs
CL = 150pF to 2500pF Full 4 12 50 V/µs
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN) IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV
IEC61000-4-2 Contact Discharge 25 - ±8-kV
Human Body Model (MIL-STD 883 Method 3015) 25 - ±15 - kV
All Other Pins Human Body Model (MIL-STD 883 Method 3015) 25 - ±2.5 - kV
NOTE:
4. These inputs utilize a positive feedback resistor. The input current is negligible when the input is at either supply rail.
Electrical Specifications ICL3238E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF, Unless Otherwise Specified.
Typicals are at TA = 25°C, VCC = 5.0V (Continued) (Continued)
PARAMETER TEST CONDITIONS
TEMP
(°C) MIN TYP MAX UNITS
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8FN6298.1
November 3, 2011
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
Ceramic Leadless Chip Carrier Packages (CLCC)
D
j x 45o
D3
B
h x 45o
AA1
E
LL3
e
B3
L1
D2
D1
e1
E2
E1
L2
PLANE 2
PLANE 1
E3
B2
0.010 E HS S
0.010 E F
SS
-E-
0.007 E FM S HS
B1
-H-
-F-
J28.A MIL-STD-1835 CQCC1-N28 (C-4)
28 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.060 0.100 1.52 2.54 6, 7
A1 0.050 0.088 1.27 2.23 -
B-----
B1 0.022 0.028 0.56 0.71 2, 4
B2 0.072 REF 1.83 REF -
B3 0.006 0.022 0.15 0.56 -
D 0.442 0.460 11.23 11.68 -
D1 0.300 BSC 7.62 BSC -
D2 0.150 BSC 3.81 BSC -
D3 - 0.460 - 11.68 2
E 0.442 0.460 11.23 11.68 -
E1 0.300 BSC 7.62 BSC -
E2 0.150 BSC 3.81 BSC -
E3 - 0.460 - 11.68 2
e 0.050 BSC 1.27 BSC -
e1 0.015 - 0.38 - 2
h 0.040 REF 1.02 REF 5
j 0.020 REF 0.51 REF 5
L 0.045 0.055 1.14 1.40 -
L1 0.045 0.055 1.14 1.40 -
L2 0.075 0.095 1.90 2.41 -
L3 0.003 0.015 0.08 0.038 -
ND 7 7 3
NE 7 7 3
N28 283
Rev. 0 5/18/94
NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.38mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
4. The required plane 1 terminals and optional plane 2 terminals (if
used) shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Dimension “A” controls the overall package thickness. The maxi-
mum “A” dimension is package height before being solder dipped.
8. Dimensioning and tolerancing per ANSI Y14.5M-1982.
9. Controlling dimension: INCH.
9FN6298.1
November 3, 2011
5962-0620705, 5962-0620706, 5962-0620707, 5962-0620708
Ceramic Leadless Chip Carrier Packages (CLCC)
D
j x 45o
D3
B
h x 45o
AA1
E
LL3
e
B3
L1
D2
D1
e1
E2
E1
L2
PLANE 2
PLANE 1
E3
B2
0.010 E HS S
0.010 E F
SS
-E-
0.007 E FM S HS
B1
-H-
-F-
J20.A MIL-STD-1835 CQCC1-N20 (C-2)
20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.060 0.100 1.52 2.54 6, 7
A1 0.050 0.088 1.27 2.23 -
B-----
B1 0.022 0.028 0.56 0.71 2, 4
B2 0.072 REF 1.83 REF -
B3 0.006 0.022 0.15 0.56 -
D 0.342 0.358 8.69 9.09 -
D1 0.200 BSC 5.08 BSC -
D2 0.100 BSC 2.54 BSC -
D3 -0.358-9.092
E 0.342 0.358 8.69 9.09 -
E1 0.200 BSC 5.08 BSC -
E2 0.100 BSC 2.54 BSC -
E3 -0.358-9.092
e 0.050 BSC 1.27 BSC -
e1 0.015 - 0.38 - 2
h 0.040 REF 1.02 REF 5
j 0.020 REF 0.51 REF 5
L 0.045 0.055 1.14 1.40 -
L1 0.045 0.055 1.14 1.40 -
L2 0.075 0.095 1.91 2.41 -
L3 0.003 0.015 0.08 0.38 -
ND 5 5 3
NE 5 5 3
N20 203
Rev. 0 5/18/94
NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.38mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
4. The required plane 1 terminals and optional plane 2 terminals (if
used) shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Dimension “A” controls the overall package thickness. The maxi-
mum “A” dimension is package height before being solder dipped.
8. Dimensioning and tolerancing per ANSI Y14.5M-1982.
9. Controlling dimension: INCH.
