LF356H - NATIONAL SEMICONDUCTOR

LF155,LF156,LF256,LF257,LF355,LF356,

LF357

LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers

Literature Number: SNOSBH0B

LF155/LF156/LF256/LF257/LF355/LF356/LF357

JFET Input Operational Amplifiers

General Description

These are the first monolithic JFET input operational ampli-

fiers to incorporate well matched, high voltage JFETs on the

same chip with standard bipolar transistors (BI-FET™Tech-

nology). These amplifiers feature low input bias and offset

currents/low offset voltage and offset voltage drift, coupled

with offset adjust which does not degrade drift or

common-mode rejection. The devices are also designed for

high slew rate, wide bandwidth, extremely fast settling time,

low voltage and current noise and a low 1/f noise corner.

Features

Advantages

nReplace expensive hybrid and module FET op amps

nRugged JFETs allow blow-out free handling compared

with MOSFET input devices

nExcellent for low noise applications using either high or

low source impedance—very low 1/f corner

nOffset adjust does not degrade drift or common-mode

rejection as in most monolithic amplifiers

nNew output stage allows use of large capacitive loads

(5,000 pF) without stability problems

nInternal compensation and large differential input voltage

capability

Applications

nPrecision high speed integrators

nFast D/A and A/D converters

nHigh impedance buffers

nWideband, low noise, low drift amplifiers

nLogarithmic amplifiers

nPhotocell amplifiers

nSample and Hold circuits

Common Features

nLow input bias current: 30pA

nLow Input Offset Current: 3pA

nHigh input impedance: 10

Ω

nLow input noise current:

nHigh common-mode rejection ratio: 100 dB

nLarge dc voltage gain: 106 dB

Uncommon Features

LF155/

LF355 LF156/

LF256/

LF356

LF257/

LF357

=5)

Units

jExtremely

fast settling

time to

0.01%

4 1.5 1.5 µs

jFast slew

rate 5 12 50 V/µs

jWide gain

bandwidth 2.5 5 20 MHz

jLow input

noise

voltage

20 12 12

Simplified Schematic

00564601

*3pF in LF357 series.

BI-FET™, BI-FET II™are trademarks of National Semiconductor Corporation.

December 2001

LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, contact the National Semiconductor Sales Office/Distributors for

availability and specifications.

LF155/6 LF256/7/LF356B LF355/6/7

Supply Voltage ±22V ±22V ±18V

Differential Input Voltage ±40V ±40V ±30V

Input Voltage Range (Note 2) ±20V ±20V ±16V

Output Short Circuit Duration Continuous Continuous Continuous

JMAX

H-Package 150˚C 115˚C 115˚C

N-Package 100˚C 100˚C

M-Package 100˚C 100˚C

Power Dissipation at T

= 25˚C (Notes

1, 8)

H-Package (Still Air) 560 mW 400 mW 400 mW

H-Package (400 LF/Min Air Flow) 1200 mW 1000 mW 1000 mW

N-Package 670 mW 670 mW

M-Package 380 mW 380 mW

Thermal Resistance (Typical) θ

H-Package (Still Air) 160˚C/W 160˚C/W 160˚C/W

H-Package (400 LF/Min Air Flow) 65˚C/W 65˚C/W 65˚C/W

N-Package 130˚C/W 130˚C/W

M-Package 195˚C/W 195˚C/W

(Typical) θ

H-Package 23˚C/W 23˚C/W 23˚C/W

Storage Temperature Range −65˚C to +150˚C −65˚C to +150˚C −65˚C to +150˚C

Soldering Information (Lead Temp.)

Metal Can Package

Soldering (10 sec.) 300˚C 300˚C 300˚C

Dual-In-Line Package

Soldering (10 sec.) 260˚C 260˚C 260˚C

Small Outline Package

Vapor Phase (60 sec.) 215˚C 215˚C

Infrared (15 sec.) 220˚C 220˚C

See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of

soldering surface mount devices.

ESD tolerance

(100 pF discharged through 1.5kΩ) 1000V 1000V 1000V

DC Electrical Characteristics

(Note 3)

Symbol Parameter Conditions LF155/6 LF256/7

LF356B LF355/6/7 Units

Min Typ Max Min Typ Max Min Typ Max

Input Offset Voltage R

=50Ω,T

=25˚C 3 5 3 5 3 10 mV

Over Temperature 7 6.5 13 mV

∆V

/∆T Average TC of Input

Offset Voltage R

=50Ω5 5 5 µV/˚C

∆TC/∆V

Change in Average TC

with V

Adjust R

=50Ω, (Note 4) 0.5 0.5 0.5 µV/˚C

per mV

Input Offset Current T

=25˚C, (Notes 3, 5) 3 20 3 20 3 50 pA

≤T

HIGH

20 1 2 nA

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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DC Electrical Characteristics (Continued)

(Note 3)

Symbol Parameter Conditions LF155/6 LF256/7

LF356B LF355/6/7 Units

Min Typ Max Min Typ Max Min Typ Max

Input Bias Current T

=25˚C, (Notes 3, 5) 30 100 30 100 30 200 pA

≤T

HIGH

50 5 8 nA

Input Resistance T

=25˚C 10

Ω

VOL

Large Signal Voltage

Gain V

=±15V, T

=25˚C 50 200 50 200 25 200 V/mV

=±10V, R

=2k

Over Temperature 25 25 15 V/mV

Output Voltage Swing V

=±15V, R

=10k ±12 ±13 ±12 ±13 ±12 ±13 V

=±15V, R

=2k ±10 ±12 ±10 ±12 ±10 ±12 V

Input Common-Mode

Voltage Range V

=±15V ±11 +15.1 ±11 ±15.1 +10 +15.1 V

−12 −12 −12 V

CMRR Common-Mode

Rejection Ratio 85 100 85 100 80 100 dB

PSRR Supply Voltage

Rejection Ratio (Note 6) 85 100 85 100 80 100 dB

DC Electrical Characteristics

= 25˚C, V

=±15V

Parameter LF155 LF355 LF156/256/257/356B LF356 LF357 Units

Typ Max Typ Max Typ Max Typ Max Typ Max

Supply

Current 2424 5 7 510510mA

AC Electrical Characteristics

= 25˚C, V

=±15V

Symbol Parameter Conditions LF155/355 LF156/256/

356B LF156/256/356/

LF356B LF257/357 Units

Typ Min Typ Typ

SR Slew Rate LF155/6:

=1, 5 7.5 12 V/µs

LF357: A

=5 50 V/µs

GBW Gain Bandwidth Product 2.5 5 20 MHz

Settling Time to 0.01% (Note 7) 4 1.5 1.5 µs

Equivalent Input Noise

Voltage R

=100Ω

f=100 Hz 25 15 15

f=1000 Hz 20 12 12

Equivalent Input Current

Noise f=100 Hz 0.01 0.01 0.01

f=1000 Hz 0.01 0.01 0.01

Input Capacitance 3 3 3 pF

Notes for Electrical Characteristics

Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature,

TA. The maximum available power dissipation at any temperature is PD=(TJMAX−TA)/θJA or the 25˚C PdMAX, whichever is less.

Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.

Note 3: Unless otherwise stated, these test conditions apply:

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Notes for Electrical Characteristics (Continued)

LF155/156 LF256/257 LF356B LF355/6/7

Supply Voltage, V

±15V ≤V

≤±20V ±15V ≤V

±20V V

=±15V

−55˚C ≤T

≤+125˚C −25˚C ≤T

≤+85˚C 0˚C ≤T

≤+70˚C 0˚C ≤T

≤+70˚C

HIGH

+125˚C +85˚C +70˚C +70˚C

and VOS,I

Band IOS are measured at VCM =0.

Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5µV/˚C typically) for each mV of adjustment from its original

unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment.

Note 5: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, TJ. Due to limited

production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient

temperature as a result of internal power dissipation, Pd. TJ=T

A+θ

JA Pd where θJA is the thermal resistance from junction to ambient. Use of a heat sink is

recommended if input bias current is to be kept to a minimum.

Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.

Note 7: Settling time is defined here, for a unity gain inverter connection using 2 kΩresistors for the LF155/6. It is the time required for the error voltage (the voltage

at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF357, AV= −5,

the feedback resistor from output to input is 2kΩand the output step is 10V (See Settling Time Test Circuit).

Note 8: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside

guaranteed limits.

Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise

specified.

Input Bias Current Input Bias Current

00564637 00564638

Input Bias Current Voltage Swing

00564639 00564640

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise

specified. (Continued)

Supply Current Supply Current

00564641 00564642

Negative Current Limit Positive Current Limit

00564643 00564644

Positive Common-Mode

Input Voltage Limit Negative Common-Mode

Input Voltage Limit

00564645 00564646

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical DC Performance Characteristics Curves are for LF155 and LF156 unless otherwise

specified. (Continued)

Open Loop Voltage Gain Output Voltage Swing

00564647 00564648

Typical AC Performance Characteristics

Gain Bandwidth Gain Bandwidth

00564649 00564650

Normalized Slew Rate Output Impedance

00564651 00564652

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical AC Performance Characteristics (Continued)

Output Impedance LF155 Small Signal Pulse Response, A

=+1

00564653

00564605

LF156 Small Signal Pulse Response, A

= +1 LF155 Large Signal Pulse Response, A

=+1

00564606 00564608

LF156 Large Signal Puls

Response, A

= +1 Inverter Settling Time

00564609

00564655

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical AC Performance Characteristics (Continued)

Inverter Settling Time Open Loop Frequency Response

00564656 00564657

Bode Plot Bode Plot

00564658 00564659

Bode Plot Common-Mode Rejection Ratio

00564660 00564661

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical AC Performance Characteristics (Continued)

Power Supply Rejection Ratio Power Supply Rejection Ratio

00564662 00564663

Undistorted Output Voltage Swing Equivalent Input Noise Voltage

00564664

00564665

Equivalent Input Noise

Voltage (Expanded Scale)

00564666

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Detailed Schematic

00564613

*C = 3pF in LF357 series.

Connection Diagrams (Top Views)

Metal Can Package (H)

00564614

Order Number LF155H, LF156H, LF256H, LF257H,

LF356BH, LF356H, or LF357H

See NS Package Number H08C

*Available per JM38510/11401 or JM38510/11402

Dual-In-Line Package (M and N)

00564629

Order Number LF356M, LF356MX, LF355N, or LF356N

See NS Package Number M08A or N08E

Application Hints

These are op amps with JFET input devices. These JFETs

have large reverse breakdown voltages from gate to source

and drain eliminating the need for clamps across the inputs.

Therefore large differential input voltages can easily be ac-

commodated without a large increase in input current. The

maximum differential input voltage is independent of the

supply voltages. However, neither of the input voltages

should be allowed to exceed the negative supply as this will

cause large currents to flow which can result in a destroyed

unit.

Exceeding the negative common-mode limit on either input

will force the output to a high state, potentially causing a

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Application Hints (Continued)

reversal of phase to the output. Exceeding the negative

common-mode limit on both inputs will force the amplifier

output to a high state. In neither case does a latch occur

since raising the input back within the common-mode range

again puts the input stage and thus the amplifier in a normal

operating mode.

Exceeding the positive common-mode limit on a single input

will not change the phase of the output however, if both

inputs exceed the limit, the output of the amplifier will be

forced to a high state.

These amplifiers will operate with the common-mode input

voltage equal to the positive supply. In fact, the

common-mode voltage can exceed the positive supply by

approximately 100 mV independent of supply voltage and

over the full operating temperature range. The positive sup-

ply can therefore be used as a reference on an input as, for

example, in a supply current monitor and/or limiter.

Precautions should be taken to ensure that the power supply

for the integrated circuit never becomes reversed in polarity

or that the unit is not inadvertently installed backwards in a

socket as an unlimited current surge through the resulting

forward diode within the IC could cause fusing of the internal

conductors and result in a destroyed unit.

All of the bias currents in these amplifiers are set by FET

current sources. The drain currents for the amplifiers are

therefore essentially independent of supply voltage.

As with most amplifiers, care should be taken with lead

dress, component placement and supply decoupling in order

to ensure stability. For example, resistors from the output to

an input should be placed with the body close to the input to

minimize “pickup” and maximize the frequency of the feed-

back pole by minimizing the capacitance from the input to

ground.

A feedback pole is created when the feedback around any

amplifier is resistive. The parallel resistance and capacitance

from the input of the device (usually the inverting input) toAC

ground set the frequency of the pole. In many instances the

frequency of this pole is much greater than the expected 3dB

frequency of the closed loop gain and consequently there is

negligible effect on stability margin. However, if the feedback

pole is less than approximately six times the expected 3 dB

frequency a lead capacitor should be placed from the output

to the input of the op amp. The value of the added capacitor

should be such that the RC time constant of this capacitor

and the resistance it parallels is greater than or equal to the

original feedback pole time constant.

Typical Circuit Connections

Adjustment

00564667

•V

is adjusted with a 25k potentiometer

•The potentiometer wiper is connected to V

•For potentiometers with temperature coefficient of 100

ppm/˚C or less the additional drift with adjust is ≈0.5µV/

˚C/mV of adjustment

•Typical overall drift: 5µV/˚C ±(0.5µV/˚C/mV of adj.)

Driving Capacitive Loads

00564668

*LF155/6 R = 5k

LF357 R = 1.25k

Due to a unique output stage design, these amplifiers

have the ability to drive large capacitive loads and still

maintain stability. C

L(MAX)

.0.01µF.

Overshoot ≤20%

Settling time (t

).5µs

LF357. A Large Power BW Amplifier

00564615

For distortion ≤1% and a 20 Vp-p VOUT swing, power bandwidth is:

500kHz.

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications

Settling Time Test Circuit

00564616

•Settling time is tested with the LF155/6 connected as unity gain inverter and LF357 connected for A

=−5

•FET used to isolate the probe capacitance

•Output = 10V step

•A

= −5 for LF357

Large Signal Inverter Output, V

OUT

(from Settling Time Circuit)

LF355

00564617

LF356

00564618

LF357

00564619

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

Low Drift Adjustable Voltage Reference

00564620

•∆V

OUT

/∆T=±

0.002%/˚C

•All resistors and potentiometers should be wire-wound

•P1: drift adjust

•P2: V

OUT

adjust

•Use LF155 for

jLow I

jLow drift

jLow supply current

Fast Logarithmic Converter

00564621

•Dynamic range: 100µA ≤I

≤1mA (5 decades), |V

| = 1V/decade

•Transient response: 3µs for ∆I

= 1 decade

•C1, C2, R2, R3: added dynamic compensation

•V

adjust the LF156 to minimize quiescent error

•R

: Tel Labs type Q81 + 0.3%/˚C

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

Precision Current Monitor

00564631

•V

= 5 R1/R2 (V/mA of I

)

•R1, R2, R3: 0.1% resistors

•Use LF155 for

jCommon-mode range to supply range

jLow I

jLow V

jLow Supply Current

8-Bit D/A Converter with Symmetrical Offset Binary Operation

00564632

•R1, R2 should be matched within ±0.05%

•Full-scale response time: 3µs

B1 B2 B3 B4 B5 B6 B7 B8 Comments

+9.920 11111111 Positive Full-Scale

+0.040 10000000 (+)Zero-Scale

−0.040 01111111 (−)Zero-Scale

−9.920 00000000Negative Full-Scale

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

Wide BW Low Noise, Low Drift Amplifier

00564670

•Parasitic input capacitance C1 .(3pF for LF155, LF156 and LF357 plus any additional layout capacitance) interacts with

feedback elements and creates undesirable high frequency pole. To compensate add C2 such that: R2 C2 .R1 C1.

Boosting the LF156 with a Current Amplifier

00564673

•I

OUT(MAX)

.150mA (will drive R

≥100Ω)

•No additional phase shift added by the current amplifier

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

3 Decades VCO

00564624

R1, R4 matched. Linearity 0.1% over 2 decades.

Isolating Large Capacitive Loads

00564622

•Overshoot 6%

•t

10µs

•When driving large C

, the V

OUT

slew rate determined by C

and I

OUT(MAX)

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

Low Drift Peak Detector

00564623

•By adding D1 and R

=0 during hold mode. Leakage of D2 provided by feedback path through R

•Leakage of circuit is essentially I

(LF155, LF156) plus capacitor leakage of Cp.

•Diode D3 clamps V

OUT

(A1) to V

−V

to improve speed and to limit reverse bias of D2.

•Maximum input frequency should be <<

⁄

πR

where C

is the shunt capacitance of D2.

Non-Inverting Unity Gain Operation for LF157

00564675

Inverting Unity Gain for LF157

00564625

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

High Impedance, Low Drift Instrumentation Amplifier

00564626

•System V

adjusted via A2 V

adjust

•Trim R3 to boost up CMRR to 120 dB. Instrumentation amplifier resistor array recommended for best accuracy and lowest drift

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

Fast Sample and Hold

00564633

•Both amplifiers (A1, A2) have feedback loops individually closed with stable responses (overshoot negligible)

•Acquisition time T

, estimated by:

•LF156 develops full S

output capability for V

≥1V

•Addition of SW2 improves accuracy by putting the voltage drop across SW1 inside the feedback loop

•Overall accuracy of system determined by the accuracy of both amplifiers, A1 and A2

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

High Accuracy Sample and Hold

00564627

•By closing the loop through A2, the V

OUT

accuracy will be determined uniquely by A1.

No V

adjust required for A2.

•T

can be estimated by same considerations as previously but, because of the added

propagation delay in the feedback loop (A2) the overshoot is not negligible.

•Overall system slower than fast sample and hold

•R1, C

: additional compensation

•Use LF156 for

jFast settling time

jLow V

High Q Band Pass Filter

00564628

•By adding positive feedback (R2)

•Q increases to 40

•f

= 100 kHz

•Clean layout recommended

•Response to a 1Vp-p tone burst: 300µs

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Typical Applications (Continued)

High Q Notch Filter

00564634

•2R1=R=10MΩ

2C = C1 = 300pF

•Capacitors should be matched to obtain high Q

•f

NOTCH

= 120 Hz, notch = −55 dB, Q >100

•Use LF155 for

jLow I

jLow supply current

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Physical Dimensions inches (millimeters) unless otherwise noted

Metal Can Package (H)

Order Number LF155H, LF156H, LF256H, LF257H, LF356BH, LF356H or LF357H

NS Package Number H08C

Small Outline Package (M)

Order Number LF356M or LF356MX

NS Package Number M08A

LF155/LF156/LF256/LF257/LF355/LF356/LF357

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Molded Dual-In-Line Package (N)

Order Number LF356N

NS Package Number N08E

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COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

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into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

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Email: support@nsc.com

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LF155/LF156/LF256/LF257/LF355/LF356/LF357 JFET Input Operational Amplifiers

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps

DLP®Products www.dlp.com Energy and Lighting www.ti.com/energy

DSP dsp.ti.com Industrial www.ti.com/industrial

Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical

Interface interface.ti.com Security www.ti.com/security

Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community Home Page e2e.ti.com

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