Description
The CXK77B3611AGB-5/6 is a high speed 1M bit
Bi-CMOS synchronous static RAM organized as
32768 words by 36 bits. This SRAM integrates input
registers, high speed SRAM and write buffer onto a
single monolithic IC and features the delayed write
system to reduce the dead cycles.
Features
•Fast cycle time (Cycle) (Frequency)
CXK77B3611AGB-5 5ns 200MHz
-6 6ns 167MHz
•Inputs and outputs are GTL/HSTL compatible
•Controlled Impedance Driver
•Single 3.3V power supply: 3.3V±0.15V
•Byte-write possible
•OE asynchronization
•JTAG test circuit
•Package 119TBGA
•4 kinds of synchronous operation mode
Register-Register mode (R-R mode)
Register-Flow Thru mode (R-F mode)
Register-Latch mode (R-L mode)
Dual clock mode (D-C mode)
Function
32768 word x 36bit High Speed Bi-CMOS Synchronous SRAM
Structure
Silicon gate Bi-CMOS IC
– 1 –
CXK77B3611AGB-5/6
119 pin BGA (Plastic)
PE96812
High Speed Bi-CMOS Synchronous Static RAM
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Preliminary
For the availability of this product, please contact the sales office.
– 2 –
CXK77B3611AGB
Block Diagram
15 Input
Reg.
Write
Store
Reg.
2:1
Mux Add.
Write
pulse
Dout
Din
32K × 36 2:1
Mux Output
latch
Reg.
Read
Comp.
Reg.
S
Reg.
W
Reg.
BW 4
a to d
M1
M2
G
Mode
Control
Self
Time
Write
Logic
DQ
A0 to 14
K/K
C/C
Output
Clock
– 3 –
CXK77B3611AGB
Pin Configuration (Top View)
VDDQ
NC
NC
DQc
DQc
VDDQ
DQc
DQc
VDDQ
DQd
DQd
VDDQ
DQd
DQd
NC
NC
VDDQ
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
A
NC
A
DQc
DQc
DQc
DQc
DQc
VDD
DQd
DQd
DQd
DQd
DQd
A
NC
TMS
A
NC
A
VSS
VSS
VSS
BWc
VSS
VREF
VSS
BWd
VSS
VSS
VSS
M1
A
TDI
NC
NC
VDD
ZQ
S
G
C
C
VDD
K
K
W
A
A
VDD
A
TCK
A
NC
A
VSS
VSS
VSS
BWb
VSS
VREF
VSS
BWa
VSS
VSS
VSS
M2
A
TDO
A
NC
A
DQb
DQb
DQb
DQb
DQb
VDD
DQa
DQa
DQa
DQa
DQa
A
NC
NC
VDDQ
NC
NC
DQb
DQb
VDDQ
DQb
DQb
VDDQ
DQa
DQa
VDDQ
DQa
DQa
NC
ZZ
VDDQ
1234567
Pin Description
A
DQx
K
K
C
C
VREF
W
Address Input
Data I/O in byte
(a to d)
Positive Clock
Negative Clock
Output Positive Clock(∗)
Output Negative
Clock(∗)
Input Reference
Write Enable
BWX
S
G
ZZ
TCK
TMS
TDI
TDO
Byte Write Enable
(a to d)
Chip Select
Asyn Output Enable
Sleep Mode Select
JTAG Clock
JTAG Mode Select
JTAG Data In
JTAG Data Out
VDD
VDDQ
VSS
M1, M2
ZQ
NC
+3.3V power supply
Output power supply
Ground
Mode Select
Output Impedance
Control
No Connect
Symbol Description Symbol Description Symbol Description
(∗) These pins should be tied to VDD or VSS except D-C mode.
– 4 –
CXK77B3611AGB
Package Outline Unit: mm
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE STRUCTURE
PACKAGE MATERIAL
BOARD MATERIAL
TERMINAL MATERIAL
PACKAGE WEIGHT
EPOXY RESIN
COPPER-CLAD LAMINATE
SOLDER
0.8g
119 TERMINAL BGA (PLASTIC)
BGA-119P-01
0.15 C
DETAIL X
0.35 C
C
0.6 ± 0.1
19.5
0.6 ± 0.1
1.5
1.27
0.84
3.19 1.27
7.62
φ0.75 ± 0.15
20.32
1 2 3 4 5 6 7
U
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
φ0.3 CAB
φ0.1
3-C1.0
14.0
11.5 A
B
0.10
× 4
4-C0.6
C1.5
22.0
X
