1. General description
74HC1G66 and 74HCT1G66 are high-speed Si-gate CMOS devices. They are single-pole
single-throw analog switches. The switch has two input/output pins (Yand Z) and an
active HIGH enable input pin (E). When pin E is LOW, the analog switch is turned off.
The non-standard output currents are equal to those of the 74HC4066 and 74HCT4066.
2. Features
nWide supply voltage range from 2.0 V to 10.0 V for the 74HC1G66
nVery low ON resistance:
u45 Ω (typ.) at VCC = 4.5 V
u30 Ω (typ.) at VCC = 6.0 V
u25 Ω (typ.) at VCC = 9.0 V
nHigh noise immunity
nLow power dissipation
nMultiple package options
nESD protection:
uHBM JESD22-A114E exceeds 2000 V
uMM JESD22-A115-A exceeds 200 V
nSpecified from −40 °Cto+85°C and −40 °C to +125 °C
3. Ordering information
74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
Rev. 04 — 19 December 2008 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC1G66GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;
5 leads; body width 1.25 mm SOT353-1
74HCT1G66GW
74HC1G66GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753
74HCT1G66GV
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 2 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
4. Marking
5. Functional diagram
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 2. Marking codes
Type number Marking
74HC1G66GW HL
74HCT1G66GW TL
74HC1G66GV H66
74HCT1G66GV T66
Fig 1. Logic symbol Fig 2. Logic diagram
001aag487
E
ZY
001aah372
E
YZ
Fig 3. Pin configuration SOT353-1 and SOT753
74HC1G66
74HCT1G66
YV
CC
Z
GND E
001aaf185
1
2
3
5
4
Table 3. Pin description
Symbol Pin Description
Y 1 independent input or output
Z 2 independent input or output
GND 3 ground (0 V)
E 4 enable input (active HIGH)
VCC 5 supply voltage
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 3 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
[1] To avoid drawing VCC current out of pin Z, when switch current flows in pin Y, the voltage drop across the bidirectional switch must not
exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of terminal Y. In this case there is no limit for the voltage
drop across the switch, but the voltage at pins Yand Z may not exceed VCC or GND.
Table 4. Function table[1]
Input E Switch
L OFF
HON
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage −0.5 +11.0 V
IIK input clamping current VI < −0.5 V or VI>V
CC + 0.5 V [1] -±20 mA
ISK switch clamping current VI < −0.5 V or VI >V
CC + 0.5 V [1] -±20 mA
ISW switch current VSW > −0.5 V or VSW < VCC + 0.5 V - ±25 mA
ICC supply current - 50 mA
IGND ground current −50 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125 °C[2] - 250 mW
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
[1]
Symbol Parameter Conditions 74HC1G66 74HCT1G66 Unit
Min Typ Max Min Typ Max
VCC supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V
VIinput voltage 0 - VCC 0-V
CC V
VSW switch voltage 0 - VCC 0-V
CC V
Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C
∆t/∆V input transition rise
and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
VCC = 10.0 V - - 35 - - - ns/V
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 4 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
10. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions −40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ[1] Max Min Max
74HC1G66
VIH HIGH-level input
voltage VCC = 2.0 V 1.5 1.2 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - V
VCC = 9.0 V 6.3 4.7 - 6.3 - V
VIL LOW-level input
voltage VCC = 2.0 V - 0.8 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 V
VCC = 9.0 V - 4.3 2.7 - 2.7 V
IIinput leakage
current E; VI=V
CC or GND
VCC = 6.0 V - 0.1 1.0 - 1.0 µA
VCC = 10.0 V - 0.2 2.0 - 2.0 µA
IS(OFF) OFF-state leakage
current Y or Z; VCC = 10 V; see Figure 4 - 0.1 1.0 - 1.0 µA
IS(ON) ON-state leakage
current Y or Z; VCC = 10 V; see Figure 5 - 0.1 1.0 - 1.0 µA
ICC supply current E, Y or Z; VI =V
CC or GND;
VSW = GND or VCC
VCC = 6.0 V - 1.0 10 - 20 µA
VCC = 10.0 V - 2.0 20 - 40 µA
CIinput capacitance - 1.5 - - - pF
CS(ON) ON-state
capacitance -8- - -pF
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 5 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
[1] Typical values are measured at Tamb =25°C.
10.1 Test circuits
74HCT1G66
VIH HIGH-level input
voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - V
VIL LOW-level input
voltage VCC = 4.5 V to 5.5 V 0.1 1.2 0.8 - 0.8 V
IIinput leakage
current E; VI=V
CC or GND; VCC = 5.5 V - 0.1 1.0 - 1.0 µA
IS(OFF) OFF-state leakage
current Y or Z; VCC = 5.5 V; see Figure 4 - 0.1 1.0 - 1.0 µA
IS(ON) ON-state leakage
current Y or Z; VCC = 5.5 V; see Figure 5 - 0.1 1.0 - 1.0 µA
ICC supply current E, Y or Z; VI =V
CC or GND;
VSW = GND or VCC;
VCC = 4.5 V to 5.5 V
- 1 10 - 20 µA
∆ICC additional supply
current VI=V
CC −2.1 V; VCC = 4.5 V to 5.5 V;
IO = 0 A - - 500 - 850 µA
CIinput capacitance - 1.5 - - - pF
CS(ON) ON-state
capacitance -8- - -pF
Table 7. Static characteristics
…continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions −40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ[1] Max Min Max
VI = VCC or GND and VO = GND or VCC.V
I = VCC or GND and VO = open circuit.
Fig 4. Test circuit for measuring OFF-state
leakage current Fig 5. Test circuit for measuring ON-state
leakage current
001aag488
IS
IS
VI
VIL
VO
VCC
GND
YZ
E
001aag489
IS
VI
VIH
VO
VCC
GND
YZ
E
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 6 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
10.2 ON resistance
[1] At supply voltages approaching 2 V, the ON resistance becomes extremely non-linear. Therefore it is recommended that these devices
be used to transmit digital signals only, when using this supply voltage.
[2] Typical values are measured at Tamb =25°C.
Table 8. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graph see Figure 7.
Symbol Parameter Conditions −40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ[2] Max Min Max
74HC1G66[1]
RON(peak) ON resistance
(peak) VI= GND to VCC; see Figure 6
ISW = 0.1 mA; VCC = 2.0 V - - - - - Ω
ISW = 1 mA; VCC = 4.5 V - 42 118 - 142 Ω
ISW = 1 mA; VCC = 6.0 V - 31 105 - 126 Ω
ISW = 1 mA; VCC = 9.0 V - 23 88 - 105 Ω
RON(rail) ON resistance (rail) VI = GND; see Figure 6
ISW = 0.1 mA; VCC = 2.0 V - 75 - - - Ω
ISW = 1 mA; VCC = 4.5 V - 29 95 - 115 Ω
ISW = 1 mA; VCC = 6.0 V - 23 82 - 100 Ω
ISW = 1 mA; VCC = 9.0 V - 18 70 - 80 Ω
VI =V
CC; see Figure 6
ISW = 0.1 mA; VCC = 2.0 V - 75 - - - Ω
ISW = 1 mA; VCC = 4.5 V - 35 106 - 128 Ω
ISW = 1 mA; VCC = 6.0 V - 27 94 - 113 Ω
ISW = 1 mA; VCC = 9.0 V - 21 78 - 95 Ω
74HCT1G66
RON(peak) ON resistance
(peak) VI= GND to VCC; see Figure 6
ISW = 1 mA; VCC = 4.5 V - 42 118 - 142 Ω
RON(rail) ON resistance (rail) VI= GND; see Figure 6
ISW = 1 mA; VCC = 4.5 V - 29 95 - 115 Ω
VI=V
CC; see Figure 6
ISW = 1 mA; VCC = 4.5 V - 35 106 - 128 Ω
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 7 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
10.3 ON resistance test circuit and graphs
11. Dynamic characteristics
RON =V
SW / ISW.T
amb =25°C.
Fig 6. Test circuit for measuring ON resistance Fig 7. Typical ON resistance as a function of
input voltage
001aag490
VI
VIH
VCC
GND
ZY
E
VSW
ISW
0468102VI (V)
80
40
20
60
0
mna081
RON
(Ω)
VCC = 4.5 V
6.0 V 9.0 V
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF; R
L
=1 k
Ω
, unless otherwise specified;
For test circuit see Figure 10.
Symbol Parameter Conditions −40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ[1] Max Min Max
74HC1G66
tpd propagation delay Y to Z or Z to Y; RL=∞Ω;
see Figure 8 [2]
VCC = 2.0 V - 8 75 - 90 ns
VCC = 4.5 V - 3 15 - 18 ns
VCC = 6.0 V - 2 13 - 15 ns
VCC = 9.0 V - 1 10 - 12 ns
ten enable time E to Y or Z; see Figure 9 [2]
VCC = 2.0 V - 50 125 - 150 ns
VCC = 4.5 V - 16 25 - 30 ns
VCC = 5.0 V; CL=15pF - 11 - - - ns
VCC = 6.0 V - 13 21 - 26 ns
VCC = 9.0 V - 9 16 - 20 ns
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 8 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
[1] All typical values are measured at Tamb =25°C.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] CPD is used to determine the dynamic power dissipation PD(µW).
PD=C
PD ×VCC2×fi+Σ((CL× CSW)×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
CSW = maximum switch capacitance in pF (see Table 7);
VCC = supply voltage in Volt;
Σ ((CL× CSW)× VCC2× fo) = sum of outputs.
tdis disable time E to Y or Z; see Figure 9 [2]
VCC = 2.0 V - 27 190 - 225 ns
VCC = 4.5 V - 16 38 - 45 ns
VCC = 5.0 V; CL=15pF - 11 - - - ns
VCC = 6.0 V - 14 33 - 38 ns
VCC = 9.0 V - 12 16 - 20 ns
CPD power dissipation
capacitance VI= GND to VCC [3] -9-- -pF
74HCT1G66
tpd propagation delay Y to Z or Z to Y; RL=∞Ω;
see Figure 8 [2]
VCC = 4.5 V - 3 15 - 18 ns
ten enable time E to Y or Z; see Figure 9 [2]
VCC = 4.5 V - 15 30 - 36 ns
VCC = 5.0 V; CL=15pF - 12 - - - ns
tdis disable time E to Y or Z; see Figure 9 [2]
VCC = 4.5 V - 13 44 - 53 ns
VCC = 5.0 V; CL=15pF - 12 - - - ns
CPD power dissipation
capacitance VI= GND to VCC −1.5 V [3] -9-- -pF
Table 9. Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); C
L
= 50 pF; R
L
=1 k
Ω
, unless otherwise specified;
For test circuit see Figure 10.
Symbol Parameter Conditions −40 °C to +85 °C−40 °C to +125 °C Unit
Min Typ[1] Max Min Max
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 9 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
11.1 Waveforms and test circuit
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. Input (Y or Z) to output (Z or Y) propagation delays
mna667
tPLH tPHL
VM
VM
Y or Z input
Z or Y output
GND
VI
VOH
VOL
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 9. Enable and disable times
mna668
tPLZ
tPHZ
switch
disabled switch
enabled
VY
VX
switch
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
E
Y or Z
Y or Z
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Table 10. Measurement points
Type Input Output
VMVMVXVY
74HC1G66 0.5VCC 0.5VCC VOL + 10% VOH −10%
74HCT1G66 1.3 V 1.3 V VOL + 10% VOH −10%
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 10 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
[1] There is no constraint on tr, tf with a 50% duty factor when measuring fmax.
11.2 Additional dynamic characteristics
Test data is given in Table 11.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 10. Test circuit for measuring switching times
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aad983
DUT
VCC VCC
VIVO
RT
RLS1
CL
open
G
Table 11. Test data
Type Input Load S1 position
VItr, tf[1] CLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC1G66 GND to VCC 6 ns 50 pF, 15 pF 1 kΩ,∞Ω open GND VCC
74HCT1G66 GND to 3 V 6 ns 50 pF, 15 pF 1 kΩ,∞Ω open GND VCC
Table 12. Additional dynamic characteristics for 74HC1G66 and 74HCT1G66
GND = 0 V; t
r
= t
f
= 6.0 ns; C
L
= 50 pF; unless otherwise specified. All typical values are measured at T
amb
=25
°
C.
Symbol Parameter Conditions Min Typ Max Unit
THD total harmonic
distortion fi= 1 kHz; RL= 10 kΩ; see Figure 11 %
VCC = 4.5 V; VI= 4.0 V (p-p) - 0.04 - %
VCC = 9.0 V; VI= 8.0 V (p-p) - 0.02 - %
fi= 10 kHz; RL= 10 kΩ; see Figure 11
VCC = 4.5 V; VI= 4.0 V (p-p) - 0.12 - %
VCC = 9.0 V; VI= 8.0 V (p-p) - 0.06 - %
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 11 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
11.3 Test circuits and graphs
f(−3dB) −3 dB frequency
response RL= 50 Ω; CL = 10 pF; see Figure 12 and 13
VCC = 4.5 V - 180 - MHz
VCC = 9.0 V - 200 - MHz
αiso isolation (OFF-state) RL= 600 Ω; fi= 1 MHz; see Figure 14 and 15
VCC = 4.5 V - −50 - dB
VCC = 9.0 V - −50 - dB
Table 12. Additional dynamic characteristics for 74HC1G66 and 74HCT1G66
…continued
GND = 0 V; t
r
= t
f
= 6.0 ns; C
L
= 50 pF; unless otherwise specified. All typical values are measured at T
amb
=25
°
C.
Symbol Parameter Conditions Min Typ Max Unit
Fig 11. Test circuit for measuring total harmonic distortion
10 µF
2RL
2RLCL
fi
VIH
VO
VCC VCC
E
D
Y/Z Z/Y
001aai678
With fi= 1 MHz adjust the switch input voltage for a 0 dBm level at the switch output, (0 dBm = 1 mW into 50 Ω). Then Increase
the input frequency until the dB meter reads −3dB
Fig 12. Test circuit for measuring the −3 dB frequency response
0.1 µF
2RL
2RLCL
fi
VIH
VO
VCC VCC
E
dB
Y/Z Z/Y
001aai680
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 12 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
Test conditions: VCC = 4.5 V; GND = 0 V; RL=50Ω;R
SOURCE =1kΩ.
Fig 13. Typical −3 dB frequency response
mna083
5
(dB)
−510 fi (kHz)
105106
104
102103
0
Adjust the switch input voltage for a 0 dBm level, (0 dBm = 1 mW into 600 Ω)
Fig 14. Test circuit for measuring isolation (OFF-state)
0.1 µF
2RL
2RL
CL
fi
VIL
VO
VCC VCC
E
dB
Y/Z Z/Y
001aai679
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 13 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
Test conditions: VCC = 4.5 V; GND = 0 V; RL=50Ω;R
SOURCE =1kΩ.
Fig 15. Typical isolation (OFF-state) as a function of frequency
mna082
−60
−40
−80
−20
0
(dB)
−10010 fi (kHz)
105106
104
102103
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 14 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
12. Package outline
Fig 16. Package outline SOT353-1 (TSSOP5)
UNIT A1
A
max. A2A3bpLHELpwyv
ceD(1) E(1) Z(1) θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.1
01.0
0.8 0.30
0.15 0.25
0.08 2.25
1.85 1.35
1.15 0.65
e1
1.3 2.25
2.0 0.60
0.15 7°
0°
0.1 0.10.30.425
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.46
0.21
SOT353-1 MO-203 SC-88A 00-09-01
03-02-19
wM
bp
D
Z
e
e1
0.15
13
54
θ
A
A2
A1
Lp
(A3)
detail X
L
HE
E
c
vMA
X
A
y
1.5 3 mm0
scale
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1
1.1
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 15 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
Fig 17. Package outline SOT753 (SC-74A)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
bp
D
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface-mounted package; 5 leads SOT753
UNIT A1bpcDEHELpQywv
mm 0.100
0.013 0.40
0.25 3.1
2.7
0.26
0.10 1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2 0.33
0.23
A
1.1
0.9
02-04-16
06-03-16
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 16 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
13. Abbreviations
14. Revision history
Table 13. Abbreviations
Acronym Description
CMOS Complementary Metal-Oxide Semiconductor
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
DUT Device Under Test
Table 14. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74HC_HCT1G66_4 20081219 Product data sheet - 74HC_HCT1G66_3
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Package SOT353 changed to SOT353-1 in Table 1 and Figure 16.
•Quick Reference Data and Soldering sections removed.
•Section 2 “Features” updated.
74HC_HCT1G66_3 20020515 Product specification - 74HC_HCT1G66_2
74HC_HCT1G66_2 20010302 Product specification - 74HC_HCT1G66_1
74HC_HCT1G66_1 19980803 Product specification - -
74HC_HCT1G66_4 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 04 — 19 December 2008 17 of 18
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74HC1G66; 74HCT1G66
Single-pole single-throw analog switch
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 December 2008
Document identifier: 74HC_HCT1G66_4
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
9 Recommended operating conditions. . . . . . . . 3
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
10.1 Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
10.2 ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6
10.3 ON resistance test circuit and graphs. . . . . . . . 7
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
11.1 Waveforms and test circuit . . . . . . . . . . . . . . . . 9
11.2 Additional dynamic characteristics . . . . . . . . . 10
11.3 Test circuits and graphs . . . . . . . . . . . . . . . . . 11
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
16 Contact information. . . . . . . . . . . . . . . . . . . . . 17
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
