LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 LMC7111 Tiny CMOS Operational Amplifier with Rail-to-Rail Input and Output Check for Samples: LMC7111 FEATURES DESCRIPTION * * * * * * * The LMC7111 is a micropower CMOS operational amplifier available in the space saving SOT-23 package. This makes the LMC7111 ideal for space and weight critical designs. The wide common-mode input range makes it easy to design battery monitoring circuits which sense signals above the V+ supply. The main benefits of the Tiny package are most apparent in small portable electronic devices, such as mobile phones, pagers, and portable computers. The tiny amplifiers can be placed on a board where they are needed, simplifying board layout. 1 2 * Tiny 5-Pin SOT-23 Package Saves Space Very Wide Common Mode Input Range Specified at 2.7V, 5V, and 10V Typical Supply Current 25 A at 5V 50 kHz Gain-Bandwidth at 5V Similar to Popular LMC6462 Output to Within 20 mV of Supply Rail at 100k Load Good Capacitive Load Drive APPLICATIONS * * * * * * Mobile Communications Portable Computing Current Sensing for Battery Chargers Voltage Reference Buffering Sensor Interface Stable Bias for GaAs RF Amps Connection Diagram Figure 1. 8-Pin PDIP Top View Figure 2. 5-Pin SOT-23 Top View Figure 3. Actual Size 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1999-2013, Texas Instruments Incorporated LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (3) (1) (2) SOT-23 Package 2000V PDIP Package 1500V Differential Input Voltage Supply Voltage (V+) + 0.3V, (V-) - 0.3V Voltage at Input/Output Pin + - Supply Voltage (V - V ) 11V Current at Input Pin Current at Output Pin 5 mA (4) 30 mA Current at Power Supply Pin 30 mA Lead Temp. (Soldering, 10 sec.) 260C -65C to +150C Storage Temperature Range Junction Temperature (1) (5) 150C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Human Body Model is 1.5 k in series with 100 pF. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature at 150C. The maximum power dissipation is a function of TJ(MAX), JA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/JA. All numbers apply for packages soldered directly into a PC board. (2) (3) (4) (5) Operating Ratings (1) 2.5V V+ 11V Supply Voltage -40C TJ +85C Junction Temperature Range LMC7111AI, LMC7111BI Thermal Resistance (JA) 8-Pin PDIP 115C/W 5-Pin SOT-23 325C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not specified. For ensured specifications and the test conditions, see the Electrical Characteristics. 2.7V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VOS Parameter Input Offset Voltage Conditions V+ = 2.7V Typ (1) 0.9 LMC7111AI Limit (2) LMC7111BI Limit (2) 3 7 mV 5 9 max TCVOS Input Offset Voltage Average Drift IB Input Bias Current See (3) 0.1 1 20 1 20 pA max IOS Input Offset Current See (3) 0.01 0.5 10 0.5 10 pA max RIN Input Resistance +PSRR Positive Power Supply Rejection Ratio 2.7V V+ 5.0V, V- = 0V, VO = 2.5V 60 55 50 55 50 dB min -PSRR Negative Power Supply Rejection Ratio -2.7V V- -5.0V, V- = 0V, VO = 2.5V 60 55 50 55 50 dB min (1) (2) (3) 2 2.0 Units V/C Tera >10 Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Bias Current specified by design and processing. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 2.7V DC Electrical Characteristics (continued) Unless otherwise specified, all limits specified for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VCM CIN Parameter Conditions Input Common-Mode Voltage Range V+ = 2.7V For CMRR 50 dB LMC7111AI Limit (2) LMC7111BI Limit (2) Units -0.10 0.0 0.40 0.0 0.40 V min 2.8 2.7 2.25 2.7 2.25 V max Typ Common-Mode Input Capacitance VO 3 + Output Swing V = 2.7V RL = 100 k Output Short Circuit Current AVOL IS Voltage Gain Supply Current pF 2.69 2.68 2.4 2.68 2.4 V min 0.01 0.02 0.08 0.02 0.08 V max 2.65 2.6 2.4 2.6 2.4 V min 0.03 0.1 0.3 0.1 0.3 V max Sourcing, VO = 0V 7 1 0.7 1 0.7 mA min Sinking, VO = 2.7V 7 1 0.7 1 0.7 mA min V+ = 2.7V RL = 10 k ISC (1) Sourcing 400 V/mv min Sinking 150 V/mv min V+ = +2.7V, VO = V+/2 20 45 60 50 65 A max 2.7V AC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter SR Slew Rate GBW Gain-Bandwidth Product (1) (2) (3) Conditions See (3) Typ (1) LMC7111AI Limit (2) LMC7111BI Limit (2) Units 0.015 V/s 40 kHz Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive and negative slew rates. Input referred, V+ = 2.7V and RL = 100 k connected to 1.35V. Amp excited with 1 kHz to produce VO = 1 VPP. 3V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 3V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VCM (1) (2) Parameter Input Common-Mode Voltage Range Conditions V+ = 3V For CMRR 50 dB LMC7111AI Limit (2) LMC7111BI Limit (2) Units -0.25 0.0 0.0 V min 3.2 3.0 2.8 3.0 2.8 V max Typ (1) Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 3 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com 3.3V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 3.3V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VCM (1) (2) Parameter Input Common-Mode Voltage Range Conditions V+ = 3.3V For CMRR 50 dB Typ (1) LMC7111AI Limit (2) LMC7111BI Limit (2) Units -0.25 -0.1 0.00 -0.1 0.00 V min 3.5 3.4 3.2 3.4 3.2 V max Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. 5V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 5V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions V+ = 5V VOS Input Offset Voltage TCVOS Input Offset Voltage Average Drift IB Input Bias Current IOS Input Offset Current RIN Input Resistance CMRR Common Mode Rejection Ratio 0V VCM 5V +PSRR Positive Power Supply Rejection Ratio -PSRR VCM 4 0.9 mV max 2.0 See (3) Units V/C pA max 0.01 0.5 10 0.5 10 pA max 85 70 60 dB min 5V V+ 10V, V- = 0V, VO = 2.5V 85 70 60 dB min Negative Power Supply Rejection Ratio -5V V- -10V, V- = 0V, VO = -2.5V 85 70 60 dB min Input Common-Mode Voltage Range V+ = 5V For CMRR 50 dB -0.3 -0.20 0.00 -0.20 0.00 V min 5.25 5.20 5.00 5.20 5.00 V max Output Swing (1) (2) (3) LMC7111BI Limit (2) 1 20 VO IS LMC7111AI Limit (2) 1 20 Common-Mode Input Capacitance Output Short Circuit Current AVOL (1) 0.1 CIN ISC Typ Voltage Gain Supply Current See (3) Tera >10 3 pF V+ = 5V RL = 100 k 4.99 4.98 4.98 Vmin 0.01 0.02 0.02 Vmax V+ = 5V RL = 10 k 4.98 4.9 4.9 Vmin 0.02 0.1 0.1 Vmin Sourcing, VO = 0V 7 5 3.5 5 3.5 mA min Sinking, VO = 3V 7 5 3.5 5 3.5 mA min Sourcing 500 V/mv min Sinking 200 V/mv min V+ = +5V, VO = V+/2 25 A max Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Bias Current specified by design and processing. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 5V AC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 5V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter Typ Positive Going Slew Rate (3) SR Slew Rate GBW Gain-Bandwidth Product (1) (2) (3) Conditions (1) 0.027 LMC7111AI Limit (2) LMC7111BI Limit (2) Units 0.015 0.010 V/s 50 kHz Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive slew rate. The negative slew rate is faster. Input referred, V+ = 5V and RL = 100 k connected to 1.5V. Amp excited with 1 kHz to produce VO = 1 VPP. 10V DC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 10V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions V+ = 10V Typ (1) LMC7111BI Limit (2) Units 3 5 7 9 mV max VOS Input Offset Voltage TCVOS Input Offset Voltage Average Drift 2.0 IB Input Bias Current 0.1 1 20 1 20 pA max IOS Input Offset Current 0.01 0.5 10 0.5 10 pA max RIN Input Resistance >10 Tera +PSRR Positive Power Supply Rejection Ratio 5V V+ 10V, V- = 0V, VO = 2.5V 80 dB min -PSRR Negative Power Supply Rejection Ratio -5V V- -10V, V- = 0V, VO = 2.5V 80 dB min VCM Input Common-Mode Voltage Range V+ = 10V For CMRR 50 dB -0.2 -0.15 0.00 -0.15 0.00 V min 10.2 10.15 10.00 10.15 10.00 V max CIN Common-Mode Input Capacitance ISC Output Short Circuit Current AVOL Voltage Gain 100 k Load 0.9 LMC7111AI Limit (2) V/C 3 (3) pF Sourcing, VO = 0V 30 20 7 20 7 mA min Sinking, VO = 10V 30 20 7 20 7 mA min Sourcing 500 V/mv min Sinking 200 V/mv min IS Supply Current V+ = +10V, VO = V+/2 25 50 65 60 75 VO Output Swing V+ = 10V RL = 100 k 9.99 9.98 9.98 Vmin 0.01 0.02 0.02 Vmax V+ = 10V RL = 10 k 9.98 9.9 9.9 Vmin 0.02 0.1 0.1 Vmin (1) (2) (3) A max Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Bias Current specified by design and processing. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 5 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com 10V AC Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 10V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions (3) LMC7111AI Limit (2) LMC7111BI Limit (2) Units SR Slew Rate 0.03 V/s GBW Gain-Bandwidth Product 50 kHz m Phase Margin 50 deg Gm Gain Margin 15 dB (1) (2) (3) 6 See Typ (1) Input-Referred Voltage Noise f = 1 kHz VCM = 1V 110 Input-Referred Current Noise f = 1 kHz 0.03 nV/ Hz pA/Hz Typical Values represent the most likely parametric norm. All limits are specified by testing or statistical analysis. Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive and negative slew rates. Input referred, V+ = 10V and RL = 100 k connected to 5V. Amp excited with 1 kHz to produce VO = 2 VPP. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 Typical Performance Characteristics TA = 25C unless specified, Single Supply Supply Current vs. Supply Voltage Voltage Noise vs. Frequency Figure 4. Figure 5. 2.7V Performance Offset Voltage vs. Common Mode Voltage @ 2.7V Sinking Output vs. Output Voltage Figure 6. Figure 7. Sourcing Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 2.7V Figure 8. Figure 9. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 7 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com 2.7V Performance (continued) Gain and Phase vs. Capacitive Load @ 2.7V Gain and Phase vs. Capacitive Load @ 2.7V Figure 10. Figure 11. 3V Performance 8 Voltage Noise vs. Common Mode Voltage @ 3V Output Voltage vs. Input Voltage @ 3V Figure 12. Figure 13. Offset Voltage vs. Common Mode Voltage @ 3V Sourcing Output vs. Output Voltage Figure 14. Figure 15. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 3V Performance (continued) Sinking Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 3V Figure 16. Figure 17. Gain and Phase vs. Capacitive Load @ 3V Gain and Phase vs. Capacitive Load @ 3V Figure 18. Figure 19. 5V Performance Voltage Noise vs. Common Mode Voltage @ 5V Output Voltage vs. Input Voltage @ 5V Figure 20. Figure 21. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 9 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com 5V Performance (continued) 10 Offset Voltage vs. Common Mode Voltage @ 5V Sourcing Output vs. Output Voltage Figure 22. Figure 23. Sinking Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 5V Figure 24. Figure 25. Gain and Phase vs. Capacitive Load @ 5V Gain and Phase vs. Capacitive Load @ 5V Figure 26. Figure 27. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 5V Performance (continued) Non-Inverting Small Signal Pulse Response at 5V Non-Inverting Small Signal Pulse Response at 5V Figure 28. Figure 29. Non-Inverting Small Signal Pulse Response at 5V Non-Inverting Large Signal Pulse Response at 5V Figure 30. Figure 31. Non-Inverting Large Signal Pulse Response at 5V Non-Inverting Large Signal Pulse Response at 5V Figure 32. Figure 33. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 11 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com 5V Performance (continued) 12 Inverting Small Signal Pulse Response at 5V Inverting Small Signal Pulse Response at 5V Figure 34. Figure 35. Inverting Small Signal Pulse Response at 5V Inverting Large Signal Pulse Response at 5V Figure 36. Figure 37. Inverting Large Signal Pulse Response at 5V Inverting Large Signal Pulse Response at 5V Figure 38. Figure 39. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 10V Performance Voltage Noise vs. Common Mode Voltage @ 10V Output Voltage vs. Input Voltage @ 10V Figure 40. Figure 41. Offset Voltage vs. Common Mode Voltage @ 10V Sourcing Output vs. Output Voltage Figure 42. Figure 43. Sinking Output vs. Output Voltage Gain and Phase vs. Capacitive Load @ 10V Figure 44. Figure 45. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 13 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com 10V Performance (continued) 14 Gain and Phase vs. Capacitive Load @ 10V Gain and Phase vs. Capacitive Load @ 10V Figure 46. Figure 47. Non-Inverting Small Signal Pulse Response at 10V Non-Inverting Large Signal Pulse Response at 10V Figure 48. Figure 49. Inverting Small Signal Pulse Response at 10V Inverting Large Signal Pulse Response at 10V Figure 50. Figure 51. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 APPLICATION INFORMATION BENEFITS OF THE LMC7111 TINY AMP Size The small footprint of the SOT-23 packaged Tiny amp, (0.120 x 0.118 inches, 3.05 x 3.00 mm) saves space on printed circuit boards, and enable the design of smaller electronic products. Because they are easier to carry, many customers prefer smaller and lighter products. Height The height (0.056 inches, 1.43 mm) of the Tiny amp makes it possible to use it in PCMCIA type III cards. Signal Integrity Signals can pick up noise between the signal source and the amplifier. By using a physically smaller amplifier package, the Tiny amp can be placed closer to the signal source, reducing noise pickup and increasing signal integrity. The Tiny amp can also be placed next to the signal destination, such as a buffer for the reference of an analog to digital converter. Simplified Board Layout The Tiny amp can simplify board layout in several ways. First, by placing an amp where amps are needed, instead of routing signals to a dual or quad device, long pc traces may be avoided. By using multiple Tiny amps instead of duals or quads, complex signal routing and possibly crosstalk can be reduced. DIPs available for prototyping LMC7111 amplifiers packaged in conventional 8-pin dip packages can be used for prototyping and evaluation without the need to use surface mounting in early project stages. Low Supply Current The typical 25 A supply current of the LMC7111 extends battery life in portable applications, and may allow the reduction of the size of batteries in some applications. Wide Voltage Range The LMC7111 is characterized at 2.7V, 3V, 3.3V, 5V and 10V. Performance data is provided at these popular voltages. This wide voltage range makes the LMC7111 a good choice for devices where the voltage may vary over the life of the batteries. INPUT COMMON MODE VOLTAGE RANGE The LMC7111 does not exhibit phase inversion when an input voltage exceeds the negative supply voltage. The absolute maximum input voltage is 300 mV beyond either rail at room temperature. Voltages greatly exceeding this maximum rating can cause excessive current to flow in or out of the input pins, adversely affecting reliability. Applications that exceed this rating must externally limit the maximum input current to 5 mA with an input resistor as shown in Figure 52. Figure 52. RI Input Current Protection for Voltages Exceeding the Supply Voltage Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 15 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 www.ti.com CAPACITIVE LOAD TOLERANCE The LMC7111 can typically directly drive a 300 pF load with VS = 10V at unity gain without oscillating. The unity gain follower is the most sensitive configuration. Direct capacitive loading reduces the phase margin of op-amps. The combination of the op-amp's output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 53. This simple technique is useful for isolating the capacitive input of multiplexers and A/D converters. Figure 53. Resistive Isolation of a 330 pF Capacitive Load COMPENSATING FOR INPUT CAPACITANCE WHEN USING LARGE VALUE FEEDBACK RESISTORS When using very large value feedback resistors, (usually > 500 k) the large feed back resistance can react with the input capacitance due to transducers, photodiodes, and circuit board parasitics to reduce phase margins. The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor (as in Figure 54), Cf is first estimated by: (1) or R1 CIN R2 Cf (2) which typically provides significant overcompensation. Printed circuit board stray capacitance may be larger or smaller than that of a breadboard, so the actual optimum value for CF may be different. The values of CF should be checked on the actual circuit. (Refer to the LMC660 quad CMOS amplifier data sheet for a more detailed discussion.) Figure 54. Cancelling the Effect of Input Capacitance OUTPUT SWING The output of the LMC7111 will go to within 100 mV of either power supply rail for a 10 k load and to 20 mV of the rail for a 100 k load. This makes the LMC7111 useful for driving transistors which are connected to the same power supply. By going very close to the supply, the LMC7111 can turn the transistors all the way on or all the way off. 16 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 BIASING GaAs RF AMPLIFIERS The capacitive load capability, low current draw, and small size of the SOT-23 LMC7111 make it a good choice for providing a stable negative bias to other integrated circuits. The very small size of the LMC7111 and the LM4040 reference take up very little board space. CF and Risolation prevent oscillations when driving capacitive loads. Figure 55. Stable Negative Bias REFERENCE BUFFER FOR A-TO-D CONVERTERS The LMC7111 can be used as a voltage reference buffer for analog-to-digital converters. This works best for Ato-D converters whose reference input is a static load, such as dual slope integrating A-to-Ds. Converters whose reference input is a dynamic load (the reference current changes with time) may need a faster device, such as the LMC7101 or the LMC7131. The small size of the LMC7111 allows it to be placed close to the reference input. The low supply current (25 A typical) saves power. For A-to-D reference inputs which require higher accuracy and lower offset voltage, please see the LMC6462 datasheet. The LMC6462 has performance similar to the LMC7111. The LMC6462 is available in two grades with reduced input voltage offset. DUAL AND QUAD DEVICES WITH SIMILAR PERFORMANCE The LMC6462 and LMC6464 are dual and quad devices with performance similar to the LMC7111. They are available in both conventional through-hole and surface mount packaging. Please see the LMC6462/4 datasheet for details. SPICE MACROMODEL A SPICE macromodel is available for the LMC7111. This model includes simulation of: * Input common-mode voltage range * Frequency and transient response Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 17 LMC7111 SNOS753E - AUGUST 1999 - REVISED MARCH 2013 * * www.ti.com Quiescent and dynamic supply current Output swing dependence on loading conditions and many more characteristics as listed on the macro model disk. Visit the LMC7111 product page on http://www.ti.com for the spice model. ADDITIONAL SOT-23 TINY DEVICES Additional parts are available in the space saving SOT-23 Tiny package, including amplifiers, voltage references, and voltage regulators. These devices include-- LMC7101 1 MHz gain-bandwidth rail-to-rail input and output amplifier--high input impedance and high gain, 700 A typical current 2.7V, 3V, 5V and 15V specifications. LM7131 Tiny Video amp with 70 MHz gain bandwidth. Specified at 3V, 5V and 5V supplies. LMC7211 Comparator in a tiny package with rail-to-rail input and push-pull output. Typical supply current of 7 A. Typical propagation delay of 7 s. Specified at 2.7V, 5V and 15V supplies. LMC7221 Comparator with an open drain output for use in mixed voltage systems. Similar to the LMC7211, except the output can be used with a pull-up resistor to a voltage different than the supply voltage. LP2980 Micropower SOT 50 mA Ultra Low-Dropout Regulator. LM4040 Precision micropower shunt voltage reference. Fixed voltages of 2.5000V, 4.096V, 5.000V, 8.192V and 10.000V. LM4041 Precision micropower shunt voltage reference 1.225V and adjustable. Visit http://www.ti.com for more information. 18 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 LMC7111 www.ti.com SNOS753E - AUGUST 1999 - REVISED MARCH 2013 REVISION HISTORY Changes from Revision D (March 2013) to Revision E * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 18 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7111 19 PACKAGE OPTION ADDENDUM www.ti.com 7-Feb-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LMC7111BIM5 NRND SOT-23 DBV 5 1000 Non-RoHS & Green Call TI Call TI -40 to 85 A01B LMC7111BIM5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A01B LMC7111BIM5X NRND SOT-23 DBV 5 3000 Non-RoHS & Green Call TI Call TI -40 to 85 A01B LMC7111BIM5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 A01B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LMC7111BIM5 SOT-23 DBV 5 1000 178.0 8.4 LMC7111BIM5/NOPB SOT-23 DBV 5 1000 178.0 LMC7111BIM5X SOT-23 DBV 5 3000 178.0 LMC7111BIM5X/NOPB SOT-23 DBV 5 3000 178.0 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMC7111BIM5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7111BIM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7111BIM5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7111BIM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 0.90 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. 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