HSMS-285x Series
Surface Mount Zero Bias Schottky Detector Diodes
Data Sheet
SOT-23/SOT-143 Package Lead Code Identication (top view)
Description
Avago’s HSMS-285x family of zero bias Schottky detector
diodes has been designed and optimized for use in small
signal (Pin <-20 dBm) applications at frequencies below
1.5 GHz. They are ideal for RF/ID and RF Tag applications
where primary (DC bias) power is not available.
Important Note: For detector applications with input
power levels greater than –20 dBm, use the HSMS-282x
series at frequencies below 4.0 GHz, and the HSMS-286x
series at frequencies above 4.0 GHz. The HSMS-285x
series IS NOT RECOMMENDED for these higher power
level applications.
Available in various package congurations, these detec-
tor diodes provide low cost solutions to a wide variety
of design problems. Avago’s manufacturing techniques
assure that when two diodes are mounted into a single
package, they are taken from adjacent sites on the wafer,
assuring the highest possible degree of match.
Pin Connections and Package Marking
SOT-323 Package Lead Code Identication (top view)
Features
• Surface Mount SOT-23/SOT-143 Packages
• Miniature SOT-323 and SOT-363 Packages
• High Detection Sensitivity:
up to 50 mV/µW at 915 MHz
• Low Flicker Noise:
-162 dBV/Hz at 100 Hz
• Low FIT (Failure in Time) Rate*
• Tape and Reel Options Available
• Matched Diodes for Consistent Performance
• Better Thermal Conductivity for Higher Power
Dissipation
• Lead-free
* For more information see the Surface Mount Schottky Reliability
Data Sheet.
SOT-363 Package Lead Code Identication (top view)
SERIES
C
SINGLE
B
1 2
3
1 2
3
BRIDGE
QUAD
P
UNCONNECTED
TRIO
L
1 2 3
6 5 4
1 2 3
6 5 4
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Notes:
1. Package marking provides orientation and identication.
2.
See “Electrical Specications” for appropriate package marking.
PLx
1
2
3
6
5
4
UNCONNECTED
PAIR
#5
SERIES
#2
SINGLE
#0
1 2
3
1 2
3 4
1 2
3
2
SOT-23/SOT-143 DC Electrical Specications, TC = +25°C, Single Diode
Maximum Maximum
Part Package Forward Reverse Typical
Number Marking Lead Voltage Leakage, Capacitance
HSMS- Code Code Conguration VF (mV) IR (µA) CT (pF)
2850 P0 0 Single 150 250 175 0.30
2852 P2 2 Series Pair[1,2]
2855 P5 5 Unconnected Pair[1,2]
Test IF = 0.1 mA IF = 1.0 mA VR=2V VR = –0.5 V to –1.0V
Conditions f = 1 MHz
Notes:
1. ∆VF for diodes in pairs is 15.0 mV maximum at 1.0 mA.
2. ∆CT for diodes in pairs is 0.05 pF maximum at –0.5V.
RF Electrical Specications, T
C = +25°C, Single Diode
Part Number Typical Tangential Sensitivity Typical Voltage Sensitivity Typical Video
HSMS- TSS (dBm) @ f = 915 MHz g (mV/µW) @ f = 915 MHz Resistance RV (KΩ)
2850 – 57 40 8.0
2852
2855
285B
285C
285L
285P
Test Video Bandwidth = 2 MHz Power in = –40 dBm
Conditions Zero Bias RL = 100 KΩ, Zero Bias Zero Bias
SOT-323/SOT-363 DC Electrical Specications, T
C = +25°C, Single Diode
Maximum Maximum
Part Package Forward Reverse Typical
Number Marking Lead Voltage Leakage, Capacitance
HSMS- Code Code Conguration VF (mV) IR (µA) CT (pF)
285B P0 B Single 150 250 175. 0.30
285C P2 C Series Pair
285L PL L Unconnected Trio
285P PP P Bridge Quad
Test IF = 0.1 mA IF = 1.0 mA VR=2V VR = 0.5 V to –1.0V
Conditions f = 1 MHz
Notes:
1. ∆VF for diodes in pairs is 15.0 mV maximum at 1.0 mA.
2. ∆CT for diodes in pairs is 0.05 pF maximum at –0.5V.
3
Equivalent Linear Circuit Model
HSMS-285x chip
SPICE Parameters
Parameter Units HSMS-285x
BV V 3.8
CJ0 pF 0.18
EG eV 0.69
IBV A 3 E-4
IS A 3 E-6
N 1.06
RS Ω 25
PB (VJ) V 0.35
PT (XTI) 2
M 0.5
Absolute Maximum Ratings, TC = +25°C, Single Diode
Symbol Parameter Unit Absolute Maximum[1]
SOT-23/143 SOT-323/363
PIV Peak Inverse Voltage V 2.0 2.0
TJ Junction Temperature °C 150 150
TSTG Storage Temperature °C -65 to 150 -65 to 150
TOP Operating Temperature °C -65 to 150 -65 to 150
θjc Thermal Resistance[2] °C/W 500 150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the
device.
2. TC = +25°C, where TC is dened to be the temperature at the package pins where contact is
made to the circuit board.
ESD WARNING:
Handling Precautions Should Be Taken
To Avoid Static Discharge.
Cj
Rj
RS
Rj = 8.33 X 10-5 nT
Ib + Is
where
Ib = externally applied bias current in amps
Is = saturation current (see table of SPICE parameters)
T = temperature, °K
n = ideality factor (see table of SPICE parameters)
Note:
To effectively model the packaged HSMS-285x product,
please refer to Application Note AN1124.
RS = series resistance (see Table of SPICE parameters)
Cj = junction capacitance (see Table of SPICE parameters)
4
Typical Parameters, Single Diode
Figure 1. Typical Forward Current
vs. Forward Voltage.
Figure 2. +25°C Output Voltage vs.
Input Power at Zero Bias.
Figure 3. +25°C Expanded Output
Voltage vs. Input Power. See Figure 2.
Figure 4. Output Voltage vs.
Temperature.
IF – FORWARD CURRENT (mA)
0
0.01
VF – FORWARD VOLTAGE (V)
0.8 1.0
100
1
0.1
0.2 1.8
10
1.40.4 0.6 1.2 1.6
VOLTAGE OUT (mV)
-50
0.1
POWER IN (dBm)
-30 -20
10000
10
1
-40 0
100
-10
1000
R
L
= 100 KΩ
DIODES TESTED IN FIXED-TUNED
FR4 MICROSTRIP CIRCUITS.
915 MHz
VOLTAGE OUT (mV)
-50
0.3
POWER IN (dBm)
-30
10
1
-40
30
R
L
= 100 KΩ
915 MHz
DIODES TESTED IN FIXED-TUNED
FR4 MICROSTRIP CIRCUITS.
OUTPUT VOLTAGE (mV)
0
0.9
TEMPERATURE (°C)
40 50
3.1
2.1
1.5
10 100
2.5
8020 30 70 9060
1.1
1.3
1.7
1.9
2.3
2.7
2.9
MEASUREMENTS MADE USING A
FR4 MICROSTRIP CIRCUIT.
FREQUENCY = 2.45 GHz
P
IN
= -40 dBm
R
L
= 100 KΩ
5
Applications Information
Introduction
Avago’s HSMS-285x family of Schottky detector diodes
has been developed specically for low cost, high
volume designs in small signal (Pin < -20 dBm) applica-
tions at frequencies below 1.5 GHz. At higher frequen-
cies, the DC biased HSMS-286x family should be consid-
ered.
In large signal power or gain control applications
(Pin > -20 dBm), the HSMS-282x and HSMS-286x prod-
ucts should be used. The HSMS-285x zero bias diode is
not designed for large signal designs.
Schottky Barrier Diode Characteristics
Stripped of its package, a Schottky barrier diode chip
consists of a metal-semiconductor barrier formed by de-
position of a metal layer on a semiconductor. The most
common of several dierent types, the passivated diode,
is shown in Figure 5, along with its equivalent circuit.
The Height of the Schottky Barrier
The current-voltage characteristic of a Schottky barrier
diode at room temperature is described by the following
equation:
HSMS-285A/6A fig 9
R
S
R
j
C
j
METAL
SCHOTTKY JUNCTION
PASSIVATION PASSIVATION
N-TYPE OR P-TYPE EPI LAYER
N-TYPE OR P-TYPE SILICON SUBSTRATE
CROSS-SECTION OF SCHOTTKY
BARRIER DIODE CHIP
EQUIVALENT
CIRCUIT
LP
RS
RV
Cj
CP
FOR THE HSMS-285x SERIES
CP = 0.08 pF
LP = 2 nH
Cj = 0.18 pF
RS = 25 Ω
RV = 9 KΩ
Figure 5. Schottky Diode Chip.
RS is the parasitic series resistance of the diode, the sum
of the bondwire and leadframe resistance, the resistance
of the bulk layer of silicon, etc. RF energy coupled into
RS is lost as heat — it does not contribute to the rectied
output of the diode. CJ is parasitic junction capacitance
of the diode, controlled by the thickness of the epitaxial
layer and the diameter of the Schottky contact. Rj is the
junction resistance of the diode, a function of the total
current owing through it.
Figure 6. Equivalent Circuit of a Schottky Diode.
where
n = ideality factor (see table of SPICE parameters)
T = temperature in °K
IS = saturation current (see table of SPICE parameters)
Ib = externally applied bias current in amps
IS is a function of diode barrier height, and can range
from picoamps for high barrier diodes to as much as 5
µA for very low barrier diodes.
On a semi-log plot (as shown in the Avago catalog) the
current graph will be a straight line with inverse slope
2.3 X 0.026 = 0.060 volts per cycle (until the eect of RS is
seen in a curve that droops at high current). All Schottky
diode curves have the same slope, but not necessar-
ily the same value of current for a given voltage. This is
determined by the saturation current, IS, and is related to
the barrier height of the diode.
Through the choice of p-type or n-type silicon, and the
selection of metal, one can tailor the characteristics of a
Schottky diode. Barrier height will be altered, and at the
same time CJ and RS will be changed. In general, very
low barrier height diodes (with high values of IS, suit-
able for zero bias applications) are realized on p-type
silicon. Such diodes suer from higher values of RS than
do the n-type. Thus, p-type diodes are generally reserved
for small signal detector applications (where very high
values of RV swamp out high RS) and n-type diodes are
used for mixer applications (where high L.O. drive levels
keep RV low).
Measuring Diode Parameters
The measurement of the ve elements which make up
the low frequency equivalent circuit for a packaged
Schottky diode (see Figure 6) is a complex task. Various
techniques are used for each element. The task begins
with the elements of the diode chip itself.
6
RS is perhaps the easiest to measure accurately. The V-I
curve is measured for the diode under forward bias, and
the slope of the curve is taken at some relatively high
value of current (such as 5 mA). This slope is converted
into a resistance Rd.
Detector Circuits
When DC bias is available, Schottky diode detec-
tor circuits can be used to create low cost RF and mi-
crowave receivers with a sensitivity of -55 dBm to
-57 dBm.[1] These circuits can take a variety of forms,
but in the most simple case they appear as shown in
Figure 8. This is the basic detector circuit used with the
HSMS-285x family of diodes.
In the design of such detector circuits, the starting point is
the equivalent circuit of the diode, as shown in Figure 6.
Of interest in the design of the video portion of the
circuit is the diode’s video impedance — the other
four elements of the equivalent circuit disappear at all
reasonable video frequencies. In general, the lower the
diode’s video impedance, the better the design.
[1] Avago Application Note 923, Schottky Barrier Diode Video Detectors.
HSMS-285A/6A fig 10
INSERTION LOSS (dB)
3
-40
FREQUENCY (MHz)
-10
-25
3000
-20
10 1000100
-35
-30
-15
50 Ω
50 Ω
0.16 pF
50 Ω
50 Ω9 KΩ
VIDEO
OUT
RF
IN
Z-MATCH
NETWORK
VIDEO
OUT
Z-MATCH
NETWORK
RF
IN
Figure 7. Measuring CJ and RV.
At frequencies below 10 MHz, the video resistance dom-
inates the loss and can easily be calculated from it. At
frequencies above 300 MHz, the junction capacitance
sets the loss, which plots out as a straight line when
frequency is plotted on a log scale. Again, calculation is
straightforward.
LP and CP are best measured on the HP8753C, with the
diode terminating a 50 Ω line on the input port. The re-
sulting tabulation of S11 can be put into a microwave
linear analysis program having the ve element equiv-
alent circuit with RV, CJ and RS xed. The optimizer can
then adjust the values of LP and CP until the calculated
S11 matches the measured values. Note that extreme
care must be taken to de-embed the parasitics of the
50 Ω test xture.
Figure 8. Basic Detector Circuits.
The situation is somewhat more complicated in the
design of the RF impedance matching network, which
includes the package inductance and capacitance
(which can be tuned out), the series resistance, the junc-
tion capacitance and the video resistance. Of these ve
elements of the diode’s equivalent circuit, the four para-
sitics are constants and the video resistance is a function
of the current owing through the diode.
RV and CJ are very dicult to measure. Consider the
impedance of CJ = 0.16 pF when measured at 1 MHz — it
is approximately 1 MΩ. For a well designed zero bias
Schottky, RV is in the range of 5 to 25 KΩ, and it shorts
out the junction capacitance. Moving up to a higher fre-
quency enables the measurement of the capacitance,
but it then shorts out the video resistance. The best mea-
surement technique is to mount the diode in series in a
50 Ω microstrip test circuit and measure its insertion loss
at low power levels (around -20 dBm) using an HP8753C
network analyzer. The resulting display will appear as
shown in Figure 7.
where
IS = diode saturation current in µA
Ib = bias current in µA
Saturation current is a function of the diode’s design,[2] and
it is a constant at a given temperature. For the HSMS-285x
series, it is typically 3 to 5 µA at 25°C.
Saturation current sets the detection sensitivity, video re-
sistance and input RF impedance of the zero bias Schottky
detector diode. Since no external bias is used with the
HSMS-285x series, a single transfer curve at any given fre-
quency is obtained, as shown in Figure 2.
7
The most dicult part of the design of a detector circuit
is the input impedance matching network. For very
broadband detectors, a shunt 60 Ω resistor will give good
input match, but at the expense of detection sensitivity.
When maximum sensitivity is required over a narrow
band of frequencies, a reactive matching network
is optimum. Such networks can be realized in either
lumped or distributed elements, depending upon fre-
quency, size constraints and cost limitations, but certain
general design principals exist for all types.[3] Design
work begins with the RF impedance of the HSMS-285x
series, which is given in Figure 9.
[2] Avago Application Note 969, An Optimum Zero Bias Schottky Detector Diode.
[3] Avago Application Note 963, Impedance Matching Techniques for Mixers
and Detectors.
HSMS-285A/6A fig 13
1 GHz
2
3
4
5
6
0.2 0.6 1
25
HSMS-285A/6A fig 14
65nH
100 pF
VIDEO
OUT
RF
INPUT
WIDTH = 0.050"
LENGTH = 0.065"
WIDTH = 0.015"
LENGTH = 0.600"
TRANSMISSION LINE
DIMENSIONS ARE FOR
MICROSTRIP ON
0.032" THICK FR-4.
HSMS-285A/6A fig 15
FREQUENCY (GHz): 0.9-0.93
HSMS-285A/6A fig 16
RETURN LOSS (dB)
0.9
-20
FREQUENCY (GHz)
0.915
0
-10
-15
0.93
-5
Figure 9. RF Impedan
ce of the HSM
S-285x Series at-40 dBm.
915 MHz Detector Circuit
Figure 10 illustrates a simple impedance matching
network for a 915 MHz detector.
Figure 10. 915 MHz Matching Network for the HSMS-285x Series at Zero Bias.
A 65 nH inductor rotates the impedance of the diode to
a point on the Smith Chart where a shunt inductor can
pull it up to the center. The short length of 0.065" wide
microstrip line is used to mount the lead of the diode’s
SOT-323 package. A shorted shunt stub of length <λ/4
provides the necessary shunt inductance and simul-
taneously provides the return circuit for the current
generated in the diode. The impedance of this circuit is
given in Figure 11.
Figure 11. Input Impedance.
The input match, expressed in terms of return loss, is
given in Figure 12.
Figure 12. Input Return Loss.
As can be seen, the band over which a good match is
achieved is more than adequate for 915 MHz RFID ap-
plications.
Voltage Doublers
To this point, we have restricted our discussion to single
diode detectors. A glance at Figure 8, however, will lead
to the suggestion that the two types of single diode de-
tectors be combined into a two diode voltage doubler[4]
(known also as a full wave rectier). Such a detector is
shown in Figure 13.
HSMS-285X fig 11 was 7
VIDEO OUT
Z-MATCH
NETWORK
RF IN
Figure 13. Voltage Doubler Circuit.
8
Such a circuit oers several advantages. First the voltage
outputs of two diodes are added in series, increasing the
overall value of voltage sensitivity for the network (com-
pared to a single diode detector). Second, the RF imped-
ances of the two diodes are added in parallel, making
the job of reactive matching a bit easier. Such a circuit
can easily be realized using the two series diodes in the
HSMS-285C.
Flicker Noise
Reference to Figure 5 will show that there is a junc-
tion of metal, silicon, and passivation around the rim
of the Schottky contact. It is in this three-way junction
that icker noise[5] is generated. This noise can severely
reduce the sensitivity of a crystal video receiver utiliz-
ing a Schottky detector circuit if the video frequency is
below the noise corner. Flicker noise can be substantially
reduced by the elimination of passivation, but such
diodes cannot be mounted in non-hermetic packages.
p-type silicon Schottky diodes have the least icker noise
at a given value of external bias (compared to n-type
silicon or GaAs). At zero bias, such diodes can have
extremely low values of icker noise. For the HSMS-285x
series, the noise temperature ratio is given in Figure 14.
Any Schottky junction, be it an RF diode or the gate of
a MESFET, is relatively delicate and can be burned out
with excessive RF power. Many crystal video receivers
used in RFID (tag) applications nd themselves in poorly
controlled environments where high power sources may
be present. Examples are the areas around airport and
FAA radars, nearby ham radio operators, the vicinity of
a broadcast band transmitter, etc. In such environments,
the Schottky diodes of the receiver can be protected
by a device known as a limiter diode.[6] Formerly avail-
able only in radar warning receivers and other high cost
electronic warfare applications, these diodes have been
adapted to commercial and consumer circuits.
Avago oers a complete line of surface mountable
PIN limiter diodes. Most notably, our HSMP-4820 (SOT-
23) can act as a very fast (nanosecond) power-sensi-
tive switch when placed between the antenna and the
Schottky diode, shorting out the RF circuit temporar-
ily and reecting the excessive RF energy back out the
antenna.
Assembly Instructions
SOT-323 PCB Footprint
A recommended PCB pad layout for the miniature SOT-
323 (SC-70) package is shown in Figure 15 (dimensions
are in inches). This layout provides ample allowance for
package placement by automated assembly equipment
without adding parasitics that could impair the perfor-
mance. Figure 16 shows the pad layout for the six-lead
SOT-363.
[4] Avago Application Note 956-4, Schottky Diode Voltage Doubler.
[5] Avago Application Note 965-3, Flicker Noise in Schottky Diodes.
[6] Avago Application Note 1050, Low Cost, Surface Mount Power Limiters.
NOISE TEMPERATURE RATIO (dB)
FREQUENCY (Hz)
15
10
5
0
-510 100 1000 10000 100000
Diode Burnout
Figure 14. Typical Noise Temperature Ratio.
Noise temperature ratio is the quotient of the diode’s
noise power (expressed in dBV/Hz) divided by the noise
power of an ideal resistor of resistance R = RV.
For an ideal resistor R, at 300°K, the noise voltage can be
computed from
v = 1.287 X 10-10 √R volts/Hz
which can be expressed as
20 log10 v dBV/Hz
Thus, for a diode with RV = 9 KΩ, the noise voltage is
12.2 nV/Hz or -158 dBV/Hz. On the graph of Figure 14, -
158 dBV/Hz would replace the zero on the vertical scale
to convert the chart to one of absolute noise voltage vs.
frequency.
0.026
0.039
0.079
0.022
Dimensions in inches
0.026
0.075
0.016
0.035
Figure 15. Recommended PCB
Pad Layout for Avago’s SC70
3L/SOT-323 Products.
Figure 16. Recommended PCB Pad
Layout for Avago's SC70 6L/SOT-363
Products.
9
Figure 17. Surface Mount Assembly Prole.
SMT Assembly
Reliable assembly of surface mount components is a
complex process that involves many material, process,
and equipment factors, including: method of heating
(e.g., IR or vapor phase reow, wave soldering, etc.)
circuit board material, conductor thickness and pattern,
type of solder alloy, and the thermal conductivity and
thermal mass of components. Components with a low
mass, such as the SOT packages, will reach solder reow
temperatures faster than those with a greater mass.
Avago’s diodes have been qualied to the time-tem-
perature prole shown in Figure 17. This prole is repre-
sentative of an IR reow type of surface mount assembly
process.
After ramping up from room temperature, the circuit
board with components attached to it (held in place
with solder paste) passes through one or more preheat
Lead-Free Reow Prole Recommendation (IPC/JEDEC J-STD-020C)
Reow Parameter Lead-Free Assembly
Average ramp-up rate (Liquidus Temperature (TS(max) to Peak) 3°C/ second max
Preheat Temperature Min (TS(min)) 150°C
Temperature Max (TS(max)) 200°C
Time (min to max) (tS) 60-180 seconds
Ts(max) to TL Ramp-up Rate 3°C/second max
Time maintained above: Temperature (TL) 217°C
Time (tL) 60-150 seconds
Peak Temperature (TP) 260 +0/-5°C
Time within 5 °C of actual
Peak temperature (tP)
20-40 seconds
Ramp-down Rate 6°C/second max
Time 25 °C to Peak Temperature 8 minutes max
Note 1: All temperatures refer to topside of the package, measured on the package body surface
25
Time
Temperature
Tp
T
L
tp
t
L
t 25°C to Peak
Ramp-up
ts
Ts
min
Ramp-down
Preheat
Critical Zone
T
L
to Tp
Ts
max
zones. The preheat zones increase the temperature of
the board and components to prevent thermal shock
and begin evaporating solvents from the solder paste.
The reow zone briey elevates the temperature su-
ciently to produce a reow of the solder.
The rates of change of temperature for the ramp-up and
cool-down zones are chosen to be low enough to not
cause deformation of the board or damage to compo-
nents due to thermal shock. The maximum temperature
in the reow zone (TMAX) should not exceed 260°C.
These parameters are typical for a surface mount assem-
bly process for Avago diodes. As a general guideline, the
circuit board and components should be exposed only to
the minimum temperatures and times necessary to achieve
a uniform reow of solder.
10
Outline 23 (SOT-23) Outline SOT-323 (SC-70 3 Lead)
Part Number Ordering Information
No. of
Part Number Devices Container
HSMS-285x-TR2G 10000 13" Reel
HSMS-285x-TR1G 3000 7" Reel
HSMS-285x-BLK G 100 antistatic bag
where x = 0, 2, 5, B, C, L and P for HSMS-285x.
e
B
e2
e1
E1
C
EXXX
L
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
DIMENSIONS (mm)
MIN.
0.79
0.000
0.30
0.08
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.20
3.13
1.50
1.02
2.04
0.60
2.70
0.69
SYMBOL
A
A1
B
C
D
E1
e
e1
e2
E
L
e
B
e1
E1
C
EXXX
L
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
DIMENSIONS (mm)
MIN.
0.80
0.00
0.15
0.08
1.80
1.10
1.80
0.26
MAX.
1.00
0.10
0.40
0.25
2.25
1.40
2.40
0.46
SYMBOL
A
A1
B
C
D
E1
e
e1
E
L
1.30 typical
0.65 typical
Package Dimensions
11
USER
FEED
DIRECTION
COVER TAPE
CARRIER
TAPE
REEL
Note: "AB" represents package marking code.
"C" represents date code.
END VIEW
8 mm
4 mm
TOP VIEW
ABC ABC ABC ABC
END VIEW
8 mm
4 mm
TOP VIEW
Note: "AB" represents package marking code.
"C" represents date code.
ABC ABC ABC ABC
Note: "AB" represents package marking code.
"C" represents date code.
END VIEW
8 mm
4 mm
TOP VIEW
ABC ABC ABC ABC
Device Orientation
For Outline SOT-143
For Outlines SOT-23, -323
For Outline SOT-363
Outline 143 (SOT-143) Outline SOT-363 (SC-70 6 Lead)
eB
e2
B1
e1
E1
C
EXXX
L
D
A
A1
Notes:
XXX-package marking
Drawings are not to scale
DIMENSIONS (mm)
MIN.
0.79
0.013
0.36
0.76
0.086
2.80
1.20
0.89
1.78
0.45
2.10
0.45
MAX.
1.097
0.10
0.54
0.92
0.152
3.06
1.40
1.02
2.04
0.60
2.65
0.69
SYMBOL
A
A1
B
B1
C
D
E1
e
e1
e2
E
L
E
HE
D
e
A1
b
A
A2
DIMENSIONS (mm)
MIN.
1.15
1.80
1.80
0.80
0.80
0.00
0.15
0.08
0.10
MAX.
1.35
2.25
2.40
1.10
1.00
0.10
0.30
0.25
0.46
SYMBOL
E
D
HE
A
A2
A1
e
b
c
L
0.650 BCS
L
c
12
Tape Dimensions and Product Orientation
For Outline SOT-23
9° MAX
A
0
P
P
0
D
P
2
E
F
W
D
1
Ko 8° MAX
B
0
13.5° MAX
t1
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t1
8.00 + 0.30 – 0.10
0.229 ± 0.013
0.315 + 0.012 – 0.004
0.009 ± 0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
BETWEEN
CENTERLINE
For Outline SOT-143
W
F
E
P
2
P
0
D
P
D
1
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
3.19 ± 0.10
2.80 ± 0.10
1.31 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.126 ± 0.004
0.110 ± 0.004
0.052 ± 0.004
0.157 ± 0.004
0.039 + 0.010
CAVITY
DIAMETER
PITCH
POSITION
D
P0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t1
8.00 + 0.30 – 0.10
0.254 ± 0.013
0.315+ 0.012 – 0.004
0.0100 ± 0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
A
0
9° MAX 9° MAX
t
1
B
0
K
0
Tape Dimensions and Product Orientation
For Outlines SOT-323, -363
P
P
0
P
2
F
W
C
D
1
D
E
A
0
An
t
1
(CARRIER TAPE THICKNESS) T
t
(COVER TAPE THICKNESS)
An
B
0
K
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
2.40 ± 0.10
2.40 ± 0.10
1.20 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.094 ± 0.004
0.094 ± 0.004
0.047 ± 0.004
0.157 ± 0.004
0.039 + 0.010
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.55 ± 0.05
4.00 ± 0.10
1.75 ± 0.10
0.061 ± 0.002
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t
1
8.00 ± 0.30
0.254 ± 0.02
0.315 ± 0.012
0.0100 ± 0.0008
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
FOR SOT-323 (SC70-3 LEAD) An 8°C MAX
FOR SOT-363 (SC70-6 LEAD) 10°C MAX
ANGLE
WIDTH
TAPE THICKNESS
C
T
t
5.4 ± 0.10
0.062 ± 0.001
0.205 ± 0.004
0.0025 ± 0.00004
COVER TAPE
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved.
Obsoletes 5989-4022EN
AV02-1377EN - May 29, 2009