2-8
File Number
4142
HIP5015, HIP5016
7V, 7A SynchroFET™ Complementary
Drive Synchronous Half-Bridge
Designed with the Pentium® in mind, the Intersil SynchroFET
f amily provides a ne w approach for implementing a
synchronous rectified buc k switching regulator. The
SynchroFET™ replaces two pow er DMOSs , a Schottky diode,
two gate drivers and synchronous control circuitry. The
complementary drive circuit turns the upper FET on and the
lower FET off when the input from the PWM is high. When the
input from the PWM goes low the upper FET turns off and the
lower FET turns on. The HIP5016 has a PWM pin that inv erts
the relationship from the input to PHASE. This architecture
allows the designer to utiliz e a low cost single-ended PWM
controller in either a current or voltage mode configuration. The
SynchroFET operates in continuous conduction mode reducing
EMI constraints and enab ling high bandwidth operation.
Several features ensure easy start-up. First, the supply currents
sta y below specification as the supply voltages ramp up; no
une xpected surges occur that might perturb a soft-start or
deplete a charge-pump . Second, an y pow er-up sequence of
the VCC, VIN, or PWM pins can be used without causing large
currents. Third, the chip operates when VCC is greater than 2V
so VCC can be created from a charge pump powered from VIN.
Features
• Complementary Drive, Half-Bridge Power NMOS
• Use With Low-Cost Single-Output PWM Controllers
• Improve Efficiency Over Conventional Buck Converter with
Schottky Clamp
• Minimum Deadtime Provided by Adaptive Shoot-Through
Protection Eliminates External Schottky
• Grounded Case for Low EMI and Simple Heatsinking
• Low Operating Current
• Frequency Exceeding 1MHz
• Dual Polarity Input Options
• All Pins Surge Protected
Applications
• 5V to ≤3.3V Synchronous Buck Converters
• 3.3V to ≤2.9V Synchronous Buck Converters
• Pentium Power Supplies
• Bus Terminations (BTL and GTL)
• Drive 5V Motors Directly from Microprocessor
Typical Application Block Diagram
Pinouts
HIP5015IS1, HIP5016IS1 (SIP - VERTICAL)
TOP VIEW
Pentium® is a registered trademark of Intel Corporation.
SynchroFET™ is a trademark of Intersil Corporation.
HIP5015IS, HIP5016IS (SIP - GULLWING)
TOP VIEW
Ordering Information
PART NUMBER TEMP.
RANGE (oC) PACKAGE PKG.
NO.
HIP5015IS -40 to 85 7 Ld Gullwing SIP Z7.05B
HIP5015IS1 -40 to 85 7 Ld Staggered
Vertical SIP Z7.05C
HIP5016IS -40 to 85 7 Ld Gullwing SIP Z7.05B
HIP5016IS1 -40 to 85 7 Ld Staggered
Vertical SIP Z7.05C
+12V
+3.3V
PHASE
PWM
VIN
VCC
CONTROL
+5V
HIP5015
PWM
CONTROLLER
SYNCHRONOUS RECTIFIED BUCK CONVERTER
GND
1 PHASE
2V
IN
3V
CC
4 GND
5 PWM (HIP5015), PWM (HIP5016)
6NC
7NC
GND (TAB) FRONT ROWS = PINS 1,3,5,7
BACK ROWS = PINS 2,4,6
1 PHASE
2V
IN
3V
CC
4
5 PWM (HIP5015), PWM (HIP5016)
6NC
7NC
GND
(TAB)
Data Sheet June 1996
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
2-9
Non-Inverting SynchroFET Block Diagram
HIP5015
DRIVER
DRIVER
VIN
PHASE
GND
VCC
BUFFER
PWM VCC
ADAPTIVE
SHOOT-THROUGH
PROTECTION
Inverting SynchroFET Block Diagram
HIP5016
DRIVER
DRIVER
VIN
PHASE
GND
VCC
BUFFER
PWM VCC
ADAPTIVE
SHOOT-THROUGH
PROTECTION
HIP5015, HIP5016
2-10
Absolute Maximum Ratings Thermal Information (Typical)
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16V
Input Voltage VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V
IPHASE, IVIN, IGND . . . . . . . . . . . . . . . . . . . . . 7A (Repetitive Peak)
PWM Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -4V to +16V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 3 (4kV)
Lead Temperature (Soldering 10s) (Lead Tips Only). . . . . . . 300oC
Storage Temperature Range . . . . . . . . . . . . . . . . . . -65oC to 150oC
Junction Temperature Range. . . . . . . . . . . . . . . . . . -40oC to 150oC
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .+12V, ±20%
Input Voltage VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5.5V
Supply Voltage, VCC, minim um f or charge-pumped start-up . . . .+4.0V
Package
θJC†† θJA (oC/W)†
(oC/W) 01233†††
SIP (IS). . . . . 2 55 30 25 24 18
SIP (IS1). . . . 2 55 ----
†Versus additional square inches of 1 ounce copper on the
printed circuit board.
†† θJC is typical with an infinite heatsink.
††† 200 linear feet per minute of air flow.
IPHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5A
IVIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4A
IGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the recommended operating conditions of this specification is not implied.
Electrical Specifications
PARAMETER SYMBOL TEST CONDITIONS
TJ = 25oCTJ= - 40oC
TJ= +150oC
UNITSMIN TYP MAX MIN MAX
rDS(ON) Upper MOSFET RDSU VCC = 12V, VIN = 5V - 68 78 - 130 mΩ
rDS(ON) Lower MOSFET RDSL VCC = 12V, VIN = 5V - 72 82 - 136 mΩ
VIN Operating Current IVINO VIN = 5V, No Load, 500kHz - 1.8 4 - 5 mA
VIN Quiescent Current IVIN PWM or PWM = VCC or GND - 0.1 10 - 100 µA
VCC Operating Current ICCO VCC = 12V, 500kHz - 4.3 7 - 9 mA
VCC Quiescent Current (HIP5015) ICCIH PWM = VCC -40- -300µA
V
CC Quiescent Current (HIP5015) ICCIL PWM = GND - 0.1 10 - 100 µA
VCC Quiescent Current (HIP5016) ICCNIH PWM = VCC - 0.1 10 - 100 µA
VCC Quiescent Current (HIP5016) ICCNIL PWM = GND - 100 - - 300 µA
Low Level PWM Input Voltage VIL - 1.8 - 1 - V
High Level PWM Input Voltage VIH - 2.1 - - 3 V
PWM Input Voltage Hysteresis VIHYS - 0.3 - - - V
Input Pulldown Resistance (HIP5015) RPWM - 220 - 100 400 kΩ
Input Pullup Resistance (HIP5016) RPWM - 220 - 100 400 kΩ
Switching Specifications
PARAMETER SYMBOL TEST CONDITIONS
TJ = 25oCTJ = - 40oC
TJ= +150oC
UNITSMIN TYP MAX MIN MAX
Upper Device Turn-Off Delay tPHL VCC = 12V, IPHASE = -0.5A - 30 50 - 80 ns
Lower Device Turn-Off Delay tPLH VCC = 12V, IPHASE = +0.5A - 30 50 - 80 ns
Dead Time tDT VCC = +12V, IPHASE = -0.5A - 10 - - - ns
Phase Rise-Time trVCC = 12V, IPHASE = -0.5A - 20 - - - ns
Phase Fall-Time tfVCC = 12V, IPHASE = +0.5A - 20 - - - ns
HIP5015, HIP5016
2-11
Timing Diagram
Pin Descriptions
SYMBOL DESCRIPTION
VCC Positive supply to control logic and gate drivers. De-couple this pin to GND.
VIN FET Switch Input Voltage. De-couple this pin to GND.
PHASE Output.
PWM (HIP5015)
PWM (HIP5016) Single Ended Control Input. This input connects to the PWM controller output.
GND System Ground.
12V
2V
12V
0V
2V
0V
5V
4.5V
2.5V
0.5V
0V
-0.5V
tPHL
tPLH
tftr
tDT
PWM (HIP5015)
PHASE
NOTE: IPHASE = +0.5A for tPLH and tf, IPHASE = -0.5A for tPHL, tDT, and tr.
FIGURE 1.
PWM (HIP5016)
HIP5015, HIP5016
2-12
Typical Performance Curves
FIGURE 2. ICCO vs FREQUENCY FIGURE 3. IVINO vs FREQUENCY
FIGURE 4. RDSU vs VCC FIGURE 5. RDSL vs VCC
FIGURE 6. RDSU OR RDSL vs TEMPERATURE
ICCO (mA)
0 100 200 900 1000700 800300 400 500 600
FREQUENCY (kHz)
10
9
8
7
6
5
4
3
2
1
00 100 200 900 1000700 800300 400 500 600
FREQUENCY (kHz)
IVINO (mA)
1
1.5
2
2.5
3
3.5
4
0.5
0
4 5 6 7 8 9 10 11 12
VCC (V)
rDSU (mΩ)
240
220
200
180
160
140
120
100
80
60
40 13 14 15 16
VIN = 5V
VIN = 3.3V
4 5 6 7 8 9 10 11 12
VCC (V)
rDSL (mΩ)
240
220
200
180
160
140
120
100
80
60
40 13 14 15 16
VIN = 5V AND 3.3V
-40 -20 0 20 40 60 80 100 120 140
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
TEMPERATURE (oC)
RDSU OR RDSL (NORMALIZED)
HIP5015, HIP5016
2-13
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
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100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
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7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
HIP5015, HIP5016
